1 /* 2 * QEMU x86 ISA testdev 3 * 4 * Copyright (c) 2012 Avi Kivity, Gerd Hoffmann, Marcelo Tosatti 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* 26 * This device is used to test KVM features specific to the x86 port, such 27 * as emulation, power management, interrupt routing, among others. It's meant 28 * to be used like: 29 * 30 * qemu-system-x86_64 -device pc-testdev -serial stdio \ 31 * -device isa-debug-exit,iobase=0xf4,iosize=0x4 \ 32 * -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat 33 * 34 * Where msr.flat is one of the KVM unittests, present on a separate repo, 35 * git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git 36 */ 37 38 #include "config-host.h" 39 #if defined(CONFIG_POSIX) 40 #include <sys/mman.h> 41 #endif 42 #include "hw/hw.h" 43 #include "hw/qdev.h" 44 #include "hw/isa/isa.h" 45 46 #define IOMEM_LEN 0x10000 47 48 typedef struct PCTestdev { 49 ISADevice parent_obj; 50 51 MemoryRegion ioport; 52 MemoryRegion ioport_byte; 53 MemoryRegion flush; 54 MemoryRegion irq; 55 MemoryRegion iomem; 56 uint32_t ioport_data; 57 char iomem_buf[IOMEM_LEN]; 58 } PCTestdev; 59 60 #define TYPE_TESTDEV "pc-testdev" 61 #define TESTDEV(obj) \ 62 OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV) 63 64 static void test_irq_line(void *opaque, hwaddr addr, uint64_t data, 65 unsigned len) 66 { 67 PCTestdev *dev = opaque; 68 ISADevice *isa = ISA_DEVICE(dev); 69 70 qemu_set_irq(isa_get_irq(isa, addr), !!data); 71 } 72 73 static const MemoryRegionOps test_irq_ops = { 74 .write = test_irq_line, 75 .valid.min_access_size = 1, 76 .valid.max_access_size = 1, 77 .endianness = DEVICE_LITTLE_ENDIAN, 78 }; 79 80 static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data, 81 unsigned len) 82 { 83 PCTestdev *dev = opaque; 84 int bits = len * 8; 85 int start_bit = (addr & 3) * 8; 86 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit; 87 dev->ioport_data &= ~mask; 88 dev->ioport_data |= data << start_bit; 89 } 90 91 static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len) 92 { 93 PCTestdev *dev = opaque; 94 int bits = len * 8; 95 int start_bit = (addr & 3) * 8; 96 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit; 97 return (dev->ioport_data & mask) >> start_bit; 98 } 99 100 static const MemoryRegionOps test_ioport_ops = { 101 .read = test_ioport_read, 102 .write = test_ioport_write, 103 .endianness = DEVICE_LITTLE_ENDIAN, 104 }; 105 106 static const MemoryRegionOps test_ioport_byte_ops = { 107 .read = test_ioport_read, 108 .write = test_ioport_write, 109 .valid.min_access_size = 1, 110 .valid.max_access_size = 4, 111 .impl.min_access_size = 1, 112 .impl.max_access_size = 1, 113 .endianness = DEVICE_LITTLE_ENDIAN, 114 }; 115 116 static void test_flush_page(void *opaque, hwaddr addr, uint64_t data, 117 unsigned len) 118 { 119 hwaddr page = 4096; 120 void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0); 121 122 /* We might not be able to get the full page, only mprotect what we actually 123 have mapped */ 124 #if defined(CONFIG_POSIX) 125 mprotect(a, page, PROT_NONE); 126 mprotect(a, page, PROT_READ|PROT_WRITE); 127 #endif 128 cpu_physical_memory_unmap(a, page, 0, 0); 129 } 130 131 static const MemoryRegionOps test_flush_ops = { 132 .write = test_flush_page, 133 .valid.min_access_size = 4, 134 .valid.max_access_size = 4, 135 .endianness = DEVICE_LITTLE_ENDIAN, 136 }; 137 138 static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len) 139 { 140 PCTestdev *dev = opaque; 141 uint64_t ret = 0; 142 memcpy(&ret, &dev->iomem_buf[addr], len); 143 144 return ret; 145 } 146 147 static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val, 148 unsigned len) 149 { 150 PCTestdev *dev = opaque; 151 memcpy(&dev->iomem_buf[addr], &val, len); 152 dev->iomem_buf[addr] = val; 153 } 154 155 static const MemoryRegionOps test_iomem_ops = { 156 .read = test_iomem_read, 157 .write = test_iomem_write, 158 .endianness = DEVICE_LITTLE_ENDIAN, 159 }; 160 161 static void testdev_realizefn(DeviceState *d, Error **errp) 162 { 163 ISADevice *isa = ISA_DEVICE(d); 164 PCTestdev *dev = TESTDEV(d); 165 MemoryRegion *mem = isa_address_space(isa); 166 MemoryRegion *io = isa_address_space_io(isa); 167 168 memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev, 169 "pc-testdev-ioport", 4); 170 memory_region_init_io(&dev->ioport_byte, OBJECT(dev), 171 &test_ioport_byte_ops, dev, 172 "pc-testdev-ioport-byte", 4); 173 memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev, 174 "pc-testdev-flush-page", 4); 175 memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev, 176 "pc-testdev-irq-line", 24); 177 memory_region_init_io(&dev->iomem, OBJECT(dev), &test_iomem_ops, dev, 178 "pc-testdev-iomem", IOMEM_LEN); 179 180 memory_region_add_subregion(io, 0xe0, &dev->ioport); 181 memory_region_add_subregion(io, 0xe4, &dev->flush); 182 memory_region_add_subregion(io, 0xe8, &dev->ioport_byte); 183 memory_region_add_subregion(io, 0x2000, &dev->irq); 184 memory_region_add_subregion(mem, 0xff000000, &dev->iomem); 185 } 186 187 static void testdev_class_init(ObjectClass *klass, void *data) 188 { 189 DeviceClass *dc = DEVICE_CLASS(klass); 190 191 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 192 dc->realize = testdev_realizefn; 193 } 194 195 static const TypeInfo testdev_info = { 196 .name = TYPE_TESTDEV, 197 .parent = TYPE_ISA_DEVICE, 198 .instance_size = sizeof(PCTestdev), 199 .class_init = testdev_class_init, 200 }; 201 202 static void testdev_register_types(void) 203 { 204 type_register_static(&testdev_info); 205 } 206 207 type_init(testdev_register_types) 208