xref: /openbmc/qemu/hw/misc/pc-testdev.c (revision 37677d7d)
1 /*
2  * QEMU x86 ISA testdev
3  *
4  * Copyright (c) 2012 Avi Kivity, Gerd Hoffmann, Marcelo Tosatti
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 /*
26  * This device is used to test KVM features specific to the x86 port, such
27  * as emulation, power management, interrupt routing, among others. It's meant
28  * to be used like:
29  *
30  * qemu-system-x86_64 -device pc-testdev -serial stdio \
31  * -device isa-debug-exit,iobase=0xf4,iosize=0x4 \
32  * -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat
33  *
34  * Where msr.flat is one of the KVM unittests, present on a separate repo,
35  * https://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
36 */
37 
38 #include "qemu/osdep.h"
39 #include "hw/hw.h"
40 #include "hw/qdev.h"
41 #include "qemu/module.h"
42 #include "hw/isa/isa.h"
43 
44 #define IOMEM_LEN    0x10000
45 
46 typedef struct PCTestdev {
47     ISADevice parent_obj;
48 
49     MemoryRegion ioport;
50     MemoryRegion ioport_byte;
51     MemoryRegion flush;
52     MemoryRegion irq;
53     MemoryRegion iomem;
54     uint32_t ioport_data;
55     char iomem_buf[IOMEM_LEN];
56 } PCTestdev;
57 
58 #define TYPE_TESTDEV "pc-testdev"
59 #define TESTDEV(obj) \
60      OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV)
61 
62 static uint64_t test_irq_line_read(void *opaque, hwaddr addr, unsigned size)
63 {
64     return 0;
65 }
66 
67 static void test_irq_line_write(void *opaque, hwaddr addr, uint64_t data,
68                           unsigned len)
69 {
70     PCTestdev *dev = opaque;
71     ISADevice *isa = ISA_DEVICE(dev);
72 
73     qemu_set_irq(isa_get_irq(isa, addr), !!data);
74 }
75 
76 static const MemoryRegionOps test_irq_ops = {
77     .read = test_irq_line_read,
78     .write = test_irq_line_write,
79     .valid.min_access_size = 1,
80     .valid.max_access_size = 1,
81     .endianness = DEVICE_LITTLE_ENDIAN,
82 };
83 
84 static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data,
85                               unsigned len)
86 {
87     PCTestdev *dev = opaque;
88     int bits = len * 8;
89     int start_bit = (addr & 3) * 8;
90     uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
91     dev->ioport_data &= ~mask;
92     dev->ioport_data |= data << start_bit;
93 }
94 
95 static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len)
96 {
97     PCTestdev *dev = opaque;
98     int bits = len * 8;
99     int start_bit = (addr & 3) * 8;
100     uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
101     return (dev->ioport_data & mask) >> start_bit;
102 }
103 
104 static const MemoryRegionOps test_ioport_ops = {
105     .read = test_ioport_read,
106     .write = test_ioport_write,
107     .endianness = DEVICE_LITTLE_ENDIAN,
108 };
109 
110 static const MemoryRegionOps test_ioport_byte_ops = {
111     .read = test_ioport_read,
112     .write = test_ioport_write,
113     .valid.min_access_size = 1,
114     .valid.max_access_size = 4,
115     .impl.min_access_size = 1,
116     .impl.max_access_size = 1,
117     .endianness = DEVICE_LITTLE_ENDIAN,
118 };
119 
120 static uint64_t test_flush_page_read(void *opaque, hwaddr addr, unsigned size)
121 {
122     return 0;
123 }
124 
125 static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data,
126                             unsigned len)
127 {
128     hwaddr page = 4096;
129     void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
130 
131     /* We might not be able to get the full page, only mprotect what we actually
132        have mapped */
133 #if defined(CONFIG_POSIX)
134     mprotect(a, page, PROT_NONE);
135     mprotect(a, page, PROT_READ|PROT_WRITE);
136 #endif
137     cpu_physical_memory_unmap(a, page, 0, 0);
138 }
139 
140 static const MemoryRegionOps test_flush_ops = {
141     .read = test_flush_page_read,
142     .write = test_flush_page_write,
143     .valid.min_access_size = 4,
144     .valid.max_access_size = 4,
145     .endianness = DEVICE_LITTLE_ENDIAN,
146 };
147 
148 static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len)
149 {
150     PCTestdev *dev = opaque;
151     uint64_t ret = 0;
152     memcpy(&ret, &dev->iomem_buf[addr], len);
153 
154     return ret;
155 }
156 
157 static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val,
158                              unsigned len)
159 {
160     PCTestdev *dev = opaque;
161     memcpy(&dev->iomem_buf[addr], &val, len);
162     dev->iomem_buf[addr] = val;
163 }
164 
165 static const MemoryRegionOps test_iomem_ops = {
166     .read = test_iomem_read,
167     .write = test_iomem_write,
168     .endianness = DEVICE_LITTLE_ENDIAN,
169 };
170 
171 static void testdev_realizefn(DeviceState *d, Error **errp)
172 {
173     ISADevice *isa = ISA_DEVICE(d);
174     PCTestdev *dev = TESTDEV(d);
175     MemoryRegion *mem = isa_address_space(isa);
176     MemoryRegion *io = isa_address_space_io(isa);
177 
178     memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev,
179                           "pc-testdev-ioport", 4);
180     memory_region_init_io(&dev->ioport_byte, OBJECT(dev),
181                           &test_ioport_byte_ops, dev,
182                           "pc-testdev-ioport-byte", 4);
183     memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev,
184                           "pc-testdev-flush-page", 4);
185     memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev,
186                           "pc-testdev-irq-line", 24);
187     memory_region_init_io(&dev->iomem, OBJECT(dev), &test_iomem_ops, dev,
188                           "pc-testdev-iomem", IOMEM_LEN);
189 
190     memory_region_add_subregion(io,  0xe0,       &dev->ioport);
191     memory_region_add_subregion(io,  0xe4,       &dev->flush);
192     memory_region_add_subregion(io,  0xe8,       &dev->ioport_byte);
193     memory_region_add_subregion(io,  0x2000,     &dev->irq);
194     memory_region_add_subregion(mem, 0xff000000, &dev->iomem);
195 }
196 
197 static void testdev_class_init(ObjectClass *klass, void *data)
198 {
199     DeviceClass *dc = DEVICE_CLASS(klass);
200 
201     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
202     dc->realize = testdev_realizefn;
203 }
204 
205 static const TypeInfo testdev_info = {
206     .name           = TYPE_TESTDEV,
207     .parent         = TYPE_ISA_DEVICE,
208     .instance_size  = sizeof(PCTestdev),
209     .class_init     = testdev_class_init,
210 };
211 
212 static void testdev_register_types(void)
213 {
214     type_register_static(&testdev_info);
215 }
216 
217 type_init(testdev_register_types)
218