xref: /openbmc/qemu/hw/misc/macio/macio.c (revision f28d0dfd)
1 /*
2  * PowerMac MacIO device emulation
3  *
4  * Copyright (c) 2005-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 #include "qemu/osdep.h"
26 #include "qapi/error.h"
27 #include "hw/hw.h"
28 #include "hw/ppc/mac.h"
29 #include "hw/misc/macio/cuda.h"
30 #include "hw/pci/pci.h"
31 #include "hw/ppc/mac_dbdma.h"
32 #include "hw/char/escc.h"
33 #include "hw/misc/macio/macio.h"
34 #include "hw/intc/heathrow_pic.h"
35 #include "trace.h"
36 
37 /* Note: this code is strongly inspirated from the corresponding code
38  * in PearPC */
39 
40 /*
41  * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
42  * while the other one is the normal, current ESCC interface.
43  *
44  * The magic below creates memory aliases to spawn the escc-legacy device
45  * purely by rerouting the respective registers to our escc region. This
46  * works because the only difference between the two memory regions is the
47  * register layout, not their semantics.
48  *
49  * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
50  */
51 static void macio_escc_legacy_setup(MacIOState *s)
52 {
53     ESCCState *escc = ESCC(&s->escc);
54     SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
55     MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
56     MemoryRegion *bar = &s->bar;
57     int i;
58     static const int maps[] = {
59         0x00, 0x00, /* Command B */
60         0x02, 0x20, /* Command A */
61         0x04, 0x10, /* Data B */
62         0x06, 0x30, /* Data A */
63         0x08, 0x40, /* Enhancement B */
64         0x0A, 0x50, /* Enhancement A */
65         0x80, 0x80, /* Recovery count */
66         0x90, 0x90, /* Start A */
67         0xa0, 0xa0, /* Start B */
68         0xb0, 0xb0, /* Detect AB */
69     };
70 
71     memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256);
72     for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
73         MemoryRegion *port = g_new(MemoryRegion, 1);
74         memory_region_init_alias(port, OBJECT(s), "escc-legacy-port",
75                                  sysbus_mmio_get_region(sbd, 0),
76                                  maps[i + 1], 0x2);
77         memory_region_add_subregion(escc_legacy, maps[i], port);
78     }
79 
80     memory_region_add_subregion(bar, 0x12000, escc_legacy);
81 }
82 
83 static void macio_bar_setup(MacIOState *s)
84 {
85     ESCCState *escc = ESCC(&s->escc);
86     SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
87     MemoryRegion *bar = &s->bar;
88 
89     memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0));
90     macio_escc_legacy_setup(s);
91 }
92 
93 static void macio_common_realize(PCIDevice *d, Error **errp)
94 {
95     MacIOState *s = MACIO(d);
96     SysBusDevice *sysbus_dev;
97     Error *err = NULL;
98 
99     object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err);
100     if (err) {
101         error_propagate(errp, err);
102         return;
103     }
104     sysbus_dev = SYS_BUS_DEVICE(&s->dbdma);
105     memory_region_add_subregion(&s->bar, 0x08000,
106                                 sysbus_mmio_get_region(sysbus_dev, 0));
107 
108     qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0);
109     qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK);
110     qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4);
111     qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0));
112     qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1));
113     qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial);
114     qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial);
115     object_property_set_bool(OBJECT(&s->escc), true, "realized", &err);
116     if (err) {
117         error_propagate(errp, err);
118         return;
119     }
120 
121     macio_bar_setup(s);
122     pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
123 }
124 
125 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
126                               qemu_irq irq0, qemu_irq irq1, int dmaid,
127                               Error **errp)
128 {
129     SysBusDevice *sysbus_dev;
130 
131     sysbus_dev = SYS_BUS_DEVICE(ide);
132     sysbus_connect_irq(sysbus_dev, 0, irq0);
133     sysbus_connect_irq(sysbus_dev, 1, irq1);
134     qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid);
135     object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp);
136     macio_ide_register_dma(ide);
137 
138     object_property_set_bool(OBJECT(ide), true, "realized", errp);
139 }
140 
141 static void macio_oldworld_realize(PCIDevice *d, Error **errp)
142 {
143     MacIOState *s = MACIO(d);
144     OldWorldMacIOState *os = OLDWORLD_MACIO(d);
145     DeviceState *pic_dev = DEVICE(os->pic);
146     Error *err = NULL;
147     SysBusDevice *sysbus_dev;
148 
149     macio_common_realize(d, &err);
150     if (err) {
151         error_propagate(errp, err);
152         return;
153     }
154 
155     qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
156                          s->frequency);
157     object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
158     if (err) {
159         error_propagate(errp, err);
160         return;
161     }
162     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
163     memory_region_add_subregion(&s->bar, 0x16000,
164                                 sysbus_mmio_get_region(sysbus_dev, 0));
165     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
166                                                        OLDWORLD_CUDA_IRQ));
167 
168     sysbus_dev = SYS_BUS_DEVICE(&s->escc);
169     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
170                                                        OLDWORLD_ESCCB_IRQ));
171     sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
172                                                        OLDWORLD_ESCCA_IRQ));
173 
174     object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
175     if (err) {
176         error_propagate(errp, err);
177         return;
178     }
179     sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
180     memory_region_add_subregion(&s->bar, 0x60000,
181                                 sysbus_mmio_get_region(sysbus_dev, 0));
182     pmac_format_nvram_partition(&os->nvram, os->nvram.size);
183 
184     /* Heathrow PIC */
185     sysbus_dev = SYS_BUS_DEVICE(os->pic);
186     memory_region_add_subregion(&s->bar, 0x0,
187                                 sysbus_mmio_get_region(sysbus_dev, 0));
188 
189     /* IDE buses */
190     macio_realize_ide(s, &os->ide[0],
191                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ),
192                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ),
193                       0x16, &err);
194     if (err) {
195         error_propagate(errp, err);
196         return;
197     }
198 
199     macio_realize_ide(s, &os->ide[1],
200                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ),
201                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ),
202                       0x1a, &err);
203     if (err) {
204         error_propagate(errp, err);
205         return;
206     }
207 }
208 
209 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
210                            int index)
211 {
212     gchar *name;
213 
214     object_initialize(ide, ide_size, TYPE_MACIO_IDE);
215     qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
216     memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
217                                 &ide->mem);
218     name = g_strdup_printf("ide[%i]", index);
219     object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
220     g_free(name);
221 }
222 
223 static void macio_oldworld_init(Object *obj)
224 {
225     MacIOState *s = MACIO(obj);
226     OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
227     DeviceState *dev;
228     int i;
229 
230     object_property_add_link(obj, "pic", TYPE_HEATHROW,
231                              (Object **) &os->pic,
232                              qdev_prop_allow_set_link_before_realize,
233                              0, NULL);
234 
235     object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
236     qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
237     object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
238 
239     object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
240     dev = DEVICE(&os->nvram);
241     qdev_prop_set_uint32(dev, "size", 0x2000);
242     qdev_prop_set_uint32(dev, "it_shift", 4);
243 
244     for (i = 0; i < 2; i++) {
245         macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
246     }
247 }
248 
249 static void timer_write(void *opaque, hwaddr addr, uint64_t value,
250                        unsigned size)
251 {
252     trace_macio_timer_write(addr, size, value);
253 }
254 
255 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
256 {
257     uint32_t value = 0;
258     uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
259     uint64_t kltime;
260 
261     kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
262     kltime = muldiv64(kltime, 18432000, 1048575);
263 
264     switch (addr) {
265     case 0x38:
266         value = kltime;
267         break;
268     case 0x3c:
269         value = kltime >> 32;
270         break;
271     }
272 
273     trace_macio_timer_read(addr, size, value);
274     return value;
275 }
276 
277 static const MemoryRegionOps timer_ops = {
278     .read = timer_read,
279     .write = timer_write,
280     .endianness = DEVICE_LITTLE_ENDIAN,
281 };
282 
283 static void macio_newworld_realize(PCIDevice *d, Error **errp)
284 {
285     MacIOState *s = MACIO(d);
286     NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
287     DeviceState *pic_dev = DEVICE(ns->pic);
288     Error *err = NULL;
289     SysBusDevice *sysbus_dev;
290     MemoryRegion *timer_memory = NULL;
291 
292     macio_common_realize(d, &err);
293     if (err) {
294         error_propagate(errp, err);
295         return;
296     }
297 
298     sysbus_dev = SYS_BUS_DEVICE(&s->escc);
299     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
300                                                        NEWWORLD_ESCCB_IRQ));
301     sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
302                                                        NEWWORLD_ESCCA_IRQ));
303 
304     /* OpenPIC */
305     sysbus_dev = SYS_BUS_DEVICE(ns->pic);
306     memory_region_add_subregion(&s->bar, 0x40000,
307                                 sysbus_mmio_get_region(sysbus_dev, 0));
308 
309     /* IDE buses */
310     macio_realize_ide(s, &ns->ide[0],
311                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ),
312                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ),
313                       0x16, &err);
314     if (err) {
315         error_propagate(errp, err);
316         return;
317     }
318 
319     macio_realize_ide(s, &ns->ide[1],
320                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ),
321                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ),
322                       0x1a, &err);
323     if (err) {
324         error_propagate(errp, err);
325         return;
326     }
327 
328     /* Timer */
329     timer_memory = g_new(MemoryRegion, 1);
330     memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
331                           0x1000);
332     memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
333 
334     if (ns->has_pmu) {
335         /* GPIOs */
336         sysbus_dev = SYS_BUS_DEVICE(&ns->gpio);
337         object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic",
338                                  &error_abort);
339         memory_region_add_subregion(&s->bar, 0x50,
340                                     sysbus_mmio_get_region(sysbus_dev, 0));
341         object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err);
342 
343         /* PMU */
344         object_initialize(&s->pmu, sizeof(s->pmu), TYPE_VIA_PMU);
345         object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio",
346                                  &error_abort);
347         qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb);
348         qdev_set_parent_bus(DEVICE(&s->pmu), sysbus_get_default());
349         object_property_add_child(OBJECT(s), "pmu", OBJECT(&s->pmu), NULL);
350 
351         object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err);
352         if (err) {
353             error_propagate(errp, err);
354             return;
355         }
356         sysbus_dev = SYS_BUS_DEVICE(&s->pmu);
357         sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
358                                                            NEWWORLD_PMU_IRQ));
359         memory_region_add_subregion(&s->bar, 0x16000,
360                                     sysbus_mmio_get_region(sysbus_dev, 0));
361     } else {
362         /* CUDA */
363         object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
364         qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
365         object_property_add_child(OBJECT(s), "cuda", OBJECT(&s->cuda), NULL);
366         qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
367                              s->frequency);
368 
369         object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
370         if (err) {
371             error_propagate(errp, err);
372             return;
373         }
374         sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
375         sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
376                                                            NEWWORLD_CUDA_IRQ));
377         memory_region_add_subregion(&s->bar, 0x16000,
378                                     sysbus_mmio_get_region(sysbus_dev, 0));
379     }
380 }
381 
382 static void macio_newworld_init(Object *obj)
383 {
384     MacIOState *s = MACIO(obj);
385     NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
386     int i;
387 
388     object_property_add_link(obj, "pic", TYPE_OPENPIC,
389                              (Object **) &ns->pic,
390                              qdev_prop_allow_set_link_before_realize,
391                              0, NULL);
392 
393     object_initialize(&ns->gpio, sizeof(ns->gpio), TYPE_MACIO_GPIO);
394     qdev_set_parent_bus(DEVICE(&ns->gpio), sysbus_get_default());
395 
396     for (i = 0; i < 2; i++) {
397         macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
398     }
399 }
400 
401 static void macio_instance_init(Object *obj)
402 {
403     MacIOState *s = MACIO(obj);
404 
405     memory_region_init(&s->bar, obj, "macio", 0x80000);
406 
407     object_initialize(&s->dbdma, sizeof(s->dbdma), TYPE_MAC_DBDMA);
408     qdev_set_parent_bus(DEVICE(&s->dbdma), sysbus_get_default());
409     object_property_add_child(obj, "dbdma", OBJECT(&s->dbdma), NULL);
410 
411     object_initialize(&s->escc, sizeof(s->escc), TYPE_ESCC);
412     qdev_set_parent_bus(DEVICE(&s->escc), sysbus_get_default());
413     object_property_add_child(obj, "escc", OBJECT(&s->escc), NULL);
414 }
415 
416 static const VMStateDescription vmstate_macio_oldworld = {
417     .name = "macio-oldworld",
418     .version_id = 0,
419     .minimum_version_id = 0,
420     .fields = (VMStateField[]) {
421         VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
422         VMSTATE_END_OF_LIST()
423     }
424 };
425 
426 static void macio_oldworld_class_init(ObjectClass *oc, void *data)
427 {
428     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
429     DeviceClass *dc = DEVICE_CLASS(oc);
430 
431     pdc->realize = macio_oldworld_realize;
432     pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
433     dc->vmsd = &vmstate_macio_oldworld;
434 }
435 
436 static const VMStateDescription vmstate_macio_newworld = {
437     .name = "macio-newworld",
438     .version_id = 0,
439     .minimum_version_id = 0,
440     .fields = (VMStateField[]) {
441         VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
442         VMSTATE_END_OF_LIST()
443     }
444 };
445 
446 static Property macio_newworld_properties[] = {
447     DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false),
448     DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false),
449     DEFINE_PROP_END_OF_LIST()
450 };
451 
452 static void macio_newworld_class_init(ObjectClass *oc, void *data)
453 {
454     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
455     DeviceClass *dc = DEVICE_CLASS(oc);
456 
457     pdc->realize = macio_newworld_realize;
458     pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
459     dc->vmsd = &vmstate_macio_newworld;
460     dc->props = macio_newworld_properties;
461 }
462 
463 static Property macio_properties[] = {
464     DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
465     DEFINE_PROP_END_OF_LIST()
466 };
467 
468 static void macio_class_init(ObjectClass *klass, void *data)
469 {
470     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
471     DeviceClass *dc = DEVICE_CLASS(klass);
472 
473     k->vendor_id = PCI_VENDOR_ID_APPLE;
474     k->class_id = PCI_CLASS_OTHERS << 8;
475     dc->props = macio_properties;
476     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
477     /* Reason: Uses serial_hds in macio_instance_init */
478     dc->user_creatable = false;
479 }
480 
481 static const TypeInfo macio_oldworld_type_info = {
482     .name          = TYPE_OLDWORLD_MACIO,
483     .parent        = TYPE_MACIO,
484     .instance_size = sizeof(OldWorldMacIOState),
485     .instance_init = macio_oldworld_init,
486     .class_init    = macio_oldworld_class_init,
487 };
488 
489 static const TypeInfo macio_newworld_type_info = {
490     .name          = TYPE_NEWWORLD_MACIO,
491     .parent        = TYPE_MACIO,
492     .instance_size = sizeof(NewWorldMacIOState),
493     .instance_init = macio_newworld_init,
494     .class_init    = macio_newworld_class_init,
495 };
496 
497 static const TypeInfo macio_type_info = {
498     .name          = TYPE_MACIO,
499     .parent        = TYPE_PCI_DEVICE,
500     .instance_size = sizeof(MacIOState),
501     .instance_init = macio_instance_init,
502     .abstract      = true,
503     .class_init    = macio_class_init,
504     .interfaces = (InterfaceInfo[]) {
505         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
506         { },
507     },
508 };
509 
510 static void macio_register_types(void)
511 {
512     type_register_static(&macio_type_info);
513     type_register_static(&macio_oldworld_type_info);
514     type_register_static(&macio_newworld_type_info);
515 }
516 
517 type_init(macio_register_types)
518