1 /* 2 * PowerMac MacIO device emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 #include "qemu/osdep.h" 26 #include "qapi/error.h" 27 #include "hw/hw.h" 28 #include "hw/ppc/mac.h" 29 #include "hw/pci/pci.h" 30 #include "hw/ppc/mac_dbdma.h" 31 #include "hw/char/escc.h" 32 33 #define TYPE_MACIO "macio" 34 #define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO) 35 36 typedef struct MacIOState 37 { 38 /*< private >*/ 39 PCIDevice parent; 40 /*< public >*/ 41 42 MemoryRegion bar; 43 CUDAState cuda; 44 DBDMAState *dbdma; 45 MemoryRegion *pic_mem; 46 MemoryRegion *escc_mem; 47 uint64_t frequency; 48 } MacIOState; 49 50 #define OLDWORLD_MACIO(obj) \ 51 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO) 52 53 typedef struct OldWorldMacIOState { 54 /*< private >*/ 55 MacIOState parent_obj; 56 /*< public >*/ 57 58 qemu_irq irqs[5]; 59 60 MacIONVRAMState nvram; 61 MACIOIDEState ide[2]; 62 } OldWorldMacIOState; 63 64 #define NEWWORLD_MACIO(obj) \ 65 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO) 66 67 typedef struct NewWorldMacIOState { 68 /*< private >*/ 69 MacIOState parent_obj; 70 /*< public >*/ 71 qemu_irq irqs[5]; 72 MACIOIDEState ide[2]; 73 } NewWorldMacIOState; 74 75 /* 76 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", 77 * while the other one is the normal, current ESCC interface. 78 * 79 * The magic below creates memory aliases to spawn the escc-legacy device 80 * purely by rerouting the respective registers to our escc region. This 81 * works because the only difference between the two memory regions is the 82 * register layout, not their semantics. 83 * 84 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf 85 */ 86 static void macio_escc_legacy_setup(MacIOState *macio_state) 87 { 88 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); 89 MemoryRegion *bar = &macio_state->bar; 90 int i; 91 static const int maps[] = { 92 0x00, 0x00, /* Command B */ 93 0x02, 0x20, /* Command A */ 94 0x04, 0x10, /* Data B */ 95 0x06, 0x30, /* Data A */ 96 0x08, 0x40, /* Enhancement B */ 97 0x0A, 0x50, /* Enhancement A */ 98 0x80, 0x80, /* Recovery count */ 99 0x90, 0x90, /* Start A */ 100 0xa0, 0xa0, /* Start B */ 101 0xb0, 0xb0, /* Detect AB */ 102 }; 103 104 memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256); 105 for (i = 0; i < ARRAY_SIZE(maps); i += 2) { 106 MemoryRegion *port = g_new(MemoryRegion, 1); 107 memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port", 108 macio_state->escc_mem, maps[i+1], 0x2); 109 memory_region_add_subregion(escc_legacy, maps[i], port); 110 } 111 112 memory_region_add_subregion(bar, 0x12000, escc_legacy); 113 } 114 115 static void macio_bar_setup(MacIOState *macio_state) 116 { 117 MemoryRegion *bar = &macio_state->bar; 118 119 if (macio_state->escc_mem) { 120 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem); 121 macio_escc_legacy_setup(macio_state); 122 } 123 } 124 125 static void macio_common_realize(PCIDevice *d, Error **errp) 126 { 127 MacIOState *s = MACIO(d); 128 SysBusDevice *sysbus_dev; 129 Error *err = NULL; 130 131 object_property_set_bool(OBJECT(s->dbdma), true, "realized", &err); 132 if (err) { 133 error_propagate(errp, err); 134 return; 135 } 136 sysbus_dev = SYS_BUS_DEVICE(s->dbdma); 137 memory_region_add_subregion(&s->bar, 0x08000, 138 sysbus_mmio_get_region(sysbus_dev, 0)); 139 140 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); 141 if (err) { 142 error_propagate(errp, err); 143 return; 144 } 145 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 146 memory_region_add_subregion(&s->bar, 0x16000, 147 sysbus_mmio_get_region(sysbus_dev, 0)); 148 149 macio_bar_setup(s); 150 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); 151 } 152 153 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide, 154 qemu_irq irq0, qemu_irq irq1, int dmaid, 155 Error **errp) 156 { 157 SysBusDevice *sysbus_dev; 158 159 sysbus_dev = SYS_BUS_DEVICE(ide); 160 sysbus_connect_irq(sysbus_dev, 0, irq0); 161 sysbus_connect_irq(sysbus_dev, 1, irq1); 162 macio_ide_register_dma(ide, s->dbdma, dmaid); 163 object_property_set_bool(OBJECT(ide), true, "realized", errp); 164 } 165 166 static void macio_oldworld_realize(PCIDevice *d, Error **errp) 167 { 168 MacIOState *s = MACIO(d); 169 OldWorldMacIOState *os = OLDWORLD_MACIO(d); 170 Error *err = NULL; 171 SysBusDevice *sysbus_dev; 172 int i; 173 int cur_irq = 0; 174 175 macio_common_realize(d, &err); 176 if (err) { 177 error_propagate(errp, err); 178 return; 179 } 180 181 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 182 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]); 183 184 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err); 185 if (err) { 186 error_propagate(errp, err); 187 return; 188 } 189 sysbus_dev = SYS_BUS_DEVICE(&os->nvram); 190 memory_region_add_subregion(&s->bar, 0x60000, 191 sysbus_mmio_get_region(sysbus_dev, 0)); 192 pmac_format_nvram_partition(&os->nvram, os->nvram.size); 193 194 if (s->pic_mem) { 195 /* Heathrow PIC */ 196 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem); 197 } 198 199 /* IDE buses */ 200 for (i = 0; i < ARRAY_SIZE(os->ide); i++) { 201 qemu_irq irq0 = os->irqs[cur_irq++]; 202 qemu_irq irq1 = os->irqs[cur_irq++]; 203 204 macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err); 205 if (err) { 206 error_propagate(errp, err); 207 return; 208 } 209 } 210 } 211 212 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size, 213 int index) 214 { 215 gchar *name; 216 217 object_initialize(ide, ide_size, TYPE_MACIO_IDE); 218 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default()); 219 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000), 220 &ide->mem); 221 name = g_strdup_printf("ide[%i]", index); 222 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL); 223 g_free(name); 224 } 225 226 static void macio_oldworld_init(Object *obj) 227 { 228 MacIOState *s = MACIO(obj); 229 OldWorldMacIOState *os = OLDWORLD_MACIO(obj); 230 DeviceState *dev; 231 int i; 232 233 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs)); 234 235 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM); 236 dev = DEVICE(&os->nvram); 237 qdev_prop_set_uint32(dev, "size", 0x2000); 238 qdev_prop_set_uint32(dev, "it_shift", 4); 239 240 for (i = 0; i < 2; i++) { 241 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i); 242 } 243 } 244 245 static void timer_write(void *opaque, hwaddr addr, uint64_t value, 246 unsigned size) 247 { 248 } 249 250 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) 251 { 252 uint32_t value = 0; 253 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 254 uint64_t kltime; 255 256 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4); 257 kltime = muldiv64(kltime, 18432000, 1048575); 258 259 switch (addr) { 260 case 0x38: 261 value = kltime; 262 break; 263 case 0x3c: 264 value = kltime >> 32; 265 break; 266 } 267 268 return value; 269 } 270 271 static const MemoryRegionOps timer_ops = { 272 .read = timer_read, 273 .write = timer_write, 274 .endianness = DEVICE_LITTLE_ENDIAN, 275 }; 276 277 static void macio_newworld_realize(PCIDevice *d, Error **errp) 278 { 279 MacIOState *s = MACIO(d); 280 NewWorldMacIOState *ns = NEWWORLD_MACIO(d); 281 Error *err = NULL; 282 SysBusDevice *sysbus_dev; 283 MemoryRegion *timer_memory = NULL; 284 int i; 285 int cur_irq = 0; 286 287 macio_common_realize(d, &err); 288 if (err) { 289 error_propagate(errp, err); 290 return; 291 } 292 293 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 294 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]); 295 296 if (s->pic_mem) { 297 /* OpenPIC */ 298 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem); 299 } 300 301 /* IDE buses */ 302 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) { 303 qemu_irq irq0 = ns->irqs[cur_irq++]; 304 qemu_irq irq1 = ns->irqs[cur_irq++]; 305 306 macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err); 307 if (err) { 308 error_propagate(errp, err); 309 return; 310 } 311 } 312 313 /* Timer */ 314 timer_memory = g_new(MemoryRegion, 1); 315 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", 316 0x1000); 317 memory_region_add_subregion(&s->bar, 0x15000, timer_memory); 318 } 319 320 static void macio_newworld_init(Object *obj) 321 { 322 MacIOState *s = MACIO(obj); 323 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); 324 int i; 325 326 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs)); 327 328 for (i = 0; i < 2; i++) { 329 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i); 330 } 331 } 332 333 static void macio_instance_init(Object *obj) 334 { 335 MacIOState *s = MACIO(obj); 336 337 memory_region_init(&s->bar, obj, "macio", 0x80000); 338 339 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA); 340 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default()); 341 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL); 342 343 s->dbdma = MAC_DBDMA(object_new(TYPE_MAC_DBDMA)); 344 object_property_add_child(obj, "dbdma", OBJECT(s->dbdma), NULL); 345 } 346 347 static const VMStateDescription vmstate_macio_oldworld = { 348 .name = "macio-oldworld", 349 .version_id = 0, 350 .minimum_version_id = 0, 351 .fields = (VMStateField[]) { 352 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), 353 VMSTATE_END_OF_LIST() 354 } 355 }; 356 357 static void macio_oldworld_class_init(ObjectClass *oc, void *data) 358 { 359 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 360 DeviceClass *dc = DEVICE_CLASS(oc); 361 362 pdc->realize = macio_oldworld_realize; 363 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; 364 dc->vmsd = &vmstate_macio_oldworld; 365 } 366 367 static const VMStateDescription vmstate_macio_newworld = { 368 .name = "macio-newworld", 369 .version_id = 0, 370 .minimum_version_id = 0, 371 .fields = (VMStateField[]) { 372 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), 373 VMSTATE_END_OF_LIST() 374 } 375 }; 376 377 static void macio_newworld_class_init(ObjectClass *oc, void *data) 378 { 379 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 380 DeviceClass *dc = DEVICE_CLASS(oc); 381 382 pdc->realize = macio_newworld_realize; 383 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; 384 dc->vmsd = &vmstate_macio_newworld; 385 } 386 387 static Property macio_properties[] = { 388 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), 389 DEFINE_PROP_END_OF_LIST() 390 }; 391 392 static void macio_class_init(ObjectClass *klass, void *data) 393 { 394 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 395 DeviceClass *dc = DEVICE_CLASS(klass); 396 397 k->vendor_id = PCI_VENDOR_ID_APPLE; 398 k->class_id = PCI_CLASS_OTHERS << 8; 399 dc->props = macio_properties; 400 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 401 } 402 403 static const TypeInfo macio_oldworld_type_info = { 404 .name = TYPE_OLDWORLD_MACIO, 405 .parent = TYPE_MACIO, 406 .instance_size = sizeof(OldWorldMacIOState), 407 .instance_init = macio_oldworld_init, 408 .class_init = macio_oldworld_class_init, 409 }; 410 411 static const TypeInfo macio_newworld_type_info = { 412 .name = TYPE_NEWWORLD_MACIO, 413 .parent = TYPE_MACIO, 414 .instance_size = sizeof(NewWorldMacIOState), 415 .instance_init = macio_newworld_init, 416 .class_init = macio_newworld_class_init, 417 }; 418 419 static const TypeInfo macio_type_info = { 420 .name = TYPE_MACIO, 421 .parent = TYPE_PCI_DEVICE, 422 .instance_size = sizeof(MacIOState), 423 .instance_init = macio_instance_init, 424 .abstract = true, 425 .class_init = macio_class_init, 426 }; 427 428 static void macio_register_types(void) 429 { 430 type_register_static(&macio_type_info); 431 type_register_static(&macio_oldworld_type_info); 432 type_register_static(&macio_newworld_type_info); 433 } 434 435 type_init(macio_register_types) 436 437 void macio_init(PCIDevice *d, 438 MemoryRegion *pic_mem, 439 MemoryRegion *escc_mem) 440 { 441 MacIOState *macio_state = MACIO(d); 442 443 macio_state->pic_mem = pic_mem; 444 macio_state->escc_mem = escc_mem; 445 /* Note: this code is strongly inspirated from the corresponding code 446 in PearPC */ 447 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency", 448 macio_state->frequency); 449 450 qdev_init_nofail(DEVICE(d)); 451 } 452