1 /* 2 * PowerMac MacIO device emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "qemu/module.h" 29 #include "hw/ppc/mac.h" 30 #include "hw/misc/macio/cuda.h" 31 #include "hw/pci/pci.h" 32 #include "hw/ppc/mac_dbdma.h" 33 #include "hw/qdev-properties.h" 34 #include "migration/vmstate.h" 35 #include "hw/char/escc.h" 36 #include "hw/misc/macio/macio.h" 37 #include "hw/intc/heathrow_pic.h" 38 #include "sysemu/sysemu.h" 39 #include "trace.h" 40 41 /* Note: this code is strongly inspirated from the corresponding code 42 * in PearPC */ 43 44 /* 45 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", 46 * while the other one is the normal, current ESCC interface. 47 * 48 * The magic below creates memory aliases to spawn the escc-legacy device 49 * purely by rerouting the respective registers to our escc region. This 50 * works because the only difference between the two memory regions is the 51 * register layout, not their semantics. 52 * 53 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf 54 */ 55 static void macio_escc_legacy_setup(MacIOState *s) 56 { 57 ESCCState *escc = ESCC(&s->escc); 58 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 59 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); 60 MemoryRegion *bar = &s->bar; 61 int i; 62 static const int maps[] = { 63 0x00, 0x00, /* Command B */ 64 0x02, 0x20, /* Command A */ 65 0x04, 0x10, /* Data B */ 66 0x06, 0x30, /* Data A */ 67 0x08, 0x40, /* Enhancement B */ 68 0x0A, 0x50, /* Enhancement A */ 69 0x80, 0x80, /* Recovery count */ 70 0x90, 0x90, /* Start A */ 71 0xa0, 0xa0, /* Start B */ 72 0xb0, 0xb0, /* Detect AB */ 73 }; 74 75 memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256); 76 for (i = 0; i < ARRAY_SIZE(maps); i += 2) { 77 MemoryRegion *port = g_new(MemoryRegion, 1); 78 memory_region_init_alias(port, OBJECT(s), "escc-legacy-port", 79 sysbus_mmio_get_region(sbd, 0), 80 maps[i + 1], 0x2); 81 memory_region_add_subregion(escc_legacy, maps[i], port); 82 } 83 84 memory_region_add_subregion(bar, 0x12000, escc_legacy); 85 } 86 87 static void macio_bar_setup(MacIOState *s) 88 { 89 ESCCState *escc = ESCC(&s->escc); 90 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 91 MemoryRegion *bar = &s->bar; 92 93 memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0)); 94 macio_escc_legacy_setup(s); 95 } 96 97 static void macio_common_realize(PCIDevice *d, Error **errp) 98 { 99 MacIOState *s = MACIO(d); 100 SysBusDevice *sysbus_dev; 101 Error *err = NULL; 102 103 qdev_realize(DEVICE(&s->dbdma), BUS(&s->macio_bus), &err); 104 if (err) { 105 error_propagate(errp, err); 106 return; 107 } 108 sysbus_dev = SYS_BUS_DEVICE(&s->dbdma); 109 memory_region_add_subregion(&s->bar, 0x08000, 110 sysbus_mmio_get_region(sysbus_dev, 0)); 111 112 qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0); 113 qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK); 114 qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4); 115 qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0)); 116 qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1)); 117 qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); 118 qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); 119 qdev_realize(DEVICE(&s->escc), BUS(&s->macio_bus), &err); 120 if (err) { 121 error_propagate(errp, err); 122 return; 123 } 124 125 macio_bar_setup(s); 126 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); 127 } 128 129 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide, 130 qemu_irq irq0, qemu_irq irq1, int dmaid, 131 Error **errp) 132 { 133 SysBusDevice *sysbus_dev; 134 135 sysbus_dev = SYS_BUS_DEVICE(ide); 136 sysbus_connect_irq(sysbus_dev, 0, irq0); 137 sysbus_connect_irq(sysbus_dev, 1, irq1); 138 qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid); 139 object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", 140 &error_abort); 141 macio_ide_register_dma(ide); 142 143 qdev_realize(DEVICE(ide), BUS(&s->macio_bus), errp); 144 } 145 146 static void macio_oldworld_realize(PCIDevice *d, Error **errp) 147 { 148 MacIOState *s = MACIO(d); 149 OldWorldMacIOState *os = OLDWORLD_MACIO(d); 150 DeviceState *pic_dev = DEVICE(os->pic); 151 Error *err = NULL; 152 SysBusDevice *sysbus_dev; 153 154 macio_common_realize(d, &err); 155 if (err) { 156 error_propagate(errp, err); 157 return; 158 } 159 160 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 161 s->frequency); 162 qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err); 163 if (err) { 164 error_propagate(errp, err); 165 return; 166 } 167 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 168 memory_region_add_subregion(&s->bar, 0x16000, 169 sysbus_mmio_get_region(sysbus_dev, 0)); 170 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 171 OLDWORLD_CUDA_IRQ)); 172 173 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 174 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 175 OLDWORLD_ESCCB_IRQ)); 176 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 177 OLDWORLD_ESCCA_IRQ)); 178 179 qdev_realize(DEVICE(&os->nvram), BUS(&s->macio_bus), &err); 180 if (err) { 181 error_propagate(errp, err); 182 return; 183 } 184 sysbus_dev = SYS_BUS_DEVICE(&os->nvram); 185 memory_region_add_subregion(&s->bar, 0x60000, 186 sysbus_mmio_get_region(sysbus_dev, 0)); 187 pmac_format_nvram_partition(&os->nvram, os->nvram.size); 188 189 /* Heathrow PIC */ 190 sysbus_dev = SYS_BUS_DEVICE(os->pic); 191 memory_region_add_subregion(&s->bar, 0x0, 192 sysbus_mmio_get_region(sysbus_dev, 0)); 193 194 /* IDE buses */ 195 macio_realize_ide(s, &os->ide[0], 196 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ), 197 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ), 198 0x16, &err); 199 if (err) { 200 error_propagate(errp, err); 201 return; 202 } 203 204 macio_realize_ide(s, &os->ide[1], 205 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ), 206 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ), 207 0x1a, &err); 208 if (err) { 209 error_propagate(errp, err); 210 return; 211 } 212 } 213 214 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index) 215 { 216 gchar *name = g_strdup_printf("ide[%i]", index); 217 uint32_t addr = 0x1f000 + ((index + 1) * 0x1000); 218 219 object_initialize_child(OBJECT(s), name, ide, TYPE_MACIO_IDE); 220 qdev_prop_set_uint32(DEVICE(ide), "addr", addr); 221 memory_region_add_subregion(&s->bar, addr, &ide->mem); 222 g_free(name); 223 } 224 225 static void macio_oldworld_init(Object *obj) 226 { 227 MacIOState *s = MACIO(obj); 228 OldWorldMacIOState *os = OLDWORLD_MACIO(obj); 229 DeviceState *dev; 230 int i; 231 232 object_property_add_link(obj, "pic", TYPE_HEATHROW, 233 (Object **) &os->pic, 234 qdev_prop_allow_set_link_before_realize, 235 0); 236 237 object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); 238 239 object_initialize_child(OBJECT(s), "nvram", &os->nvram, TYPE_MACIO_NVRAM); 240 dev = DEVICE(&os->nvram); 241 qdev_prop_set_uint32(dev, "size", 0x2000); 242 qdev_prop_set_uint32(dev, "it_shift", 4); 243 244 for (i = 0; i < 2; i++) { 245 macio_init_ide(s, &os->ide[i], i); 246 } 247 } 248 249 static void timer_write(void *opaque, hwaddr addr, uint64_t value, 250 unsigned size) 251 { 252 trace_macio_timer_write(addr, size, value); 253 } 254 255 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) 256 { 257 uint32_t value = 0; 258 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 259 uint64_t kltime; 260 261 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4); 262 kltime = muldiv64(kltime, 18432000, 1048575); 263 264 switch (addr) { 265 case 0x38: 266 value = kltime; 267 break; 268 case 0x3c: 269 value = kltime >> 32; 270 break; 271 } 272 273 trace_macio_timer_read(addr, size, value); 274 return value; 275 } 276 277 static const MemoryRegionOps timer_ops = { 278 .read = timer_read, 279 .write = timer_write, 280 .endianness = DEVICE_LITTLE_ENDIAN, 281 }; 282 283 static void macio_newworld_realize(PCIDevice *d, Error **errp) 284 { 285 MacIOState *s = MACIO(d); 286 NewWorldMacIOState *ns = NEWWORLD_MACIO(d); 287 DeviceState *pic_dev = DEVICE(ns->pic); 288 Error *err = NULL; 289 SysBusDevice *sysbus_dev; 290 MemoryRegion *timer_memory = NULL; 291 292 macio_common_realize(d, &err); 293 if (err) { 294 error_propagate(errp, err); 295 return; 296 } 297 298 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 299 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 300 NEWWORLD_ESCCB_IRQ)); 301 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 302 NEWWORLD_ESCCA_IRQ)); 303 304 /* OpenPIC */ 305 sysbus_dev = SYS_BUS_DEVICE(ns->pic); 306 memory_region_add_subregion(&s->bar, 0x40000, 307 sysbus_mmio_get_region(sysbus_dev, 0)); 308 309 /* IDE buses */ 310 macio_realize_ide(s, &ns->ide[0], 311 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ), 312 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ), 313 0x16, &err); 314 if (err) { 315 error_propagate(errp, err); 316 return; 317 } 318 319 macio_realize_ide(s, &ns->ide[1], 320 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ), 321 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ), 322 0x1a, &err); 323 if (err) { 324 error_propagate(errp, err); 325 return; 326 } 327 328 /* Timer */ 329 timer_memory = g_new(MemoryRegion, 1); 330 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", 331 0x1000); 332 memory_region_add_subregion(&s->bar, 0x15000, timer_memory); 333 334 if (ns->has_pmu) { 335 /* GPIOs */ 336 sysbus_dev = SYS_BUS_DEVICE(&ns->gpio); 337 object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic", 338 &error_abort); 339 memory_region_add_subregion(&s->bar, 0x50, 340 sysbus_mmio_get_region(sysbus_dev, 0)); 341 qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), &err); 342 343 /* PMU */ 344 object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU); 345 object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio", 346 &error_abort); 347 qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); 348 qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), &err); 349 if (err) { 350 error_propagate(errp, err); 351 return; 352 } 353 sysbus_dev = SYS_BUS_DEVICE(&s->pmu); 354 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 355 NEWWORLD_PMU_IRQ)); 356 memory_region_add_subregion(&s->bar, 0x16000, 357 sysbus_mmio_get_region(sysbus_dev, 0)); 358 } else { 359 object_unparent(OBJECT(&ns->gpio)); 360 361 /* CUDA */ 362 object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); 363 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 364 s->frequency); 365 366 qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err); 367 if (err) { 368 error_propagate(errp, err); 369 return; 370 } 371 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 372 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 373 NEWWORLD_CUDA_IRQ)); 374 memory_region_add_subregion(&s->bar, 0x16000, 375 sysbus_mmio_get_region(sysbus_dev, 0)); 376 } 377 } 378 379 static void macio_newworld_init(Object *obj) 380 { 381 MacIOState *s = MACIO(obj); 382 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); 383 int i; 384 385 object_property_add_link(obj, "pic", TYPE_OPENPIC, 386 (Object **) &ns->pic, 387 qdev_prop_allow_set_link_before_realize, 388 0); 389 390 object_initialize_child(OBJECT(s), "gpio", &ns->gpio, TYPE_MACIO_GPIO); 391 392 for (i = 0; i < 2; i++) { 393 macio_init_ide(s, &ns->ide[i], i); 394 } 395 } 396 397 static void macio_instance_init(Object *obj) 398 { 399 MacIOState *s = MACIO(obj); 400 401 memory_region_init(&s->bar, obj, "macio", 0x80000); 402 403 qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS, 404 DEVICE(obj), "macio.0"); 405 406 object_initialize_child(OBJECT(s), "dbdma", &s->dbdma, TYPE_MAC_DBDMA); 407 408 object_initialize_child(OBJECT(s), "escc", &s->escc, TYPE_ESCC); 409 } 410 411 static const VMStateDescription vmstate_macio_oldworld = { 412 .name = "macio-oldworld", 413 .version_id = 0, 414 .minimum_version_id = 0, 415 .fields = (VMStateField[]) { 416 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), 417 VMSTATE_END_OF_LIST() 418 } 419 }; 420 421 static void macio_oldworld_class_init(ObjectClass *oc, void *data) 422 { 423 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 424 DeviceClass *dc = DEVICE_CLASS(oc); 425 426 pdc->realize = macio_oldworld_realize; 427 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; 428 dc->vmsd = &vmstate_macio_oldworld; 429 } 430 431 static const VMStateDescription vmstate_macio_newworld = { 432 .name = "macio-newworld", 433 .version_id = 0, 434 .minimum_version_id = 0, 435 .fields = (VMStateField[]) { 436 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), 437 VMSTATE_END_OF_LIST() 438 } 439 }; 440 441 static Property macio_newworld_properties[] = { 442 DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false), 443 DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false), 444 DEFINE_PROP_END_OF_LIST() 445 }; 446 447 static void macio_newworld_class_init(ObjectClass *oc, void *data) 448 { 449 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 450 DeviceClass *dc = DEVICE_CLASS(oc); 451 452 pdc->realize = macio_newworld_realize; 453 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; 454 dc->vmsd = &vmstate_macio_newworld; 455 device_class_set_props(dc, macio_newworld_properties); 456 } 457 458 static Property macio_properties[] = { 459 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), 460 DEFINE_PROP_END_OF_LIST() 461 }; 462 463 static void macio_class_init(ObjectClass *klass, void *data) 464 { 465 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 466 DeviceClass *dc = DEVICE_CLASS(klass); 467 468 k->vendor_id = PCI_VENDOR_ID_APPLE; 469 k->class_id = PCI_CLASS_OTHERS << 8; 470 device_class_set_props(dc, macio_properties); 471 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 472 /* Reason: Uses serial_hds in macio_instance_init */ 473 dc->user_creatable = false; 474 } 475 476 static const TypeInfo macio_bus_info = { 477 .name = TYPE_MACIO_BUS, 478 .parent = TYPE_SYSTEM_BUS, 479 .instance_size = sizeof(MacIOBusState), 480 }; 481 482 static const TypeInfo macio_oldworld_type_info = { 483 .name = TYPE_OLDWORLD_MACIO, 484 .parent = TYPE_MACIO, 485 .instance_size = sizeof(OldWorldMacIOState), 486 .instance_init = macio_oldworld_init, 487 .class_init = macio_oldworld_class_init, 488 }; 489 490 static const TypeInfo macio_newworld_type_info = { 491 .name = TYPE_NEWWORLD_MACIO, 492 .parent = TYPE_MACIO, 493 .instance_size = sizeof(NewWorldMacIOState), 494 .instance_init = macio_newworld_init, 495 .class_init = macio_newworld_class_init, 496 }; 497 498 static const TypeInfo macio_type_info = { 499 .name = TYPE_MACIO, 500 .parent = TYPE_PCI_DEVICE, 501 .instance_size = sizeof(MacIOState), 502 .instance_init = macio_instance_init, 503 .abstract = true, 504 .class_init = macio_class_init, 505 .interfaces = (InterfaceInfo[]) { 506 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 507 { }, 508 }, 509 }; 510 511 static void macio_register_types(void) 512 { 513 type_register_static(&macio_bus_info); 514 type_register_static(&macio_type_info); 515 type_register_static(&macio_oldworld_type_info); 516 type_register_static(&macio_newworld_type_info); 517 } 518 519 type_init(macio_register_types) 520