1 /* 2 * PowerMac MacIO device emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 #include "qemu/osdep.h" 26 #include "hw/hw.h" 27 #include "hw/ppc/mac.h" 28 #include "hw/pci/pci.h" 29 #include "hw/ppc/mac_dbdma.h" 30 #include "hw/char/escc.h" 31 32 #define TYPE_MACIO "macio" 33 #define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO) 34 35 typedef struct MacIOState 36 { 37 /*< private >*/ 38 PCIDevice parent; 39 /*< public >*/ 40 41 MemoryRegion bar; 42 CUDAState cuda; 43 void *dbdma; 44 MemoryRegion *pic_mem; 45 MemoryRegion *escc_mem; 46 uint64_t frequency; 47 } MacIOState; 48 49 #define OLDWORLD_MACIO(obj) \ 50 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO) 51 52 typedef struct OldWorldMacIOState { 53 /*< private >*/ 54 MacIOState parent_obj; 55 /*< public >*/ 56 57 qemu_irq irqs[5]; 58 59 MacIONVRAMState nvram; 60 MACIOIDEState ide[2]; 61 } OldWorldMacIOState; 62 63 #define NEWWORLD_MACIO(obj) \ 64 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO) 65 66 typedef struct NewWorldMacIOState { 67 /*< private >*/ 68 MacIOState parent_obj; 69 /*< public >*/ 70 qemu_irq irqs[5]; 71 MACIOIDEState ide[2]; 72 } NewWorldMacIOState; 73 74 /* 75 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", 76 * while the other one is the normal, current ESCC interface. 77 * 78 * The magic below creates memory aliases to spawn the escc-legacy device 79 * purely by rerouting the respective registers to our escc region. This 80 * works because the only difference between the two memory regions is the 81 * register layout, not their semantics. 82 * 83 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf 84 */ 85 static void macio_escc_legacy_setup(MacIOState *macio_state) 86 { 87 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); 88 MemoryRegion *bar = &macio_state->bar; 89 int i; 90 static const int maps[] = { 91 0x00, 0x00, 92 0x02, 0x20, 93 0x04, 0x10, 94 0x06, 0x30, 95 0x08, 0x40, 96 0x0A, 0x50, 97 0x60, 0x60, 98 0x70, 0x70, 99 0x80, 0x70, 100 0x90, 0x80, 101 0xA0, 0x90, 102 0xB0, 0xA0, 103 0xC0, 0xB0, 104 0xD0, 0xC0, 105 0xE0, 0xD0, 106 0xF0, 0xE0, 107 }; 108 109 memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256); 110 for (i = 0; i < ARRAY_SIZE(maps); i += 2) { 111 MemoryRegion *port = g_new(MemoryRegion, 1); 112 memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port", 113 macio_state->escc_mem, maps[i+1], 0x2); 114 memory_region_add_subregion(escc_legacy, maps[i], port); 115 } 116 117 memory_region_add_subregion(bar, 0x12000, escc_legacy); 118 } 119 120 static void macio_bar_setup(MacIOState *macio_state) 121 { 122 MemoryRegion *bar = &macio_state->bar; 123 124 if (macio_state->escc_mem) { 125 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem); 126 macio_escc_legacy_setup(macio_state); 127 } 128 } 129 130 static void macio_common_realize(PCIDevice *d, Error **errp) 131 { 132 MacIOState *s = MACIO(d); 133 SysBusDevice *sysbus_dev; 134 Error *err = NULL; 135 MemoryRegion *dbdma_mem; 136 137 s->dbdma = DBDMA_init(&dbdma_mem); 138 memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem); 139 140 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); 141 if (err) { 142 error_propagate(errp, err); 143 return; 144 } 145 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 146 memory_region_add_subregion(&s->bar, 0x16000, 147 sysbus_mmio_get_region(sysbus_dev, 0)); 148 149 macio_bar_setup(s); 150 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); 151 } 152 153 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide, 154 qemu_irq irq0, qemu_irq irq1, int dmaid, 155 Error **errp) 156 { 157 SysBusDevice *sysbus_dev; 158 159 sysbus_dev = SYS_BUS_DEVICE(ide); 160 sysbus_connect_irq(sysbus_dev, 0, irq0); 161 sysbus_connect_irq(sysbus_dev, 1, irq1); 162 macio_ide_register_dma(ide, s->dbdma, dmaid); 163 object_property_set_bool(OBJECT(ide), true, "realized", errp); 164 } 165 166 static void macio_oldworld_realize(PCIDevice *d, Error **errp) 167 { 168 MacIOState *s = MACIO(d); 169 OldWorldMacIOState *os = OLDWORLD_MACIO(d); 170 Error *err = NULL; 171 SysBusDevice *sysbus_dev; 172 int i; 173 int cur_irq = 0; 174 175 macio_common_realize(d, &err); 176 if (err) { 177 error_propagate(errp, err); 178 return; 179 } 180 181 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 182 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]); 183 184 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err); 185 if (err) { 186 error_propagate(errp, err); 187 return; 188 } 189 sysbus_dev = SYS_BUS_DEVICE(&os->nvram); 190 memory_region_add_subregion(&s->bar, 0x60000, 191 sysbus_mmio_get_region(sysbus_dev, 0)); 192 pmac_format_nvram_partition(&os->nvram, os->nvram.size); 193 194 if (s->pic_mem) { 195 /* Heathrow PIC */ 196 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem); 197 } 198 199 /* IDE buses */ 200 for (i = 0; i < ARRAY_SIZE(os->ide); i++) { 201 qemu_irq irq0 = os->irqs[cur_irq++]; 202 qemu_irq irq1 = os->irqs[cur_irq++]; 203 204 macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err); 205 if (err) { 206 error_propagate(errp, err); 207 return; 208 } 209 } 210 } 211 212 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size, 213 int index) 214 { 215 gchar *name; 216 217 object_initialize(ide, ide_size, TYPE_MACIO_IDE); 218 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default()); 219 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000), 220 &ide->mem); 221 name = g_strdup_printf("ide[%i]", index); 222 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL); 223 g_free(name); 224 } 225 226 static void macio_oldworld_init(Object *obj) 227 { 228 MacIOState *s = MACIO(obj); 229 OldWorldMacIOState *os = OLDWORLD_MACIO(obj); 230 DeviceState *dev; 231 int i; 232 233 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs)); 234 235 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM); 236 dev = DEVICE(&os->nvram); 237 qdev_prop_set_uint32(dev, "size", 0x2000); 238 qdev_prop_set_uint32(dev, "it_shift", 4); 239 240 for (i = 0; i < 2; i++) { 241 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i); 242 } 243 } 244 245 static void timer_write(void *opaque, hwaddr addr, uint64_t value, 246 unsigned size) 247 { 248 } 249 250 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) 251 { 252 uint32_t value = 0; 253 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 254 uint64_t kltime; 255 256 kltime = muldiv64(systime, 4194300, get_ticks_per_sec() * 4); 257 kltime = muldiv64(kltime, 18432000, 1048575); 258 259 switch (addr) { 260 case 0x38: 261 value = kltime; 262 break; 263 case 0x3c: 264 value = kltime >> 32; 265 break; 266 } 267 268 return value; 269 } 270 271 static const MemoryRegionOps timer_ops = { 272 .read = timer_read, 273 .write = timer_write, 274 .endianness = DEVICE_LITTLE_ENDIAN, 275 }; 276 277 static void macio_newworld_realize(PCIDevice *d, Error **errp) 278 { 279 MacIOState *s = MACIO(d); 280 NewWorldMacIOState *ns = NEWWORLD_MACIO(d); 281 Error *err = NULL; 282 SysBusDevice *sysbus_dev; 283 MemoryRegion *timer_memory = NULL; 284 int i; 285 int cur_irq = 0; 286 287 macio_common_realize(d, &err); 288 if (err) { 289 error_propagate(errp, err); 290 return; 291 } 292 293 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 294 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]); 295 296 if (s->pic_mem) { 297 /* OpenPIC */ 298 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem); 299 } 300 301 /* IDE buses */ 302 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) { 303 qemu_irq irq0 = ns->irqs[cur_irq++]; 304 qemu_irq irq1 = ns->irqs[cur_irq++]; 305 306 macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err); 307 if (err) { 308 error_propagate(errp, err); 309 return; 310 } 311 } 312 313 /* Timer */ 314 timer_memory = g_new(MemoryRegion, 1); 315 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", 316 0x1000); 317 memory_region_add_subregion(&s->bar, 0x15000, timer_memory); 318 } 319 320 static void macio_newworld_init(Object *obj) 321 { 322 MacIOState *s = MACIO(obj); 323 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); 324 int i; 325 326 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs)); 327 328 for (i = 0; i < 2; i++) { 329 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i); 330 } 331 } 332 333 static void macio_instance_init(Object *obj) 334 { 335 MacIOState *s = MACIO(obj); 336 337 memory_region_init(&s->bar, obj, "macio", 0x80000); 338 339 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA); 340 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default()); 341 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL); 342 } 343 344 static const VMStateDescription vmstate_macio_oldworld = { 345 .name = "macio-oldworld", 346 .version_id = 0, 347 .minimum_version_id = 0, 348 .fields = (VMStateField[]) { 349 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), 350 VMSTATE_END_OF_LIST() 351 } 352 }; 353 354 static void macio_oldworld_class_init(ObjectClass *oc, void *data) 355 { 356 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 357 DeviceClass *dc = DEVICE_CLASS(oc); 358 359 pdc->realize = macio_oldworld_realize; 360 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; 361 dc->vmsd = &vmstate_macio_oldworld; 362 } 363 364 static const VMStateDescription vmstate_macio_newworld = { 365 .name = "macio-newworld", 366 .version_id = 0, 367 .minimum_version_id = 0, 368 .fields = (VMStateField[]) { 369 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), 370 VMSTATE_END_OF_LIST() 371 } 372 }; 373 374 static void macio_newworld_class_init(ObjectClass *oc, void *data) 375 { 376 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 377 DeviceClass *dc = DEVICE_CLASS(oc); 378 379 pdc->realize = macio_newworld_realize; 380 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; 381 dc->vmsd = &vmstate_macio_newworld; 382 } 383 384 static Property macio_properties[] = { 385 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), 386 DEFINE_PROP_END_OF_LIST() 387 }; 388 389 static void macio_class_init(ObjectClass *klass, void *data) 390 { 391 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 392 DeviceClass *dc = DEVICE_CLASS(klass); 393 394 k->vendor_id = PCI_VENDOR_ID_APPLE; 395 k->class_id = PCI_CLASS_OTHERS << 8; 396 dc->props = macio_properties; 397 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 398 } 399 400 static const TypeInfo macio_oldworld_type_info = { 401 .name = TYPE_OLDWORLD_MACIO, 402 .parent = TYPE_MACIO, 403 .instance_size = sizeof(OldWorldMacIOState), 404 .instance_init = macio_oldworld_init, 405 .class_init = macio_oldworld_class_init, 406 }; 407 408 static const TypeInfo macio_newworld_type_info = { 409 .name = TYPE_NEWWORLD_MACIO, 410 .parent = TYPE_MACIO, 411 .instance_size = sizeof(NewWorldMacIOState), 412 .instance_init = macio_newworld_init, 413 .class_init = macio_newworld_class_init, 414 }; 415 416 static const TypeInfo macio_type_info = { 417 .name = TYPE_MACIO, 418 .parent = TYPE_PCI_DEVICE, 419 .instance_size = sizeof(MacIOState), 420 .instance_init = macio_instance_init, 421 .abstract = true, 422 .class_init = macio_class_init, 423 }; 424 425 static void macio_register_types(void) 426 { 427 type_register_static(&macio_type_info); 428 type_register_static(&macio_oldworld_type_info); 429 type_register_static(&macio_newworld_type_info); 430 } 431 432 type_init(macio_register_types) 433 434 void macio_init(PCIDevice *d, 435 MemoryRegion *pic_mem, 436 MemoryRegion *escc_mem) 437 { 438 MacIOState *macio_state = MACIO(d); 439 440 macio_state->pic_mem = pic_mem; 441 macio_state->escc_mem = escc_mem; 442 /* Note: this code is strongly inspirated from the corresponding code 443 in PearPC */ 444 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency", 445 macio_state->frequency); 446 447 qdev_init_nofail(DEVICE(d)); 448 } 449