1 /* 2 * PowerMac MacIO device emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 #include "qemu/osdep.h" 26 #include "qapi/error.h" 27 #include "hw/hw.h" 28 #include "hw/ppc/mac.h" 29 #include "hw/misc/macio/cuda.h" 30 #include "hw/pci/pci.h" 31 #include "hw/ppc/mac_dbdma.h" 32 #include "hw/char/escc.h" 33 #include "hw/misc/macio/macio.h" 34 #include "hw/intc/heathrow_pic.h" 35 #include "trace.h" 36 37 /* Note: this code is strongly inspirated from the corresponding code 38 * in PearPC */ 39 40 /* 41 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", 42 * while the other one is the normal, current ESCC interface. 43 * 44 * The magic below creates memory aliases to spawn the escc-legacy device 45 * purely by rerouting the respective registers to our escc region. This 46 * works because the only difference between the two memory regions is the 47 * register layout, not their semantics. 48 * 49 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf 50 */ 51 static void macio_escc_legacy_setup(MacIOState *s) 52 { 53 ESCCState *escc = ESCC(&s->escc); 54 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 55 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); 56 MemoryRegion *bar = &s->bar; 57 int i; 58 static const int maps[] = { 59 0x00, 0x00, /* Command B */ 60 0x02, 0x20, /* Command A */ 61 0x04, 0x10, /* Data B */ 62 0x06, 0x30, /* Data A */ 63 0x08, 0x40, /* Enhancement B */ 64 0x0A, 0x50, /* Enhancement A */ 65 0x80, 0x80, /* Recovery count */ 66 0x90, 0x90, /* Start A */ 67 0xa0, 0xa0, /* Start B */ 68 0xb0, 0xb0, /* Detect AB */ 69 }; 70 71 memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256); 72 for (i = 0; i < ARRAY_SIZE(maps); i += 2) { 73 MemoryRegion *port = g_new(MemoryRegion, 1); 74 memory_region_init_alias(port, OBJECT(s), "escc-legacy-port", 75 sysbus_mmio_get_region(sbd, 0), 76 maps[i + 1], 0x2); 77 memory_region_add_subregion(escc_legacy, maps[i], port); 78 } 79 80 memory_region_add_subregion(bar, 0x12000, escc_legacy); 81 } 82 83 static void macio_bar_setup(MacIOState *s) 84 { 85 ESCCState *escc = ESCC(&s->escc); 86 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 87 MemoryRegion *bar = &s->bar; 88 89 memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0)); 90 macio_escc_legacy_setup(s); 91 } 92 93 static void macio_init_child_obj(MacIOState *s, const char *childname, 94 void *child, size_t childsize, 95 const char *childtype) 96 { 97 object_initialize_child(OBJECT(s), childname, child, childsize, childtype, 98 &error_abort, NULL); 99 qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus)); 100 } 101 102 static void macio_common_realize(PCIDevice *d, Error **errp) 103 { 104 MacIOState *s = MACIO(d); 105 SysBusDevice *sysbus_dev; 106 Error *err = NULL; 107 108 object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err); 109 if (err) { 110 error_propagate(errp, err); 111 return; 112 } 113 sysbus_dev = SYS_BUS_DEVICE(&s->dbdma); 114 memory_region_add_subregion(&s->bar, 0x08000, 115 sysbus_mmio_get_region(sysbus_dev, 0)); 116 117 qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0); 118 qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK); 119 qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4); 120 qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0)); 121 qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1)); 122 qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); 123 qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); 124 object_property_set_bool(OBJECT(&s->escc), true, "realized", &err); 125 if (err) { 126 error_propagate(errp, err); 127 return; 128 } 129 130 macio_bar_setup(s); 131 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); 132 } 133 134 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide, 135 qemu_irq irq0, qemu_irq irq1, int dmaid, 136 Error **errp) 137 { 138 SysBusDevice *sysbus_dev; 139 140 sysbus_dev = SYS_BUS_DEVICE(ide); 141 sysbus_connect_irq(sysbus_dev, 0, irq0); 142 sysbus_connect_irq(sysbus_dev, 1, irq1); 143 qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid); 144 object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp); 145 macio_ide_register_dma(ide); 146 147 object_property_set_bool(OBJECT(ide), true, "realized", errp); 148 } 149 150 static void macio_oldworld_realize(PCIDevice *d, Error **errp) 151 { 152 MacIOState *s = MACIO(d); 153 OldWorldMacIOState *os = OLDWORLD_MACIO(d); 154 DeviceState *pic_dev = DEVICE(os->pic); 155 Error *err = NULL; 156 SysBusDevice *sysbus_dev; 157 158 macio_common_realize(d, &err); 159 if (err) { 160 error_propagate(errp, err); 161 return; 162 } 163 164 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 165 s->frequency); 166 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); 167 if (err) { 168 error_propagate(errp, err); 169 return; 170 } 171 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 172 memory_region_add_subregion(&s->bar, 0x16000, 173 sysbus_mmio_get_region(sysbus_dev, 0)); 174 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 175 OLDWORLD_CUDA_IRQ)); 176 177 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 178 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 179 OLDWORLD_ESCCB_IRQ)); 180 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 181 OLDWORLD_ESCCA_IRQ)); 182 183 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err); 184 if (err) { 185 error_propagate(errp, err); 186 return; 187 } 188 sysbus_dev = SYS_BUS_DEVICE(&os->nvram); 189 memory_region_add_subregion(&s->bar, 0x60000, 190 sysbus_mmio_get_region(sysbus_dev, 0)); 191 pmac_format_nvram_partition(&os->nvram, os->nvram.size); 192 193 /* Heathrow PIC */ 194 sysbus_dev = SYS_BUS_DEVICE(os->pic); 195 memory_region_add_subregion(&s->bar, 0x0, 196 sysbus_mmio_get_region(sysbus_dev, 0)); 197 198 /* IDE buses */ 199 macio_realize_ide(s, &os->ide[0], 200 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ), 201 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ), 202 0x16, &err); 203 if (err) { 204 error_propagate(errp, err); 205 return; 206 } 207 208 macio_realize_ide(s, &os->ide[1], 209 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ), 210 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ), 211 0x1a, &err); 212 if (err) { 213 error_propagate(errp, err); 214 return; 215 } 216 } 217 218 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size, 219 int index) 220 { 221 gchar *name = g_strdup_printf("ide[%i]", index); 222 uint32_t addr = 0x1f000 + ((index + 1) * 0x1000); 223 224 macio_init_child_obj(s, name, ide, ide_size, TYPE_MACIO_IDE); 225 qdev_prop_set_uint32(DEVICE(ide), "addr", addr); 226 memory_region_add_subregion(&s->bar, addr, &ide->mem); 227 g_free(name); 228 } 229 230 static void macio_oldworld_init(Object *obj) 231 { 232 MacIOState *s = MACIO(obj); 233 OldWorldMacIOState *os = OLDWORLD_MACIO(obj); 234 DeviceState *dev; 235 int i; 236 237 object_property_add_link(obj, "pic", TYPE_HEATHROW, 238 (Object **) &os->pic, 239 qdev_prop_allow_set_link_before_realize, 240 0, NULL); 241 242 macio_init_child_obj(s, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA); 243 244 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM); 245 dev = DEVICE(&os->nvram); 246 qdev_prop_set_uint32(dev, "size", 0x2000); 247 qdev_prop_set_uint32(dev, "it_shift", 4); 248 249 for (i = 0; i < 2; i++) { 250 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i); 251 } 252 } 253 254 static void timer_write(void *opaque, hwaddr addr, uint64_t value, 255 unsigned size) 256 { 257 trace_macio_timer_write(addr, size, value); 258 } 259 260 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) 261 { 262 uint32_t value = 0; 263 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 264 uint64_t kltime; 265 266 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4); 267 kltime = muldiv64(kltime, 18432000, 1048575); 268 269 switch (addr) { 270 case 0x38: 271 value = kltime; 272 break; 273 case 0x3c: 274 value = kltime >> 32; 275 break; 276 } 277 278 trace_macio_timer_read(addr, size, value); 279 return value; 280 } 281 282 static const MemoryRegionOps timer_ops = { 283 .read = timer_read, 284 .write = timer_write, 285 .endianness = DEVICE_LITTLE_ENDIAN, 286 }; 287 288 static void macio_newworld_realize(PCIDevice *d, Error **errp) 289 { 290 MacIOState *s = MACIO(d); 291 NewWorldMacIOState *ns = NEWWORLD_MACIO(d); 292 DeviceState *pic_dev = DEVICE(ns->pic); 293 Error *err = NULL; 294 SysBusDevice *sysbus_dev; 295 MemoryRegion *timer_memory = NULL; 296 297 macio_common_realize(d, &err); 298 if (err) { 299 error_propagate(errp, err); 300 return; 301 } 302 303 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 304 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 305 NEWWORLD_ESCCB_IRQ)); 306 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 307 NEWWORLD_ESCCA_IRQ)); 308 309 /* OpenPIC */ 310 sysbus_dev = SYS_BUS_DEVICE(ns->pic); 311 memory_region_add_subregion(&s->bar, 0x40000, 312 sysbus_mmio_get_region(sysbus_dev, 0)); 313 314 /* IDE buses */ 315 macio_realize_ide(s, &ns->ide[0], 316 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ), 317 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ), 318 0x16, &err); 319 if (err) { 320 error_propagate(errp, err); 321 return; 322 } 323 324 macio_realize_ide(s, &ns->ide[1], 325 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ), 326 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ), 327 0x1a, &err); 328 if (err) { 329 error_propagate(errp, err); 330 return; 331 } 332 333 /* Timer */ 334 timer_memory = g_new(MemoryRegion, 1); 335 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", 336 0x1000); 337 memory_region_add_subregion(&s->bar, 0x15000, timer_memory); 338 339 if (ns->has_pmu) { 340 /* GPIOs */ 341 sysbus_dev = SYS_BUS_DEVICE(&ns->gpio); 342 object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic", 343 &error_abort); 344 memory_region_add_subregion(&s->bar, 0x50, 345 sysbus_mmio_get_region(sysbus_dev, 0)); 346 object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err); 347 348 /* PMU */ 349 object_initialize(&s->pmu, sizeof(s->pmu), TYPE_VIA_PMU); 350 object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio", 351 &error_abort); 352 qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); 353 qdev_set_parent_bus(DEVICE(&s->pmu), BUS(&s->macio_bus)); 354 object_property_add_child(OBJECT(s), "pmu", OBJECT(&s->pmu), NULL); 355 356 object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err); 357 if (err) { 358 error_propagate(errp, err); 359 return; 360 } 361 sysbus_dev = SYS_BUS_DEVICE(&s->pmu); 362 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 363 NEWWORLD_PMU_IRQ)); 364 memory_region_add_subregion(&s->bar, 0x16000, 365 sysbus_mmio_get_region(sysbus_dev, 0)); 366 } else { 367 /* CUDA */ 368 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA); 369 qdev_set_parent_bus(DEVICE(&s->cuda), BUS(&s->macio_bus)); 370 object_property_add_child(OBJECT(s), "cuda", OBJECT(&s->cuda), NULL); 371 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 372 s->frequency); 373 374 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); 375 if (err) { 376 error_propagate(errp, err); 377 return; 378 } 379 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 380 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 381 NEWWORLD_CUDA_IRQ)); 382 memory_region_add_subregion(&s->bar, 0x16000, 383 sysbus_mmio_get_region(sysbus_dev, 0)); 384 } 385 } 386 387 static void macio_newworld_init(Object *obj) 388 { 389 MacIOState *s = MACIO(obj); 390 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); 391 int i; 392 393 object_property_add_link(obj, "pic", TYPE_OPENPIC, 394 (Object **) &ns->pic, 395 qdev_prop_allow_set_link_before_realize, 396 0, NULL); 397 398 macio_init_child_obj(s, "gpio", &ns->gpio, sizeof(ns->gpio), 399 TYPE_MACIO_GPIO); 400 401 for (i = 0; i < 2; i++) { 402 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i); 403 } 404 } 405 406 static void macio_instance_init(Object *obj) 407 { 408 MacIOState *s = MACIO(obj); 409 410 memory_region_init(&s->bar, obj, "macio", 0x80000); 411 412 qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS, 413 DEVICE(obj), "macio.0"); 414 415 macio_init_child_obj(s, "dbdma", &s->dbdma, sizeof(s->dbdma), 416 TYPE_MAC_DBDMA); 417 418 macio_init_child_obj(s, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC); 419 } 420 421 static const VMStateDescription vmstate_macio_oldworld = { 422 .name = "macio-oldworld", 423 .version_id = 0, 424 .minimum_version_id = 0, 425 .fields = (VMStateField[]) { 426 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), 427 VMSTATE_END_OF_LIST() 428 } 429 }; 430 431 static void macio_oldworld_class_init(ObjectClass *oc, void *data) 432 { 433 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 434 DeviceClass *dc = DEVICE_CLASS(oc); 435 436 pdc->realize = macio_oldworld_realize; 437 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; 438 dc->vmsd = &vmstate_macio_oldworld; 439 } 440 441 static const VMStateDescription vmstate_macio_newworld = { 442 .name = "macio-newworld", 443 .version_id = 0, 444 .minimum_version_id = 0, 445 .fields = (VMStateField[]) { 446 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), 447 VMSTATE_END_OF_LIST() 448 } 449 }; 450 451 static Property macio_newworld_properties[] = { 452 DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false), 453 DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false), 454 DEFINE_PROP_END_OF_LIST() 455 }; 456 457 static void macio_newworld_class_init(ObjectClass *oc, void *data) 458 { 459 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 460 DeviceClass *dc = DEVICE_CLASS(oc); 461 462 pdc->realize = macio_newworld_realize; 463 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; 464 dc->vmsd = &vmstate_macio_newworld; 465 dc->props = macio_newworld_properties; 466 } 467 468 static Property macio_properties[] = { 469 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), 470 DEFINE_PROP_END_OF_LIST() 471 }; 472 473 static void macio_class_init(ObjectClass *klass, void *data) 474 { 475 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 476 DeviceClass *dc = DEVICE_CLASS(klass); 477 478 k->vendor_id = PCI_VENDOR_ID_APPLE; 479 k->class_id = PCI_CLASS_OTHERS << 8; 480 dc->props = macio_properties; 481 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 482 /* Reason: Uses serial_hds in macio_instance_init */ 483 dc->user_creatable = false; 484 } 485 486 static const TypeInfo macio_bus_info = { 487 .name = TYPE_MACIO_BUS, 488 .parent = TYPE_BUS, 489 .instance_size = sizeof(MacIOBusState), 490 }; 491 492 static const TypeInfo macio_oldworld_type_info = { 493 .name = TYPE_OLDWORLD_MACIO, 494 .parent = TYPE_MACIO, 495 .instance_size = sizeof(OldWorldMacIOState), 496 .instance_init = macio_oldworld_init, 497 .class_init = macio_oldworld_class_init, 498 }; 499 500 static const TypeInfo macio_newworld_type_info = { 501 .name = TYPE_NEWWORLD_MACIO, 502 .parent = TYPE_MACIO, 503 .instance_size = sizeof(NewWorldMacIOState), 504 .instance_init = macio_newworld_init, 505 .class_init = macio_newworld_class_init, 506 }; 507 508 static const TypeInfo macio_type_info = { 509 .name = TYPE_MACIO, 510 .parent = TYPE_PCI_DEVICE, 511 .instance_size = sizeof(MacIOState), 512 .instance_init = macio_instance_init, 513 .abstract = true, 514 .class_init = macio_class_init, 515 .interfaces = (InterfaceInfo[]) { 516 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 517 { }, 518 }, 519 }; 520 521 static void macio_register_types(void) 522 { 523 type_register_static(&macio_bus_info); 524 type_register_static(&macio_type_info); 525 type_register_static(&macio_oldworld_type_info); 526 type_register_static(&macio_newworld_type_info); 527 } 528 529 type_init(macio_register_types) 530