1 /* 2 * PowerMac MacIO device emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "qemu/module.h" 29 #include "hw/ppc/mac.h" 30 #include "hw/misc/macio/cuda.h" 31 #include "hw/pci/pci.h" 32 #include "hw/ppc/mac_dbdma.h" 33 #include "hw/qdev-properties.h" 34 #include "migration/vmstate.h" 35 #include "hw/char/escc.h" 36 #include "hw/misc/macio/macio.h" 37 #include "hw/intc/heathrow_pic.h" 38 #include "sysemu/sysemu.h" 39 #include "trace.h" 40 41 /* Note: this code is strongly inspirated from the corresponding code 42 * in PearPC */ 43 44 /* 45 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", 46 * while the other one is the normal, current ESCC interface. 47 * 48 * The magic below creates memory aliases to spawn the escc-legacy device 49 * purely by rerouting the respective registers to our escc region. This 50 * works because the only difference between the two memory regions is the 51 * register layout, not their semantics. 52 * 53 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf 54 */ 55 static void macio_escc_legacy_setup(MacIOState *s) 56 { 57 ESCCState *escc = ESCC(&s->escc); 58 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 59 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); 60 MemoryRegion *bar = &s->bar; 61 int i; 62 static const int maps[] = { 63 0x00, 0x00, /* Command B */ 64 0x02, 0x20, /* Command A */ 65 0x04, 0x10, /* Data B */ 66 0x06, 0x30, /* Data A */ 67 0x08, 0x40, /* Enhancement B */ 68 0x0A, 0x50, /* Enhancement A */ 69 0x80, 0x80, /* Recovery count */ 70 0x90, 0x90, /* Start A */ 71 0xa0, 0xa0, /* Start B */ 72 0xb0, 0xb0, /* Detect AB */ 73 }; 74 75 memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256); 76 for (i = 0; i < ARRAY_SIZE(maps); i += 2) { 77 MemoryRegion *port = g_new(MemoryRegion, 1); 78 memory_region_init_alias(port, OBJECT(s), "escc-legacy-port", 79 sysbus_mmio_get_region(sbd, 0), 80 maps[i + 1], 0x2); 81 memory_region_add_subregion(escc_legacy, maps[i], port); 82 } 83 84 memory_region_add_subregion(bar, 0x12000, escc_legacy); 85 } 86 87 static void macio_bar_setup(MacIOState *s) 88 { 89 ESCCState *escc = ESCC(&s->escc); 90 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 91 MemoryRegion *bar = &s->bar; 92 93 memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0)); 94 macio_escc_legacy_setup(s); 95 } 96 97 static void macio_init_child_obj(MacIOState *s, const char *childname, 98 void *child, size_t childsize, 99 const char *childtype) 100 { 101 object_initialize_child(OBJECT(s), childname, child, childsize, childtype, 102 &error_abort, NULL); 103 qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus)); 104 } 105 106 static void macio_common_realize(PCIDevice *d, Error **errp) 107 { 108 MacIOState *s = MACIO(d); 109 SysBusDevice *sysbus_dev; 110 Error *err = NULL; 111 112 object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err); 113 if (err) { 114 error_propagate(errp, err); 115 return; 116 } 117 sysbus_dev = SYS_BUS_DEVICE(&s->dbdma); 118 memory_region_add_subregion(&s->bar, 0x08000, 119 sysbus_mmio_get_region(sysbus_dev, 0)); 120 121 qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0); 122 qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK); 123 qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4); 124 qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0)); 125 qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1)); 126 qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); 127 qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); 128 object_property_set_bool(OBJECT(&s->escc), true, "realized", &err); 129 if (err) { 130 error_propagate(errp, err); 131 return; 132 } 133 134 macio_bar_setup(s); 135 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); 136 } 137 138 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide, 139 qemu_irq irq0, qemu_irq irq1, int dmaid, 140 Error **errp) 141 { 142 SysBusDevice *sysbus_dev; 143 144 sysbus_dev = SYS_BUS_DEVICE(ide); 145 sysbus_connect_irq(sysbus_dev, 0, irq0); 146 sysbus_connect_irq(sysbus_dev, 1, irq1); 147 qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid); 148 object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp); 149 macio_ide_register_dma(ide); 150 151 object_property_set_bool(OBJECT(ide), true, "realized", errp); 152 } 153 154 static void macio_oldworld_realize(PCIDevice *d, Error **errp) 155 { 156 MacIOState *s = MACIO(d); 157 OldWorldMacIOState *os = OLDWORLD_MACIO(d); 158 DeviceState *pic_dev = DEVICE(os->pic); 159 Error *err = NULL; 160 SysBusDevice *sysbus_dev; 161 162 macio_common_realize(d, &err); 163 if (err) { 164 error_propagate(errp, err); 165 return; 166 } 167 168 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 169 s->frequency); 170 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); 171 if (err) { 172 error_propagate(errp, err); 173 return; 174 } 175 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 176 memory_region_add_subregion(&s->bar, 0x16000, 177 sysbus_mmio_get_region(sysbus_dev, 0)); 178 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 179 OLDWORLD_CUDA_IRQ)); 180 181 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 182 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 183 OLDWORLD_ESCCB_IRQ)); 184 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 185 OLDWORLD_ESCCA_IRQ)); 186 187 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err); 188 if (err) { 189 error_propagate(errp, err); 190 return; 191 } 192 sysbus_dev = SYS_BUS_DEVICE(&os->nvram); 193 memory_region_add_subregion(&s->bar, 0x60000, 194 sysbus_mmio_get_region(sysbus_dev, 0)); 195 pmac_format_nvram_partition(&os->nvram, os->nvram.size); 196 197 /* Heathrow PIC */ 198 sysbus_dev = SYS_BUS_DEVICE(os->pic); 199 memory_region_add_subregion(&s->bar, 0x0, 200 sysbus_mmio_get_region(sysbus_dev, 0)); 201 202 /* IDE buses */ 203 macio_realize_ide(s, &os->ide[0], 204 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ), 205 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ), 206 0x16, &err); 207 if (err) { 208 error_propagate(errp, err); 209 return; 210 } 211 212 macio_realize_ide(s, &os->ide[1], 213 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ), 214 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ), 215 0x1a, &err); 216 if (err) { 217 error_propagate(errp, err); 218 return; 219 } 220 } 221 222 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size, 223 int index) 224 { 225 gchar *name = g_strdup_printf("ide[%i]", index); 226 uint32_t addr = 0x1f000 + ((index + 1) * 0x1000); 227 228 macio_init_child_obj(s, name, ide, ide_size, TYPE_MACIO_IDE); 229 qdev_prop_set_uint32(DEVICE(ide), "addr", addr); 230 memory_region_add_subregion(&s->bar, addr, &ide->mem); 231 g_free(name); 232 } 233 234 static void macio_oldworld_init(Object *obj) 235 { 236 MacIOState *s = MACIO(obj); 237 OldWorldMacIOState *os = OLDWORLD_MACIO(obj); 238 DeviceState *dev; 239 int i; 240 241 object_property_add_link(obj, "pic", TYPE_HEATHROW, 242 (Object **) &os->pic, 243 qdev_prop_allow_set_link_before_realize, 244 0); 245 246 macio_init_child_obj(s, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA); 247 248 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM); 249 dev = DEVICE(&os->nvram); 250 qdev_prop_set_uint32(dev, "size", 0x2000); 251 qdev_prop_set_uint32(dev, "it_shift", 4); 252 253 for (i = 0; i < 2; i++) { 254 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i); 255 } 256 } 257 258 static void timer_write(void *opaque, hwaddr addr, uint64_t value, 259 unsigned size) 260 { 261 trace_macio_timer_write(addr, size, value); 262 } 263 264 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) 265 { 266 uint32_t value = 0; 267 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 268 uint64_t kltime; 269 270 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4); 271 kltime = muldiv64(kltime, 18432000, 1048575); 272 273 switch (addr) { 274 case 0x38: 275 value = kltime; 276 break; 277 case 0x3c: 278 value = kltime >> 32; 279 break; 280 } 281 282 trace_macio_timer_read(addr, size, value); 283 return value; 284 } 285 286 static const MemoryRegionOps timer_ops = { 287 .read = timer_read, 288 .write = timer_write, 289 .endianness = DEVICE_LITTLE_ENDIAN, 290 }; 291 292 static void macio_newworld_realize(PCIDevice *d, Error **errp) 293 { 294 MacIOState *s = MACIO(d); 295 NewWorldMacIOState *ns = NEWWORLD_MACIO(d); 296 DeviceState *pic_dev = DEVICE(ns->pic); 297 Error *err = NULL; 298 SysBusDevice *sysbus_dev; 299 MemoryRegion *timer_memory = NULL; 300 301 macio_common_realize(d, &err); 302 if (err) { 303 error_propagate(errp, err); 304 return; 305 } 306 307 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 308 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 309 NEWWORLD_ESCCB_IRQ)); 310 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 311 NEWWORLD_ESCCA_IRQ)); 312 313 /* OpenPIC */ 314 sysbus_dev = SYS_BUS_DEVICE(ns->pic); 315 memory_region_add_subregion(&s->bar, 0x40000, 316 sysbus_mmio_get_region(sysbus_dev, 0)); 317 318 /* IDE buses */ 319 macio_realize_ide(s, &ns->ide[0], 320 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ), 321 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ), 322 0x16, &err); 323 if (err) { 324 error_propagate(errp, err); 325 return; 326 } 327 328 macio_realize_ide(s, &ns->ide[1], 329 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ), 330 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ), 331 0x1a, &err); 332 if (err) { 333 error_propagate(errp, err); 334 return; 335 } 336 337 /* Timer */ 338 timer_memory = g_new(MemoryRegion, 1); 339 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", 340 0x1000); 341 memory_region_add_subregion(&s->bar, 0x15000, timer_memory); 342 343 if (ns->has_pmu) { 344 /* GPIOs */ 345 sysbus_dev = SYS_BUS_DEVICE(&ns->gpio); 346 object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic", 347 &error_abort); 348 memory_region_add_subregion(&s->bar, 0x50, 349 sysbus_mmio_get_region(sysbus_dev, 0)); 350 object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err); 351 352 /* PMU */ 353 object_initialize_child(OBJECT(s), "pmu", &s->pmu, sizeof(s->pmu), 354 TYPE_VIA_PMU, &error_abort, NULL); 355 object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio", 356 &error_abort); 357 qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); 358 qdev_set_parent_bus(DEVICE(&s->pmu), BUS(&s->macio_bus)); 359 360 object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err); 361 if (err) { 362 error_propagate(errp, err); 363 return; 364 } 365 sysbus_dev = SYS_BUS_DEVICE(&s->pmu); 366 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 367 NEWWORLD_PMU_IRQ)); 368 memory_region_add_subregion(&s->bar, 0x16000, 369 sysbus_mmio_get_region(sysbus_dev, 0)); 370 } else { 371 /* CUDA */ 372 object_initialize_child(OBJECT(s), "cuda", &s->cuda, sizeof(s->cuda), 373 TYPE_CUDA, &error_abort, NULL); 374 qdev_set_parent_bus(DEVICE(&s->cuda), BUS(&s->macio_bus)); 375 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 376 s->frequency); 377 378 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); 379 if (err) { 380 error_propagate(errp, err); 381 return; 382 } 383 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 384 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 385 NEWWORLD_CUDA_IRQ)); 386 memory_region_add_subregion(&s->bar, 0x16000, 387 sysbus_mmio_get_region(sysbus_dev, 0)); 388 } 389 } 390 391 static void macio_newworld_init(Object *obj) 392 { 393 MacIOState *s = MACIO(obj); 394 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); 395 int i; 396 397 object_property_add_link(obj, "pic", TYPE_OPENPIC, 398 (Object **) &ns->pic, 399 qdev_prop_allow_set_link_before_realize, 400 0); 401 402 macio_init_child_obj(s, "gpio", &ns->gpio, sizeof(ns->gpio), 403 TYPE_MACIO_GPIO); 404 405 for (i = 0; i < 2; i++) { 406 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i); 407 } 408 } 409 410 static void macio_instance_init(Object *obj) 411 { 412 MacIOState *s = MACIO(obj); 413 414 memory_region_init(&s->bar, obj, "macio", 0x80000); 415 416 qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS, 417 DEVICE(obj), "macio.0"); 418 419 macio_init_child_obj(s, "dbdma", &s->dbdma, sizeof(s->dbdma), 420 TYPE_MAC_DBDMA); 421 422 macio_init_child_obj(s, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC); 423 } 424 425 static const VMStateDescription vmstate_macio_oldworld = { 426 .name = "macio-oldworld", 427 .version_id = 0, 428 .minimum_version_id = 0, 429 .fields = (VMStateField[]) { 430 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), 431 VMSTATE_END_OF_LIST() 432 } 433 }; 434 435 static void macio_oldworld_class_init(ObjectClass *oc, void *data) 436 { 437 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 438 DeviceClass *dc = DEVICE_CLASS(oc); 439 440 pdc->realize = macio_oldworld_realize; 441 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; 442 dc->vmsd = &vmstate_macio_oldworld; 443 } 444 445 static const VMStateDescription vmstate_macio_newworld = { 446 .name = "macio-newworld", 447 .version_id = 0, 448 .minimum_version_id = 0, 449 .fields = (VMStateField[]) { 450 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), 451 VMSTATE_END_OF_LIST() 452 } 453 }; 454 455 static Property macio_newworld_properties[] = { 456 DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false), 457 DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false), 458 DEFINE_PROP_END_OF_LIST() 459 }; 460 461 static void macio_newworld_class_init(ObjectClass *oc, void *data) 462 { 463 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 464 DeviceClass *dc = DEVICE_CLASS(oc); 465 466 pdc->realize = macio_newworld_realize; 467 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; 468 dc->vmsd = &vmstate_macio_newworld; 469 device_class_set_props(dc, macio_newworld_properties); 470 } 471 472 static Property macio_properties[] = { 473 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), 474 DEFINE_PROP_END_OF_LIST() 475 }; 476 477 static void macio_class_init(ObjectClass *klass, void *data) 478 { 479 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 480 DeviceClass *dc = DEVICE_CLASS(klass); 481 482 k->vendor_id = PCI_VENDOR_ID_APPLE; 483 k->class_id = PCI_CLASS_OTHERS << 8; 484 device_class_set_props(dc, macio_properties); 485 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 486 /* Reason: Uses serial_hds in macio_instance_init */ 487 dc->user_creatable = false; 488 } 489 490 static const TypeInfo macio_bus_info = { 491 .name = TYPE_MACIO_BUS, 492 .parent = TYPE_BUS, 493 .instance_size = sizeof(MacIOBusState), 494 }; 495 496 static const TypeInfo macio_oldworld_type_info = { 497 .name = TYPE_OLDWORLD_MACIO, 498 .parent = TYPE_MACIO, 499 .instance_size = sizeof(OldWorldMacIOState), 500 .instance_init = macio_oldworld_init, 501 .class_init = macio_oldworld_class_init, 502 }; 503 504 static const TypeInfo macio_newworld_type_info = { 505 .name = TYPE_NEWWORLD_MACIO, 506 .parent = TYPE_MACIO, 507 .instance_size = sizeof(NewWorldMacIOState), 508 .instance_init = macio_newworld_init, 509 .class_init = macio_newworld_class_init, 510 }; 511 512 static const TypeInfo macio_type_info = { 513 .name = TYPE_MACIO, 514 .parent = TYPE_PCI_DEVICE, 515 .instance_size = sizeof(MacIOState), 516 .instance_init = macio_instance_init, 517 .abstract = true, 518 .class_init = macio_class_init, 519 .interfaces = (InterfaceInfo[]) { 520 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 521 { }, 522 }, 523 }; 524 525 static void macio_register_types(void) 526 { 527 type_register_static(&macio_bus_info); 528 type_register_static(&macio_type_info); 529 type_register_static(&macio_oldworld_type_info); 530 type_register_static(&macio_newworld_type_info); 531 } 532 533 type_init(macio_register_types) 534