1 /* 2 * PowerMac MacIO device emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "qemu/module.h" 29 #include "hw/misc/macio/cuda.h" 30 #include "hw/pci/pci.h" 31 #include "hw/ppc/mac_dbdma.h" 32 #include "hw/qdev-properties.h" 33 #include "migration/vmstate.h" 34 #include "hw/char/escc.h" 35 #include "hw/misc/macio/macio.h" 36 #include "hw/intc/heathrow_pic.h" 37 #include "trace.h" 38 39 #define ESCC_CLOCK 3686400 40 41 /* Note: this code is strongly inspired by the corresponding code in PearPC */ 42 43 /* 44 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", 45 * while the other one is the normal, current ESCC interface. 46 * 47 * The magic below creates memory aliases to spawn the escc-legacy device 48 * purely by rerouting the respective registers to our escc region. This 49 * works because the only difference between the two memory regions is the 50 * register layout, not their semantics. 51 * 52 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf 53 */ 54 static void macio_escc_legacy_setup(MacIOState *s) 55 { 56 SysBusDevice *sbd = SYS_BUS_DEVICE(&s->escc); 57 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); 58 int i; 59 static const int maps[] = { 60 0x00, 0x00, /* Command B */ 61 0x02, 0x20, /* Command A */ 62 0x04, 0x10, /* Data B */ 63 0x06, 0x30, /* Data A */ 64 0x08, 0x40, /* Enhancement B */ 65 0x0A, 0x50, /* Enhancement A */ 66 0x80, 0x80, /* Recovery count */ 67 0x90, 0x90, /* Start A */ 68 0xa0, 0xa0, /* Start B */ 69 0xb0, 0xb0, /* Detect AB */ 70 }; 71 72 memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256); 73 for (i = 0; i < ARRAY_SIZE(maps); i += 2) { 74 MemoryRegion *port = g_new(MemoryRegion, 1); 75 memory_region_init_alias(port, OBJECT(s), "escc-legacy-port", 76 sysbus_mmio_get_region(sbd, 0), 77 maps[i + 1], 0x2); 78 memory_region_add_subregion(escc_legacy, maps[i], port); 79 } 80 81 memory_region_add_subregion(&s->bar, 0x12000, escc_legacy); 82 } 83 84 static void macio_bar_setup(MacIOState *s) 85 { 86 SysBusDevice *sbd = SYS_BUS_DEVICE(&s->escc); 87 MemoryRegion *bar = sysbus_mmio_get_region(sbd, 0); 88 89 memory_region_add_subregion(&s->bar, 0x13000, bar); 90 macio_escc_legacy_setup(s); 91 } 92 93 static bool macio_common_realize(PCIDevice *d, Error **errp) 94 { 95 MacIOState *s = MACIO(d); 96 SysBusDevice *sbd; 97 98 if (!qdev_realize(DEVICE(&s->dbdma), BUS(&s->macio_bus), errp)) { 99 return false; 100 } 101 sbd = SYS_BUS_DEVICE(&s->dbdma); 102 memory_region_add_subregion(&s->bar, 0x08000, 103 sysbus_mmio_get_region(sbd, 0)); 104 105 qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0); 106 qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK); 107 qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4); 108 qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); 109 qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); 110 if (!qdev_realize(DEVICE(&s->escc), BUS(&s->macio_bus), errp)) { 111 return false; 112 } 113 114 macio_bar_setup(s); 115 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); 116 117 return true; 118 } 119 120 static bool macio_realize_ide(MacIOState *s, MACIOIDEState *ide, 121 qemu_irq irq0, qemu_irq irq1, int dmaid, 122 Error **errp) 123 { 124 SysBusDevice *sbd = SYS_BUS_DEVICE(ide); 125 126 sysbus_connect_irq(sbd, 0, irq0); 127 sysbus_connect_irq(sbd, 1, irq1); 128 qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid); 129 object_property_set_link(OBJECT(ide), "dbdma", OBJECT(&s->dbdma), 130 &error_abort); 131 macio_ide_register_dma(ide); 132 133 return qdev_realize(DEVICE(ide), BUS(&s->macio_bus), errp); 134 } 135 136 static void macio_oldworld_realize(PCIDevice *d, Error **errp) 137 { 138 MacIOState *s = MACIO(d); 139 OldWorldMacIOState *os = OLDWORLD_MACIO(d); 140 DeviceState *pic_dev = DEVICE(&os->pic); 141 SysBusDevice *sbd; 142 143 if (!macio_common_realize(d, errp)) { 144 return; 145 } 146 147 /* Heathrow PIC */ 148 if (!qdev_realize(DEVICE(&os->pic), BUS(&s->macio_bus), errp)) { 149 return; 150 } 151 sbd = SYS_BUS_DEVICE(&os->pic); 152 memory_region_add_subregion(&s->bar, 0x0, 153 sysbus_mmio_get_region(sbd, 0)); 154 155 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 156 s->frequency); 157 if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), errp)) { 158 return; 159 } 160 sbd = SYS_BUS_DEVICE(&s->cuda); 161 memory_region_add_subregion(&s->bar, 0x16000, 162 sysbus_mmio_get_region(sbd, 0)); 163 sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, OLDWORLD_CUDA_IRQ)); 164 165 sbd = SYS_BUS_DEVICE(&s->escc); 166 sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, OLDWORLD_ESCCB_IRQ)); 167 sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(pic_dev, OLDWORLD_ESCCA_IRQ)); 168 169 if (!qdev_realize(DEVICE(&os->nvram), BUS(&s->macio_bus), errp)) { 170 return; 171 } 172 sbd = SYS_BUS_DEVICE(&os->nvram); 173 memory_region_add_subregion(&s->bar, 0x60000, 174 sysbus_mmio_get_region(sbd, 0)); 175 pmac_format_nvram_partition(&os->nvram, os->nvram.size); 176 177 /* IDE buses */ 178 if (!macio_realize_ide(s, &os->ide[0], 179 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ), 180 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ), 181 0x16, errp)) { 182 return; 183 } 184 185 if (!macio_realize_ide(s, &os->ide[1], 186 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ), 187 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ), 188 0x1a, errp)) { 189 return; 190 } 191 } 192 193 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index) 194 { 195 gchar *name = g_strdup_printf("ide[%i]", index); 196 uint32_t addr = 0x1f000 + ((index + 1) * 0x1000); 197 198 object_initialize_child(OBJECT(s), name, ide, TYPE_MACIO_IDE); 199 qdev_prop_set_uint32(DEVICE(ide), "addr", addr); 200 memory_region_add_subregion(&s->bar, addr, &ide->mem); 201 g_free(name); 202 } 203 204 static void macio_oldworld_init(Object *obj) 205 { 206 MacIOState *s = MACIO(obj); 207 OldWorldMacIOState *os = OLDWORLD_MACIO(obj); 208 DeviceState *dev; 209 int i; 210 211 object_initialize_child(obj, "pic", &os->pic, TYPE_HEATHROW); 212 213 object_initialize_child(obj, "cuda", &s->cuda, TYPE_CUDA); 214 215 object_initialize_child(obj, "nvram", &os->nvram, TYPE_MACIO_NVRAM); 216 dev = DEVICE(&os->nvram); 217 qdev_prop_set_uint32(dev, "size", MACIO_NVRAM_SIZE); 218 qdev_prop_set_uint32(dev, "it_shift", 4); 219 220 for (i = 0; i < 2; i++) { 221 macio_init_ide(s, &os->ide[i], i); 222 } 223 } 224 225 static void timer_write(void *opaque, hwaddr addr, uint64_t value, 226 unsigned size) 227 { 228 trace_macio_timer_write(addr, size, value); 229 } 230 231 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) 232 { 233 uint32_t value = 0; 234 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 235 uint64_t kltime; 236 237 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4); 238 kltime = muldiv64(kltime, 18432000, 1048575); 239 240 switch (addr) { 241 case 0x38: 242 value = kltime; 243 break; 244 case 0x3c: 245 value = kltime >> 32; 246 break; 247 } 248 249 trace_macio_timer_read(addr, size, value); 250 return value; 251 } 252 253 static const MemoryRegionOps timer_ops = { 254 .read = timer_read, 255 .write = timer_write, 256 .endianness = DEVICE_LITTLE_ENDIAN, 257 }; 258 259 static void macio_newworld_realize(PCIDevice *d, Error **errp) 260 { 261 MacIOState *s = MACIO(d); 262 NewWorldMacIOState *ns = NEWWORLD_MACIO(d); 263 DeviceState *pic_dev = DEVICE(&ns->pic); 264 SysBusDevice *sbd; 265 MemoryRegion *timer_memory = NULL; 266 267 if (!macio_common_realize(d, errp)) { 268 return; 269 } 270 271 /* OpenPIC */ 272 qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); 273 sbd = SYS_BUS_DEVICE(&ns->pic); 274 sysbus_realize_and_unref(sbd, &error_fatal); 275 memory_region_add_subregion(&s->bar, 0x40000, 276 sysbus_mmio_get_region(sbd, 0)); 277 278 sbd = SYS_BUS_DEVICE(&s->escc); 279 sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCB_IRQ)); 280 sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCA_IRQ)); 281 282 /* IDE buses */ 283 if (!macio_realize_ide(s, &ns->ide[0], 284 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ), 285 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ), 286 0x16, errp)) { 287 return; 288 } 289 290 if (!macio_realize_ide(s, &ns->ide[1], 291 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ), 292 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ), 293 0x1a, errp)) { 294 return; 295 } 296 297 /* Timer */ 298 timer_memory = g_new(MemoryRegion, 1); 299 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", 300 0x1000); 301 memory_region_add_subregion(&s->bar, 0x15000, timer_memory); 302 303 if (ns->has_pmu) { 304 /* GPIOs */ 305 if (!qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), errp)) { 306 return; 307 } 308 sbd = SYS_BUS_DEVICE(&ns->gpio); 309 sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(pic_dev, 310 NEWWORLD_EXTING_GPIO1)); 311 sysbus_connect_irq(sbd, 9, qdev_get_gpio_in(pic_dev, 312 NEWWORLD_EXTING_GPIO9)); 313 memory_region_add_subregion(&s->bar, 0x50, 314 sysbus_mmio_get_region(sbd, 0)); 315 316 /* PMU */ 317 object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU); 318 object_property_set_link(OBJECT(&s->pmu), "gpio", OBJECT(sbd), 319 &error_abort); 320 qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); 321 if (!qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), errp)) { 322 return; 323 } 324 sbd = SYS_BUS_DEVICE(&s->pmu); 325 sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, NEWWORLD_PMU_IRQ)); 326 memory_region_add_subregion(&s->bar, 0x16000, 327 sysbus_mmio_get_region(sbd, 0)); 328 } else { 329 object_unparent(OBJECT(&ns->gpio)); 330 331 /* CUDA */ 332 object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); 333 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 334 s->frequency); 335 336 if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), errp)) { 337 return; 338 } 339 sbd = SYS_BUS_DEVICE(&s->cuda); 340 sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, NEWWORLD_CUDA_IRQ)); 341 memory_region_add_subregion(&s->bar, 0x16000, 342 sysbus_mmio_get_region(sbd, 0)); 343 } 344 } 345 346 static void macio_newworld_init(Object *obj) 347 { 348 MacIOState *s = MACIO(obj); 349 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); 350 int i; 351 352 object_initialize_child(obj, "pic", &ns->pic, TYPE_OPENPIC); 353 354 object_initialize_child(obj, "gpio", &ns->gpio, TYPE_MACIO_GPIO); 355 356 for (i = 0; i < 2; i++) { 357 macio_init_ide(s, &ns->ide[i], i); 358 } 359 } 360 361 static void macio_instance_init(Object *obj) 362 { 363 MacIOState *s = MACIO(obj); 364 365 memory_region_init(&s->bar, obj, "macio", 0x80000); 366 367 qbus_init(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS, 368 DEVICE(obj), "macio.0"); 369 370 object_initialize_child(obj, "dbdma", &s->dbdma, TYPE_MAC_DBDMA); 371 372 object_initialize_child(obj, "escc", &s->escc, TYPE_ESCC); 373 } 374 375 static const VMStateDescription vmstate_macio_oldworld = { 376 .name = "macio-oldworld", 377 .version_id = 0, 378 .minimum_version_id = 0, 379 .fields = (const VMStateField[]) { 380 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), 381 VMSTATE_END_OF_LIST() 382 } 383 }; 384 385 static void macio_oldworld_class_init(ObjectClass *oc, void *data) 386 { 387 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 388 DeviceClass *dc = DEVICE_CLASS(oc); 389 390 pdc->realize = macio_oldworld_realize; 391 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; 392 dc->vmsd = &vmstate_macio_oldworld; 393 } 394 395 static const VMStateDescription vmstate_macio_newworld = { 396 .name = "macio-newworld", 397 .version_id = 0, 398 .minimum_version_id = 0, 399 .fields = (const VMStateField[]) { 400 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), 401 VMSTATE_END_OF_LIST() 402 } 403 }; 404 405 static Property macio_newworld_properties[] = { 406 DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false), 407 DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false), 408 DEFINE_PROP_END_OF_LIST() 409 }; 410 411 static void macio_newworld_class_init(ObjectClass *oc, void *data) 412 { 413 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 414 DeviceClass *dc = DEVICE_CLASS(oc); 415 416 pdc->realize = macio_newworld_realize; 417 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; 418 dc->vmsd = &vmstate_macio_newworld; 419 device_class_set_props(dc, macio_newworld_properties); 420 } 421 422 static Property macio_properties[] = { 423 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), 424 DEFINE_PROP_END_OF_LIST() 425 }; 426 427 static void macio_class_init(ObjectClass *klass, void *data) 428 { 429 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 430 DeviceClass *dc = DEVICE_CLASS(klass); 431 432 k->vendor_id = PCI_VENDOR_ID_APPLE; 433 k->class_id = PCI_CLASS_OTHERS << 8; 434 device_class_set_props(dc, macio_properties); 435 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 436 } 437 438 static const TypeInfo macio_bus_info = { 439 .name = TYPE_MACIO_BUS, 440 .parent = TYPE_SYSTEM_BUS, 441 .instance_size = sizeof(MacIOBusState), 442 }; 443 444 static const TypeInfo macio_oldworld_type_info = { 445 .name = TYPE_OLDWORLD_MACIO, 446 .parent = TYPE_MACIO, 447 .instance_size = sizeof(OldWorldMacIOState), 448 .instance_init = macio_oldworld_init, 449 .class_init = macio_oldworld_class_init, 450 }; 451 452 static const TypeInfo macio_newworld_type_info = { 453 .name = TYPE_NEWWORLD_MACIO, 454 .parent = TYPE_MACIO, 455 .instance_size = sizeof(NewWorldMacIOState), 456 .instance_init = macio_newworld_init, 457 .class_init = macio_newworld_class_init, 458 }; 459 460 static const TypeInfo macio_type_info = { 461 .name = TYPE_MACIO, 462 .parent = TYPE_PCI_DEVICE, 463 .instance_size = sizeof(MacIOState), 464 .instance_init = macio_instance_init, 465 .abstract = true, 466 .class_init = macio_class_init, 467 .interfaces = (InterfaceInfo[]) { 468 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 469 { }, 470 }, 471 }; 472 473 static void macio_register_types(void) 474 { 475 type_register_static(&macio_bus_info); 476 type_register_static(&macio_type_info); 477 type_register_static(&macio_oldworld_type_info); 478 type_register_static(&macio_newworld_type_info); 479 } 480 481 type_init(macio_register_types) 482