xref: /openbmc/qemu/hw/misc/macio/macio.c (revision 3c4b89c3)
1 /*
2  * PowerMac MacIO device emulation
3  *
4  * Copyright (c) 2005-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 
26 #include "qemu/osdep.h"
27 #include "qapi/error.h"
28 #include "qemu/module.h"
29 #include "hw/ppc/mac.h"
30 #include "hw/misc/macio/cuda.h"
31 #include "hw/pci/pci.h"
32 #include "hw/ppc/mac_dbdma.h"
33 #include "hw/qdev-properties.h"
34 #include "migration/vmstate.h"
35 #include "hw/char/escc.h"
36 #include "hw/misc/macio/macio.h"
37 #include "hw/intc/heathrow_pic.h"
38 #include "sysemu/sysemu.h"
39 #include "trace.h"
40 
41 /* Note: this code is strongly inspirated from the corresponding code
42  * in PearPC */
43 
44 /*
45  * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
46  * while the other one is the normal, current ESCC interface.
47  *
48  * The magic below creates memory aliases to spawn the escc-legacy device
49  * purely by rerouting the respective registers to our escc region. This
50  * works because the only difference between the two memory regions is the
51  * register layout, not their semantics.
52  *
53  * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
54  */
55 static void macio_escc_legacy_setup(MacIOState *s)
56 {
57     ESCCState *escc = ESCC(&s->escc);
58     SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
59     MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
60     MemoryRegion *bar = &s->bar;
61     int i;
62     static const int maps[] = {
63         0x00, 0x00, /* Command B */
64         0x02, 0x20, /* Command A */
65         0x04, 0x10, /* Data B */
66         0x06, 0x30, /* Data A */
67         0x08, 0x40, /* Enhancement B */
68         0x0A, 0x50, /* Enhancement A */
69         0x80, 0x80, /* Recovery count */
70         0x90, 0x90, /* Start A */
71         0xa0, 0xa0, /* Start B */
72         0xb0, 0xb0, /* Detect AB */
73     };
74 
75     memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256);
76     for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
77         MemoryRegion *port = g_new(MemoryRegion, 1);
78         memory_region_init_alias(port, OBJECT(s), "escc-legacy-port",
79                                  sysbus_mmio_get_region(sbd, 0),
80                                  maps[i + 1], 0x2);
81         memory_region_add_subregion(escc_legacy, maps[i], port);
82     }
83 
84     memory_region_add_subregion(bar, 0x12000, escc_legacy);
85 }
86 
87 static void macio_bar_setup(MacIOState *s)
88 {
89     ESCCState *escc = ESCC(&s->escc);
90     SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
91     MemoryRegion *bar = &s->bar;
92 
93     memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0));
94     macio_escc_legacy_setup(s);
95 }
96 
97 static void macio_common_realize(PCIDevice *d, Error **errp)
98 {
99     MacIOState *s = MACIO(d);
100     SysBusDevice *sysbus_dev;
101     Error *err = NULL;
102 
103     if (!qdev_realize(DEVICE(&s->dbdma), BUS(&s->macio_bus), &err)) {
104         error_propagate(errp, err);
105         return;
106     }
107     sysbus_dev = SYS_BUS_DEVICE(&s->dbdma);
108     memory_region_add_subregion(&s->bar, 0x08000,
109                                 sysbus_mmio_get_region(sysbus_dev, 0));
110 
111     qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0);
112     qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK);
113     qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4);
114     qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0));
115     qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1));
116     qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial);
117     qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial);
118     if (!qdev_realize(DEVICE(&s->escc), BUS(&s->macio_bus), &err)) {
119         error_propagate(errp, err);
120         return;
121     }
122 
123     macio_bar_setup(s);
124     pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
125 }
126 
127 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
128                               qemu_irq irq0, qemu_irq irq1, int dmaid,
129                               Error **errp)
130 {
131     SysBusDevice *sysbus_dev;
132 
133     sysbus_dev = SYS_BUS_DEVICE(ide);
134     sysbus_connect_irq(sysbus_dev, 0, irq0);
135     sysbus_connect_irq(sysbus_dev, 1, irq1);
136     qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid);
137     object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma",
138                              &error_abort);
139     macio_ide_register_dma(ide);
140 
141     qdev_realize(DEVICE(ide), BUS(&s->macio_bus), errp);
142 }
143 
144 static void macio_oldworld_realize(PCIDevice *d, Error **errp)
145 {
146     MacIOState *s = MACIO(d);
147     OldWorldMacIOState *os = OLDWORLD_MACIO(d);
148     DeviceState *pic_dev = DEVICE(os->pic);
149     Error *err = NULL;
150     SysBusDevice *sysbus_dev;
151 
152     macio_common_realize(d, &err);
153     if (err) {
154         error_propagate(errp, err);
155         return;
156     }
157 
158     qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
159                          s->frequency);
160     if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err)) {
161         error_propagate(errp, err);
162         return;
163     }
164     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
165     memory_region_add_subregion(&s->bar, 0x16000,
166                                 sysbus_mmio_get_region(sysbus_dev, 0));
167     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
168                                                        OLDWORLD_CUDA_IRQ));
169 
170     sysbus_dev = SYS_BUS_DEVICE(&s->escc);
171     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
172                                                        OLDWORLD_ESCCB_IRQ));
173     sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
174                                                        OLDWORLD_ESCCA_IRQ));
175 
176     if (!qdev_realize(DEVICE(&os->nvram), BUS(&s->macio_bus), &err)) {
177         error_propagate(errp, err);
178         return;
179     }
180     sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
181     memory_region_add_subregion(&s->bar, 0x60000,
182                                 sysbus_mmio_get_region(sysbus_dev, 0));
183     pmac_format_nvram_partition(&os->nvram, os->nvram.size);
184 
185     /* Heathrow PIC */
186     sysbus_dev = SYS_BUS_DEVICE(os->pic);
187     memory_region_add_subregion(&s->bar, 0x0,
188                                 sysbus_mmio_get_region(sysbus_dev, 0));
189 
190     /* IDE buses */
191     macio_realize_ide(s, &os->ide[0],
192                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ),
193                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ),
194                       0x16, &err);
195     if (err) {
196         error_propagate(errp, err);
197         return;
198     }
199 
200     macio_realize_ide(s, &os->ide[1],
201                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ),
202                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ),
203                       0x1a, &err);
204     if (err) {
205         error_propagate(errp, err);
206         return;
207     }
208 }
209 
210 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index)
211 {
212     gchar *name = g_strdup_printf("ide[%i]", index);
213     uint32_t addr = 0x1f000 + ((index + 1) * 0x1000);
214 
215     object_initialize_child(OBJECT(s), name, ide, TYPE_MACIO_IDE);
216     qdev_prop_set_uint32(DEVICE(ide), "addr", addr);
217     memory_region_add_subregion(&s->bar, addr, &ide->mem);
218     g_free(name);
219 }
220 
221 static void macio_oldworld_init(Object *obj)
222 {
223     MacIOState *s = MACIO(obj);
224     OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
225     DeviceState *dev;
226     int i;
227 
228     object_property_add_link(obj, "pic", TYPE_HEATHROW,
229                              (Object **) &os->pic,
230                              qdev_prop_allow_set_link_before_realize,
231                              0);
232 
233     object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA);
234 
235     object_initialize_child(OBJECT(s), "nvram", &os->nvram, TYPE_MACIO_NVRAM);
236     dev = DEVICE(&os->nvram);
237     qdev_prop_set_uint32(dev, "size", 0x2000);
238     qdev_prop_set_uint32(dev, "it_shift", 4);
239 
240     for (i = 0; i < 2; i++) {
241         macio_init_ide(s, &os->ide[i], i);
242     }
243 }
244 
245 static void timer_write(void *opaque, hwaddr addr, uint64_t value,
246                        unsigned size)
247 {
248     trace_macio_timer_write(addr, size, value);
249 }
250 
251 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
252 {
253     uint32_t value = 0;
254     uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
255     uint64_t kltime;
256 
257     kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
258     kltime = muldiv64(kltime, 18432000, 1048575);
259 
260     switch (addr) {
261     case 0x38:
262         value = kltime;
263         break;
264     case 0x3c:
265         value = kltime >> 32;
266         break;
267     }
268 
269     trace_macio_timer_read(addr, size, value);
270     return value;
271 }
272 
273 static const MemoryRegionOps timer_ops = {
274     .read = timer_read,
275     .write = timer_write,
276     .endianness = DEVICE_LITTLE_ENDIAN,
277 };
278 
279 static void macio_newworld_realize(PCIDevice *d, Error **errp)
280 {
281     MacIOState *s = MACIO(d);
282     NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
283     DeviceState *pic_dev = DEVICE(ns->pic);
284     Error *err = NULL;
285     SysBusDevice *sysbus_dev;
286     MemoryRegion *timer_memory = NULL;
287 
288     macio_common_realize(d, &err);
289     if (err) {
290         error_propagate(errp, err);
291         return;
292     }
293 
294     sysbus_dev = SYS_BUS_DEVICE(&s->escc);
295     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
296                                                        NEWWORLD_ESCCB_IRQ));
297     sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
298                                                        NEWWORLD_ESCCA_IRQ));
299 
300     /* OpenPIC */
301     sysbus_dev = SYS_BUS_DEVICE(ns->pic);
302     memory_region_add_subregion(&s->bar, 0x40000,
303                                 sysbus_mmio_get_region(sysbus_dev, 0));
304 
305     /* IDE buses */
306     macio_realize_ide(s, &ns->ide[0],
307                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ),
308                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ),
309                       0x16, &err);
310     if (err) {
311         error_propagate(errp, err);
312         return;
313     }
314 
315     macio_realize_ide(s, &ns->ide[1],
316                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ),
317                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ),
318                       0x1a, &err);
319     if (err) {
320         error_propagate(errp, err);
321         return;
322     }
323 
324     /* Timer */
325     timer_memory = g_new(MemoryRegion, 1);
326     memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
327                           0x1000);
328     memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
329 
330     if (ns->has_pmu) {
331         /* GPIOs */
332         sysbus_dev = SYS_BUS_DEVICE(&ns->gpio);
333         object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic",
334                                  &error_abort);
335         memory_region_add_subregion(&s->bar, 0x50,
336                                     sysbus_mmio_get_region(sysbus_dev, 0));
337         if (!qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), errp)) {
338             return;
339         }
340 
341         /* PMU */
342         object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU);
343         object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio",
344                                  &error_abort);
345         qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb);
346         if (!qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), &err)) {
347             error_propagate(errp, err);
348             return;
349         }
350         sysbus_dev = SYS_BUS_DEVICE(&s->pmu);
351         sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
352                                                            NEWWORLD_PMU_IRQ));
353         memory_region_add_subregion(&s->bar, 0x16000,
354                                     sysbus_mmio_get_region(sysbus_dev, 0));
355     } else {
356         object_unparent(OBJECT(&ns->gpio));
357 
358         /* CUDA */
359         object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA);
360         qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
361                              s->frequency);
362 
363         if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err)) {
364             error_propagate(errp, err);
365             return;
366         }
367         sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
368         sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
369                                                            NEWWORLD_CUDA_IRQ));
370         memory_region_add_subregion(&s->bar, 0x16000,
371                                     sysbus_mmio_get_region(sysbus_dev, 0));
372     }
373 }
374 
375 static void macio_newworld_init(Object *obj)
376 {
377     MacIOState *s = MACIO(obj);
378     NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
379     int i;
380 
381     object_property_add_link(obj, "pic", TYPE_OPENPIC,
382                              (Object **) &ns->pic,
383                              qdev_prop_allow_set_link_before_realize,
384                              0);
385 
386     object_initialize_child(OBJECT(s), "gpio", &ns->gpio, TYPE_MACIO_GPIO);
387 
388     for (i = 0; i < 2; i++) {
389         macio_init_ide(s, &ns->ide[i], i);
390     }
391 }
392 
393 static void macio_instance_init(Object *obj)
394 {
395     MacIOState *s = MACIO(obj);
396 
397     memory_region_init(&s->bar, obj, "macio", 0x80000);
398 
399     qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS,
400                         DEVICE(obj), "macio.0");
401 
402     object_initialize_child(OBJECT(s), "dbdma", &s->dbdma, TYPE_MAC_DBDMA);
403 
404     object_initialize_child(OBJECT(s), "escc", &s->escc, TYPE_ESCC);
405 }
406 
407 static const VMStateDescription vmstate_macio_oldworld = {
408     .name = "macio-oldworld",
409     .version_id = 0,
410     .minimum_version_id = 0,
411     .fields = (VMStateField[]) {
412         VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
413         VMSTATE_END_OF_LIST()
414     }
415 };
416 
417 static void macio_oldworld_class_init(ObjectClass *oc, void *data)
418 {
419     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
420     DeviceClass *dc = DEVICE_CLASS(oc);
421 
422     pdc->realize = macio_oldworld_realize;
423     pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
424     dc->vmsd = &vmstate_macio_oldworld;
425 }
426 
427 static const VMStateDescription vmstate_macio_newworld = {
428     .name = "macio-newworld",
429     .version_id = 0,
430     .minimum_version_id = 0,
431     .fields = (VMStateField[]) {
432         VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
433         VMSTATE_END_OF_LIST()
434     }
435 };
436 
437 static Property macio_newworld_properties[] = {
438     DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false),
439     DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false),
440     DEFINE_PROP_END_OF_LIST()
441 };
442 
443 static void macio_newworld_class_init(ObjectClass *oc, void *data)
444 {
445     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
446     DeviceClass *dc = DEVICE_CLASS(oc);
447 
448     pdc->realize = macio_newworld_realize;
449     pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
450     dc->vmsd = &vmstate_macio_newworld;
451     device_class_set_props(dc, macio_newworld_properties);
452 }
453 
454 static Property macio_properties[] = {
455     DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
456     DEFINE_PROP_END_OF_LIST()
457 };
458 
459 static void macio_class_init(ObjectClass *klass, void *data)
460 {
461     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
462     DeviceClass *dc = DEVICE_CLASS(klass);
463 
464     k->vendor_id = PCI_VENDOR_ID_APPLE;
465     k->class_id = PCI_CLASS_OTHERS << 8;
466     device_class_set_props(dc, macio_properties);
467     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
468     /* Reason: Uses serial_hds in macio_instance_init */
469     dc->user_creatable = false;
470 }
471 
472 static const TypeInfo macio_bus_info = {
473     .name = TYPE_MACIO_BUS,
474     .parent = TYPE_SYSTEM_BUS,
475     .instance_size = sizeof(MacIOBusState),
476 };
477 
478 static const TypeInfo macio_oldworld_type_info = {
479     .name          = TYPE_OLDWORLD_MACIO,
480     .parent        = TYPE_MACIO,
481     .instance_size = sizeof(OldWorldMacIOState),
482     .instance_init = macio_oldworld_init,
483     .class_init    = macio_oldworld_class_init,
484 };
485 
486 static const TypeInfo macio_newworld_type_info = {
487     .name          = TYPE_NEWWORLD_MACIO,
488     .parent        = TYPE_MACIO,
489     .instance_size = sizeof(NewWorldMacIOState),
490     .instance_init = macio_newworld_init,
491     .class_init    = macio_newworld_class_init,
492 };
493 
494 static const TypeInfo macio_type_info = {
495     .name          = TYPE_MACIO,
496     .parent        = TYPE_PCI_DEVICE,
497     .instance_size = sizeof(MacIOState),
498     .instance_init = macio_instance_init,
499     .abstract      = true,
500     .class_init    = macio_class_init,
501     .interfaces = (InterfaceInfo[]) {
502         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
503         { },
504     },
505 };
506 
507 static void macio_register_types(void)
508 {
509     type_register_static(&macio_bus_info);
510     type_register_static(&macio_type_info);
511     type_register_static(&macio_oldworld_type_info);
512     type_register_static(&macio_newworld_type_info);
513 }
514 
515 type_init(macio_register_types)
516