1 /* 2 * PowerMac MacIO device emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "qemu/module.h" 29 #include "hw/ppc/mac.h" 30 #include "hw/misc/macio/cuda.h" 31 #include "hw/pci/pci.h" 32 #include "hw/ppc/mac_dbdma.h" 33 #include "hw/qdev-properties.h" 34 #include "migration/vmstate.h" 35 #include "hw/char/escc.h" 36 #include "hw/misc/macio/macio.h" 37 #include "hw/intc/heathrow_pic.h" 38 #include "sysemu/sysemu.h" 39 #include "trace.h" 40 41 /* Note: this code is strongly inspirated from the corresponding code 42 * in PearPC */ 43 44 /* 45 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", 46 * while the other one is the normal, current ESCC interface. 47 * 48 * The magic below creates memory aliases to spawn the escc-legacy device 49 * purely by rerouting the respective registers to our escc region. This 50 * works because the only difference between the two memory regions is the 51 * register layout, not their semantics. 52 * 53 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf 54 */ 55 static void macio_escc_legacy_setup(MacIOState *s) 56 { 57 ESCCState *escc = ESCC(&s->escc); 58 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 59 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); 60 MemoryRegion *bar = &s->bar; 61 int i; 62 static const int maps[] = { 63 0x00, 0x00, /* Command B */ 64 0x02, 0x20, /* Command A */ 65 0x04, 0x10, /* Data B */ 66 0x06, 0x30, /* Data A */ 67 0x08, 0x40, /* Enhancement B */ 68 0x0A, 0x50, /* Enhancement A */ 69 0x80, 0x80, /* Recovery count */ 70 0x90, 0x90, /* Start A */ 71 0xa0, 0xa0, /* Start B */ 72 0xb0, 0xb0, /* Detect AB */ 73 }; 74 75 memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256); 76 for (i = 0; i < ARRAY_SIZE(maps); i += 2) { 77 MemoryRegion *port = g_new(MemoryRegion, 1); 78 memory_region_init_alias(port, OBJECT(s), "escc-legacy-port", 79 sysbus_mmio_get_region(sbd, 0), 80 maps[i + 1], 0x2); 81 memory_region_add_subregion(escc_legacy, maps[i], port); 82 } 83 84 memory_region_add_subregion(bar, 0x12000, escc_legacy); 85 } 86 87 static void macio_bar_setup(MacIOState *s) 88 { 89 ESCCState *escc = ESCC(&s->escc); 90 SysBusDevice *sbd = SYS_BUS_DEVICE(escc); 91 MemoryRegion *bar = &s->bar; 92 93 memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0)); 94 macio_escc_legacy_setup(s); 95 } 96 97 static void macio_common_realize(PCIDevice *d, Error **errp) 98 { 99 MacIOState *s = MACIO(d); 100 SysBusDevice *sysbus_dev; 101 Error *err = NULL; 102 103 qdev_realize(DEVICE(&s->dbdma), BUS(&s->macio_bus), &err); 104 if (err) { 105 error_propagate(errp, err); 106 return; 107 } 108 sysbus_dev = SYS_BUS_DEVICE(&s->dbdma); 109 memory_region_add_subregion(&s->bar, 0x08000, 110 sysbus_mmio_get_region(sysbus_dev, 0)); 111 112 qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0); 113 qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK); 114 qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4); 115 qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0)); 116 qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1)); 117 qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); 118 qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); 119 qdev_realize(DEVICE(&s->escc), BUS(&s->macio_bus), &err); 120 if (err) { 121 error_propagate(errp, err); 122 return; 123 } 124 125 macio_bar_setup(s); 126 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); 127 } 128 129 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide, 130 qemu_irq irq0, qemu_irq irq1, int dmaid, 131 Error **errp) 132 { 133 SysBusDevice *sysbus_dev; 134 135 sysbus_dev = SYS_BUS_DEVICE(ide); 136 sysbus_connect_irq(sysbus_dev, 0, irq0); 137 sysbus_connect_irq(sysbus_dev, 1, irq1); 138 qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid); 139 object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp); 140 macio_ide_register_dma(ide); 141 142 qdev_realize(DEVICE(ide), BUS(&s->macio_bus), errp); 143 } 144 145 static void macio_oldworld_realize(PCIDevice *d, Error **errp) 146 { 147 MacIOState *s = MACIO(d); 148 OldWorldMacIOState *os = OLDWORLD_MACIO(d); 149 DeviceState *pic_dev = DEVICE(os->pic); 150 Error *err = NULL; 151 SysBusDevice *sysbus_dev; 152 153 macio_common_realize(d, &err); 154 if (err) { 155 error_propagate(errp, err); 156 return; 157 } 158 159 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 160 s->frequency); 161 qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err); 162 if (err) { 163 error_propagate(errp, err); 164 return; 165 } 166 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 167 memory_region_add_subregion(&s->bar, 0x16000, 168 sysbus_mmio_get_region(sysbus_dev, 0)); 169 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 170 OLDWORLD_CUDA_IRQ)); 171 172 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 173 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 174 OLDWORLD_ESCCB_IRQ)); 175 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 176 OLDWORLD_ESCCA_IRQ)); 177 178 qdev_realize(DEVICE(&os->nvram), BUS(&s->macio_bus), &err); 179 if (err) { 180 error_propagate(errp, err); 181 return; 182 } 183 sysbus_dev = SYS_BUS_DEVICE(&os->nvram); 184 memory_region_add_subregion(&s->bar, 0x60000, 185 sysbus_mmio_get_region(sysbus_dev, 0)); 186 pmac_format_nvram_partition(&os->nvram, os->nvram.size); 187 188 /* Heathrow PIC */ 189 sysbus_dev = SYS_BUS_DEVICE(os->pic); 190 memory_region_add_subregion(&s->bar, 0x0, 191 sysbus_mmio_get_region(sysbus_dev, 0)); 192 193 /* IDE buses */ 194 macio_realize_ide(s, &os->ide[0], 195 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ), 196 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ), 197 0x16, &err); 198 if (err) { 199 error_propagate(errp, err); 200 return; 201 } 202 203 macio_realize_ide(s, &os->ide[1], 204 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ), 205 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ), 206 0x1a, &err); 207 if (err) { 208 error_propagate(errp, err); 209 return; 210 } 211 } 212 213 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index) 214 { 215 gchar *name = g_strdup_printf("ide[%i]", index); 216 uint32_t addr = 0x1f000 + ((index + 1) * 0x1000); 217 218 object_initialize_child(OBJECT(s), name, ide, TYPE_MACIO_IDE); 219 qdev_prop_set_uint32(DEVICE(ide), "addr", addr); 220 memory_region_add_subregion(&s->bar, addr, &ide->mem); 221 g_free(name); 222 } 223 224 static void macio_oldworld_init(Object *obj) 225 { 226 MacIOState *s = MACIO(obj); 227 OldWorldMacIOState *os = OLDWORLD_MACIO(obj); 228 DeviceState *dev; 229 int i; 230 231 object_property_add_link(obj, "pic", TYPE_HEATHROW, 232 (Object **) &os->pic, 233 qdev_prop_allow_set_link_before_realize, 234 0); 235 236 object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); 237 238 object_initialize_child(OBJECT(s), "nvram", &os->nvram, TYPE_MACIO_NVRAM); 239 dev = DEVICE(&os->nvram); 240 qdev_prop_set_uint32(dev, "size", 0x2000); 241 qdev_prop_set_uint32(dev, "it_shift", 4); 242 243 for (i = 0; i < 2; i++) { 244 macio_init_ide(s, &os->ide[i], i); 245 } 246 } 247 248 static void timer_write(void *opaque, hwaddr addr, uint64_t value, 249 unsigned size) 250 { 251 trace_macio_timer_write(addr, size, value); 252 } 253 254 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) 255 { 256 uint32_t value = 0; 257 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 258 uint64_t kltime; 259 260 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4); 261 kltime = muldiv64(kltime, 18432000, 1048575); 262 263 switch (addr) { 264 case 0x38: 265 value = kltime; 266 break; 267 case 0x3c: 268 value = kltime >> 32; 269 break; 270 } 271 272 trace_macio_timer_read(addr, size, value); 273 return value; 274 } 275 276 static const MemoryRegionOps timer_ops = { 277 .read = timer_read, 278 .write = timer_write, 279 .endianness = DEVICE_LITTLE_ENDIAN, 280 }; 281 282 static void macio_newworld_realize(PCIDevice *d, Error **errp) 283 { 284 MacIOState *s = MACIO(d); 285 NewWorldMacIOState *ns = NEWWORLD_MACIO(d); 286 DeviceState *pic_dev = DEVICE(ns->pic); 287 Error *err = NULL; 288 SysBusDevice *sysbus_dev; 289 MemoryRegion *timer_memory = NULL; 290 291 macio_common_realize(d, &err); 292 if (err) { 293 error_propagate(errp, err); 294 return; 295 } 296 297 sysbus_dev = SYS_BUS_DEVICE(&s->escc); 298 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 299 NEWWORLD_ESCCB_IRQ)); 300 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, 301 NEWWORLD_ESCCA_IRQ)); 302 303 /* OpenPIC */ 304 sysbus_dev = SYS_BUS_DEVICE(ns->pic); 305 memory_region_add_subregion(&s->bar, 0x40000, 306 sysbus_mmio_get_region(sysbus_dev, 0)); 307 308 /* IDE buses */ 309 macio_realize_ide(s, &ns->ide[0], 310 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ), 311 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ), 312 0x16, &err); 313 if (err) { 314 error_propagate(errp, err); 315 return; 316 } 317 318 macio_realize_ide(s, &ns->ide[1], 319 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ), 320 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ), 321 0x1a, &err); 322 if (err) { 323 error_propagate(errp, err); 324 return; 325 } 326 327 /* Timer */ 328 timer_memory = g_new(MemoryRegion, 1); 329 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", 330 0x1000); 331 memory_region_add_subregion(&s->bar, 0x15000, timer_memory); 332 333 if (ns->has_pmu) { 334 /* GPIOs */ 335 sysbus_dev = SYS_BUS_DEVICE(&ns->gpio); 336 object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic", 337 &error_abort); 338 memory_region_add_subregion(&s->bar, 0x50, 339 sysbus_mmio_get_region(sysbus_dev, 0)); 340 qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), &err); 341 342 /* PMU */ 343 object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU); 344 object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio", 345 &error_abort); 346 qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); 347 qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), &err); 348 if (err) { 349 error_propagate(errp, err); 350 return; 351 } 352 sysbus_dev = SYS_BUS_DEVICE(&s->pmu); 353 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 354 NEWWORLD_PMU_IRQ)); 355 memory_region_add_subregion(&s->bar, 0x16000, 356 sysbus_mmio_get_region(sysbus_dev, 0)); 357 } else { 358 object_unparent(OBJECT(&ns->gpio)); 359 360 /* CUDA */ 361 object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); 362 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", 363 s->frequency); 364 365 qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err); 366 if (err) { 367 error_propagate(errp, err); 368 return; 369 } 370 sysbus_dev = SYS_BUS_DEVICE(&s->cuda); 371 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev, 372 NEWWORLD_CUDA_IRQ)); 373 memory_region_add_subregion(&s->bar, 0x16000, 374 sysbus_mmio_get_region(sysbus_dev, 0)); 375 } 376 } 377 378 static void macio_newworld_init(Object *obj) 379 { 380 MacIOState *s = MACIO(obj); 381 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); 382 int i; 383 384 object_property_add_link(obj, "pic", TYPE_OPENPIC, 385 (Object **) &ns->pic, 386 qdev_prop_allow_set_link_before_realize, 387 0); 388 389 object_initialize_child(OBJECT(s), "gpio", &ns->gpio, TYPE_MACIO_GPIO); 390 391 for (i = 0; i < 2; i++) { 392 macio_init_ide(s, &ns->ide[i], i); 393 } 394 } 395 396 static void macio_instance_init(Object *obj) 397 { 398 MacIOState *s = MACIO(obj); 399 400 memory_region_init(&s->bar, obj, "macio", 0x80000); 401 402 qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS, 403 DEVICE(obj), "macio.0"); 404 405 object_initialize_child(OBJECT(s), "dbdma", &s->dbdma, TYPE_MAC_DBDMA); 406 407 object_initialize_child(OBJECT(s), "escc", &s->escc, TYPE_ESCC); 408 } 409 410 static const VMStateDescription vmstate_macio_oldworld = { 411 .name = "macio-oldworld", 412 .version_id = 0, 413 .minimum_version_id = 0, 414 .fields = (VMStateField[]) { 415 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), 416 VMSTATE_END_OF_LIST() 417 } 418 }; 419 420 static void macio_oldworld_class_init(ObjectClass *oc, void *data) 421 { 422 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 423 DeviceClass *dc = DEVICE_CLASS(oc); 424 425 pdc->realize = macio_oldworld_realize; 426 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; 427 dc->vmsd = &vmstate_macio_oldworld; 428 } 429 430 static const VMStateDescription vmstate_macio_newworld = { 431 .name = "macio-newworld", 432 .version_id = 0, 433 .minimum_version_id = 0, 434 .fields = (VMStateField[]) { 435 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), 436 VMSTATE_END_OF_LIST() 437 } 438 }; 439 440 static Property macio_newworld_properties[] = { 441 DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false), 442 DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false), 443 DEFINE_PROP_END_OF_LIST() 444 }; 445 446 static void macio_newworld_class_init(ObjectClass *oc, void *data) 447 { 448 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); 449 DeviceClass *dc = DEVICE_CLASS(oc); 450 451 pdc->realize = macio_newworld_realize; 452 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; 453 dc->vmsd = &vmstate_macio_newworld; 454 device_class_set_props(dc, macio_newworld_properties); 455 } 456 457 static Property macio_properties[] = { 458 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), 459 DEFINE_PROP_END_OF_LIST() 460 }; 461 462 static void macio_class_init(ObjectClass *klass, void *data) 463 { 464 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 465 DeviceClass *dc = DEVICE_CLASS(klass); 466 467 k->vendor_id = PCI_VENDOR_ID_APPLE; 468 k->class_id = PCI_CLASS_OTHERS << 8; 469 device_class_set_props(dc, macio_properties); 470 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 471 /* Reason: Uses serial_hds in macio_instance_init */ 472 dc->user_creatable = false; 473 } 474 475 static const TypeInfo macio_bus_info = { 476 .name = TYPE_MACIO_BUS, 477 .parent = TYPE_SYSTEM_BUS, 478 .instance_size = sizeof(MacIOBusState), 479 }; 480 481 static const TypeInfo macio_oldworld_type_info = { 482 .name = TYPE_OLDWORLD_MACIO, 483 .parent = TYPE_MACIO, 484 .instance_size = sizeof(OldWorldMacIOState), 485 .instance_init = macio_oldworld_init, 486 .class_init = macio_oldworld_class_init, 487 }; 488 489 static const TypeInfo macio_newworld_type_info = { 490 .name = TYPE_NEWWORLD_MACIO, 491 .parent = TYPE_MACIO, 492 .instance_size = sizeof(NewWorldMacIOState), 493 .instance_init = macio_newworld_init, 494 .class_init = macio_newworld_class_init, 495 }; 496 497 static const TypeInfo macio_type_info = { 498 .name = TYPE_MACIO, 499 .parent = TYPE_PCI_DEVICE, 500 .instance_size = sizeof(MacIOState), 501 .instance_init = macio_instance_init, 502 .abstract = true, 503 .class_init = macio_class_init, 504 .interfaces = (InterfaceInfo[]) { 505 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 506 { }, 507 }, 508 }; 509 510 static void macio_register_types(void) 511 { 512 type_register_static(&macio_bus_info); 513 type_register_static(&macio_type_info); 514 type_register_static(&macio_oldworld_type_info); 515 type_register_static(&macio_newworld_type_info); 516 } 517 518 type_init(macio_register_types) 519