xref: /openbmc/qemu/hw/misc/macio/macio.c (revision 14b61600)
1 /*
2  * PowerMac MacIO device emulation
3  *
4  * Copyright (c) 2005-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 #include "hw/hw.h"
26 #include "hw/ppc/mac.h"
27 #include "hw/pci/pci.h"
28 #include "hw/ppc/mac_dbdma.h"
29 #include "hw/char/escc.h"
30 
31 #define TYPE_MACIO "macio"
32 #define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
33 
34 typedef struct MacIOState
35 {
36     /*< private >*/
37     PCIDevice parent;
38     /*< public >*/
39 
40     MemoryRegion bar;
41     CUDAState cuda;
42     void *dbdma;
43     MemoryRegion *pic_mem;
44     MemoryRegion *escc_mem;
45     uint64_t frequency;
46 } MacIOState;
47 
48 #define OLDWORLD_MACIO(obj) \
49     OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
50 
51 typedef struct OldWorldMacIOState {
52     /*< private >*/
53     MacIOState parent_obj;
54     /*< public >*/
55 
56     qemu_irq irqs[5];
57 
58     MacIONVRAMState nvram;
59     MACIOIDEState ide[2];
60 } OldWorldMacIOState;
61 
62 #define NEWWORLD_MACIO(obj) \
63     OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
64 
65 typedef struct NewWorldMacIOState {
66     /*< private >*/
67     MacIOState parent_obj;
68     /*< public >*/
69     qemu_irq irqs[5];
70     MACIOIDEState ide[2];
71 } NewWorldMacIOState;
72 
73 /*
74  * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
75  * while the other one is the normal, current ESCC interface.
76  *
77  * The magic below creates memory aliases to spawn the escc-legacy device
78  * purely by rerouting the respective registers to our escc region. This
79  * works because the only difference between the two memory regions is the
80  * register layout, not their semantics.
81  *
82  * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
83  */
84 static void macio_escc_legacy_setup(MacIOState *macio_state)
85 {
86     MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
87     MemoryRegion *bar = &macio_state->bar;
88     int i;
89     static const int maps[] = {
90         0x00, 0x00,
91         0x02, 0x20,
92         0x04, 0x10,
93         0x06, 0x30,
94         0x08, 0x40,
95         0x0A, 0x50,
96         0x60, 0x60,
97         0x70, 0x70,
98         0x80, 0x70,
99         0x90, 0x80,
100         0xA0, 0x90,
101         0xB0, 0xA0,
102         0xC0, 0xB0,
103         0xD0, 0xC0,
104         0xE0, 0xD0,
105         0xF0, 0xE0,
106     };
107 
108     memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256);
109     for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
110         MemoryRegion *port = g_new(MemoryRegion, 1);
111         memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port",
112                                  macio_state->escc_mem, maps[i+1], 0x2);
113         memory_region_add_subregion(escc_legacy, maps[i], port);
114     }
115 
116     memory_region_add_subregion(bar, 0x12000, escc_legacy);
117 }
118 
119 static void macio_bar_setup(MacIOState *macio_state)
120 {
121     MemoryRegion *bar = &macio_state->bar;
122 
123     if (macio_state->escc_mem) {
124         memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
125         macio_escc_legacy_setup(macio_state);
126     }
127 }
128 
129 static void macio_common_realize(PCIDevice *d, Error **errp)
130 {
131     MacIOState *s = MACIO(d);
132     SysBusDevice *sysbus_dev;
133     Error *err = NULL;
134     MemoryRegion *dbdma_mem;
135 
136     s->dbdma = DBDMA_init(&dbdma_mem);
137     memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
138 
139     object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
140     if (err) {
141         error_propagate(errp, err);
142         return;
143     }
144     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
145     memory_region_add_subregion(&s->bar, 0x16000,
146                                 sysbus_mmio_get_region(sysbus_dev, 0));
147 
148     macio_bar_setup(s);
149     pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
150 }
151 
152 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
153                               qemu_irq irq0, qemu_irq irq1, int dmaid,
154                               Error **errp)
155 {
156     SysBusDevice *sysbus_dev;
157 
158     sysbus_dev = SYS_BUS_DEVICE(ide);
159     sysbus_connect_irq(sysbus_dev, 0, irq0);
160     sysbus_connect_irq(sysbus_dev, 1, irq1);
161     macio_ide_register_dma(ide, s->dbdma, dmaid);
162     object_property_set_bool(OBJECT(ide), true, "realized", errp);
163 }
164 
165 static void macio_oldworld_realize(PCIDevice *d, Error **errp)
166 {
167     MacIOState *s = MACIO(d);
168     OldWorldMacIOState *os = OLDWORLD_MACIO(d);
169     Error *err = NULL;
170     SysBusDevice *sysbus_dev;
171     int i;
172     int cur_irq = 0;
173 
174     macio_common_realize(d, &err);
175     if (err) {
176         error_propagate(errp, err);
177         return;
178     }
179 
180     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
181     sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
182 
183     object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
184     if (err) {
185         error_propagate(errp, err);
186         return;
187     }
188     sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
189     memory_region_add_subregion(&s->bar, 0x60000,
190                                 sysbus_mmio_get_region(sysbus_dev, 0));
191     pmac_format_nvram_partition(&os->nvram, os->nvram.size);
192 
193     if (s->pic_mem) {
194         /* Heathrow PIC */
195         memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
196     }
197 
198     /* IDE buses */
199     for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
200         qemu_irq irq0 = os->irqs[cur_irq++];
201         qemu_irq irq1 = os->irqs[cur_irq++];
202 
203         macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
204         if (err) {
205             error_propagate(errp, err);
206             return;
207         }
208     }
209 }
210 
211 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
212                            int index)
213 {
214     gchar *name;
215 
216     object_initialize(ide, ide_size, TYPE_MACIO_IDE);
217     qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
218     memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
219                                 &ide->mem);
220     name = g_strdup_printf("ide[%i]", index);
221     object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
222     g_free(name);
223 }
224 
225 static void macio_oldworld_init(Object *obj)
226 {
227     MacIOState *s = MACIO(obj);
228     OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
229     DeviceState *dev;
230     int i;
231 
232     qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
233 
234     object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
235     dev = DEVICE(&os->nvram);
236     qdev_prop_set_uint32(dev, "size", 0x2000);
237     qdev_prop_set_uint32(dev, "it_shift", 4);
238 
239     for (i = 0; i < 2; i++) {
240         macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
241     }
242 }
243 
244 static void timer_write(void *opaque, hwaddr addr, uint64_t value,
245                        unsigned size)
246 {
247 }
248 
249 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
250 {
251     uint32_t value = 0;
252     uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
253     uint64_t kltime;
254 
255     kltime = muldiv64(systime, 4194300, get_ticks_per_sec() * 4);
256     kltime = muldiv64(kltime, 18432000, 1048575);
257 
258     switch (addr) {
259     case 0x38:
260         value = kltime;
261         break;
262     case 0x3c:
263         value = kltime >> 32;
264         break;
265     }
266 
267     return value;
268 }
269 
270 static const MemoryRegionOps timer_ops = {
271     .read = timer_read,
272     .write = timer_write,
273     .endianness = DEVICE_LITTLE_ENDIAN,
274 };
275 
276 static void macio_newworld_realize(PCIDevice *d, Error **errp)
277 {
278     MacIOState *s = MACIO(d);
279     NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
280     Error *err = NULL;
281     SysBusDevice *sysbus_dev;
282     MemoryRegion *timer_memory = NULL;
283     int i;
284     int cur_irq = 0;
285 
286     macio_common_realize(d, &err);
287     if (err) {
288         error_propagate(errp, err);
289         return;
290     }
291 
292     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
293     sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
294 
295     if (s->pic_mem) {
296         /* OpenPIC */
297         memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
298     }
299 
300     /* IDE buses */
301     for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
302         qemu_irq irq0 = ns->irqs[cur_irq++];
303         qemu_irq irq1 = ns->irqs[cur_irq++];
304 
305         macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
306         if (err) {
307             error_propagate(errp, err);
308             return;
309         }
310     }
311 
312     /* Timer */
313     timer_memory = g_new(MemoryRegion, 1);
314     memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
315                           0x1000);
316     memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
317 }
318 
319 static void macio_newworld_init(Object *obj)
320 {
321     MacIOState *s = MACIO(obj);
322     NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
323     int i;
324 
325     qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
326 
327     for (i = 0; i < 2; i++) {
328         macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
329     }
330 }
331 
332 static void macio_instance_init(Object *obj)
333 {
334     MacIOState *s = MACIO(obj);
335 
336     memory_region_init(&s->bar, obj, "macio", 0x80000);
337 
338     object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
339     qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
340     object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
341 }
342 
343 static const VMStateDescription vmstate_macio_oldworld = {
344     .name = "macio-oldworld",
345     .version_id = 0,
346     .minimum_version_id = 0,
347     .fields = (VMStateField[]) {
348         VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
349         VMSTATE_END_OF_LIST()
350     }
351 };
352 
353 static void macio_oldworld_class_init(ObjectClass *oc, void *data)
354 {
355     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
356     DeviceClass *dc = DEVICE_CLASS(oc);
357 
358     pdc->realize = macio_oldworld_realize;
359     pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
360     dc->vmsd = &vmstate_macio_oldworld;
361 }
362 
363 static const VMStateDescription vmstate_macio_newworld = {
364     .name = "macio-newworld",
365     .version_id = 0,
366     .minimum_version_id = 0,
367     .fields = (VMStateField[]) {
368         VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
369         VMSTATE_END_OF_LIST()
370     }
371 };
372 
373 static void macio_newworld_class_init(ObjectClass *oc, void *data)
374 {
375     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
376     DeviceClass *dc = DEVICE_CLASS(oc);
377 
378     pdc->realize = macio_newworld_realize;
379     pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
380     dc->vmsd = &vmstate_macio_newworld;
381 }
382 
383 static Property macio_properties[] = {
384     DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
385     DEFINE_PROP_END_OF_LIST()
386 };
387 
388 static void macio_class_init(ObjectClass *klass, void *data)
389 {
390     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
391     DeviceClass *dc = DEVICE_CLASS(klass);
392 
393     k->vendor_id = PCI_VENDOR_ID_APPLE;
394     k->class_id = PCI_CLASS_OTHERS << 8;
395     dc->props = macio_properties;
396     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
397 }
398 
399 static const TypeInfo macio_oldworld_type_info = {
400     .name          = TYPE_OLDWORLD_MACIO,
401     .parent        = TYPE_MACIO,
402     .instance_size = sizeof(OldWorldMacIOState),
403     .instance_init = macio_oldworld_init,
404     .class_init    = macio_oldworld_class_init,
405 };
406 
407 static const TypeInfo macio_newworld_type_info = {
408     .name          = TYPE_NEWWORLD_MACIO,
409     .parent        = TYPE_MACIO,
410     .instance_size = sizeof(NewWorldMacIOState),
411     .instance_init = macio_newworld_init,
412     .class_init    = macio_newworld_class_init,
413 };
414 
415 static const TypeInfo macio_type_info = {
416     .name          = TYPE_MACIO,
417     .parent        = TYPE_PCI_DEVICE,
418     .instance_size = sizeof(MacIOState),
419     .instance_init = macio_instance_init,
420     .abstract      = true,
421     .class_init    = macio_class_init,
422 };
423 
424 static void macio_register_types(void)
425 {
426     type_register_static(&macio_type_info);
427     type_register_static(&macio_oldworld_type_info);
428     type_register_static(&macio_newworld_type_info);
429 }
430 
431 type_init(macio_register_types)
432 
433 void macio_init(PCIDevice *d,
434                 MemoryRegion *pic_mem,
435                 MemoryRegion *escc_mem)
436 {
437     MacIOState *macio_state = MACIO(d);
438 
439     macio_state->pic_mem = pic_mem;
440     macio_state->escc_mem = escc_mem;
441     /* Note: this code is strongly inspirated from the corresponding code
442        in PearPC */
443     qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
444                          macio_state->frequency);
445 
446     qdev_init_nofail(DEVICE(d));
447 }
448