1 /* 2 * PowerMac NewWorld MacIO GPIO emulation 3 * 4 * Copyright (c) 2016 Benjamin Herrenschmidt 5 * Copyright (c) 2018 Mark Cave-Ayland 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "hw/hw.h" 28 #include "hw/ppc/mac.h" 29 #include "hw/misc/macio/macio.h" 30 #include "hw/misc/macio/gpio.h" 31 #include "hw/nmi.h" 32 #include "qemu/log.h" 33 #include "qemu/module.h" 34 #include "trace.h" 35 36 37 void macio_set_gpio(MacIOGPIOState *s, uint32_t gpio, bool state) 38 { 39 uint8_t new_reg; 40 41 trace_macio_set_gpio(gpio, state); 42 43 if (s->gpio_regs[gpio] & 4) { 44 qemu_log_mask(LOG_GUEST_ERROR, 45 "GPIO: Setting GPIO %d while it's an output\n", gpio); 46 } 47 48 new_reg = s->gpio_regs[gpio] & ~2; 49 if (state) { 50 new_reg |= 2; 51 } 52 53 if (new_reg == s->gpio_regs[gpio]) { 54 return; 55 } 56 57 s->gpio_regs[gpio] = new_reg; 58 59 /* This is will work until we fix the binding between MacIO and 60 * the MPIC properly so we can route all GPIOs and avoid going 61 * via the top level platform code. 62 * 63 * Note that we probably need to get access to the MPIC config to 64 * decode polarity since qemu always use "raise" regardless. 65 * 66 * For now, we hard wire known GPIOs 67 */ 68 69 switch (gpio) { 70 case 1: 71 /* Level low */ 72 if (!state) { 73 trace_macio_gpio_irq_assert(gpio); 74 qemu_irq_raise(s->gpio_extirqs[gpio]); 75 } else { 76 trace_macio_gpio_irq_deassert(gpio); 77 qemu_irq_lower(s->gpio_extirqs[gpio]); 78 } 79 break; 80 81 case 9: 82 /* Edge, triggered by NMI below */ 83 if (state) { 84 trace_macio_gpio_irq_assert(gpio); 85 qemu_irq_raise(s->gpio_extirqs[gpio]); 86 } else { 87 trace_macio_gpio_irq_deassert(gpio); 88 qemu_irq_lower(s->gpio_extirqs[gpio]); 89 } 90 break; 91 92 default: 93 qemu_log_mask(LOG_UNIMP, "GPIO: setting unimplemented GPIO %d", gpio); 94 } 95 } 96 97 static void macio_gpio_write(void *opaque, hwaddr addr, uint64_t value, 98 unsigned size) 99 { 100 MacIOGPIOState *s = opaque; 101 uint8_t ibit; 102 103 trace_macio_gpio_write(addr, value); 104 105 /* Levels regs are read-only */ 106 if (addr < 8) { 107 return; 108 } 109 110 addr -= 8; 111 if (addr < 36) { 112 value &= ~2; 113 114 if (value & 4) { 115 ibit = (value & 1) << 1; 116 } else { 117 ibit = s->gpio_regs[addr] & 2; 118 } 119 120 s->gpio_regs[addr] = value | ibit; 121 } 122 } 123 124 static uint64_t macio_gpio_read(void *opaque, hwaddr addr, unsigned size) 125 { 126 MacIOGPIOState *s = opaque; 127 uint64_t val = 0; 128 129 /* Levels regs */ 130 if (addr < 8) { 131 val = s->gpio_levels[addr]; 132 } else { 133 addr -= 8; 134 135 if (addr < 36) { 136 val = s->gpio_regs[addr]; 137 } 138 } 139 140 trace_macio_gpio_write(addr, val); 141 return val; 142 } 143 144 static const MemoryRegionOps macio_gpio_ops = { 145 .read = macio_gpio_read, 146 .write = macio_gpio_write, 147 .endianness = DEVICE_LITTLE_ENDIAN, 148 .impl = { 149 .min_access_size = 1, 150 .max_access_size = 1, 151 }, 152 }; 153 154 static void macio_gpio_realize(DeviceState *dev, Error **errp) 155 { 156 MacIOGPIOState *s = MACIO_GPIO(dev); 157 158 s->gpio_extirqs[1] = qdev_get_gpio_in(DEVICE(s->pic), 159 NEWWORLD_EXTING_GPIO1); 160 s->gpio_extirqs[9] = qdev_get_gpio_in(DEVICE(s->pic), 161 NEWWORLD_EXTING_GPIO9); 162 } 163 164 static void macio_gpio_init(Object *obj) 165 { 166 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 167 MacIOGPIOState *s = MACIO_GPIO(obj); 168 169 object_property_add_link(obj, "pic", TYPE_OPENPIC, 170 (Object **) &s->pic, 171 qdev_prop_allow_set_link_before_realize, 172 0, NULL); 173 174 memory_region_init_io(&s->gpiomem, OBJECT(s), &macio_gpio_ops, obj, 175 "gpio", 0x30); 176 sysbus_init_mmio(sbd, &s->gpiomem); 177 } 178 179 static const VMStateDescription vmstate_macio_gpio = { 180 .name = "macio_gpio", 181 .version_id = 0, 182 .minimum_version_id = 0, 183 .fields = (VMStateField[]) { 184 VMSTATE_UINT8_ARRAY(gpio_levels, MacIOGPIOState, 8), 185 VMSTATE_UINT8_ARRAY(gpio_regs, MacIOGPIOState, 36), 186 VMSTATE_END_OF_LIST() 187 } 188 }; 189 190 static void macio_gpio_reset(DeviceState *dev) 191 { 192 MacIOGPIOState *s = MACIO_GPIO(dev); 193 194 /* GPIO 1 is up by default */ 195 macio_set_gpio(s, 1, true); 196 } 197 198 static void macio_gpio_nmi(NMIState *n, int cpu_index, Error **errp) 199 { 200 macio_set_gpio(MACIO_GPIO(n), 9, true); 201 macio_set_gpio(MACIO_GPIO(n), 9, false); 202 } 203 204 static void macio_gpio_class_init(ObjectClass *oc, void *data) 205 { 206 DeviceClass *dc = DEVICE_CLASS(oc); 207 NMIClass *nc = NMI_CLASS(oc); 208 209 dc->realize = macio_gpio_realize; 210 dc->reset = macio_gpio_reset; 211 dc->vmsd = &vmstate_macio_gpio; 212 nc->nmi_monitor_handler = macio_gpio_nmi; 213 } 214 215 static const TypeInfo macio_gpio_init_info = { 216 .name = TYPE_MACIO_GPIO, 217 .parent = TYPE_SYS_BUS_DEVICE, 218 .instance_size = sizeof(MacIOGPIOState), 219 .instance_init = macio_gpio_init, 220 .class_init = macio_gpio_class_init, 221 .interfaces = (InterfaceInfo[]) { 222 { TYPE_NMI }, 223 { } 224 }, 225 }; 226 227 static void macio_gpio_register_types(void) 228 { 229 type_register_static(&macio_gpio_init_info); 230 } 231 232 type_init(macio_gpio_register_types) 233