1 /* 2 * Inter-VM Shared Memory PCI device. 3 * 4 * Author: 5 * Cam Macdonell <cam@cs.ualberta.ca> 6 * 7 * Based On: cirrus_vga.c 8 * Copyright (c) 2004 Fabrice Bellard 9 * Copyright (c) 2004 Makoto Suzuki (suzu) 10 * 11 * and rtl8139.c 12 * Copyright (c) 2006 Igor Kovalenko 13 * 14 * This code is licensed under the GNU GPL v2. 15 * 16 * Contributions after 2012-01-13 are licensed under the terms of the 17 * GNU GPL, version 2 or (at your option) any later version. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/units.h" 22 #include "qapi/error.h" 23 #include "qemu/cutils.h" 24 #include "hw/pci/pci.h" 25 #include "hw/qdev-properties.h" 26 #include "hw/qdev-properties-system.h" 27 #include "hw/pci/msi.h" 28 #include "hw/pci/msix.h" 29 #include "sysemu/kvm.h" 30 #include "migration/blocker.h" 31 #include "migration/vmstate.h" 32 #include "qemu/error-report.h" 33 #include "qemu/event_notifier.h" 34 #include "qemu/module.h" 35 #include "qom/object_interfaces.h" 36 #include "chardev/char-fe.h" 37 #include "sysemu/hostmem.h" 38 #include "sysemu/qtest.h" 39 #include "qapi/visitor.h" 40 41 #include "hw/misc/ivshmem.h" 42 #include "qom/object.h" 43 44 #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET 45 #define PCI_DEVICE_ID_IVSHMEM 0x1110 46 47 #define IVSHMEM_MAX_PEERS UINT16_MAX 48 #define IVSHMEM_IOEVENTFD 0 49 #define IVSHMEM_MSI 1 50 51 #define IVSHMEM_REG_BAR_SIZE 0x100 52 53 #define IVSHMEM_DEBUG 0 54 #define IVSHMEM_DPRINTF(fmt, ...) \ 55 do { \ 56 if (IVSHMEM_DEBUG) { \ 57 printf("IVSHMEM: " fmt, ## __VA_ARGS__); \ 58 } \ 59 } while (0) 60 61 #define TYPE_IVSHMEM_COMMON "ivshmem-common" 62 typedef struct IVShmemState IVShmemState; 63 DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_COMMON, 64 TYPE_IVSHMEM_COMMON) 65 66 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain" 67 DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_PLAIN, 68 TYPE_IVSHMEM_PLAIN) 69 70 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell" 71 DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_DOORBELL, 72 TYPE_IVSHMEM_DOORBELL) 73 74 #define TYPE_IVSHMEM "ivshmem" 75 DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM, 76 TYPE_IVSHMEM) 77 78 typedef struct Peer { 79 int nb_eventfds; 80 EventNotifier *eventfds; 81 } Peer; 82 83 typedef struct MSIVector { 84 PCIDevice *pdev; 85 int virq; 86 bool unmasked; 87 } MSIVector; 88 89 struct IVShmemState { 90 /*< private >*/ 91 PCIDevice parent_obj; 92 /*< public >*/ 93 94 uint32_t features; 95 96 /* exactly one of these two may be set */ 97 HostMemoryBackend *hostmem; /* with interrupts */ 98 CharBackend server_chr; /* without interrupts */ 99 100 /* registers */ 101 uint32_t intrmask; 102 uint32_t intrstatus; 103 int vm_id; 104 105 /* BARs */ 106 MemoryRegion ivshmem_mmio; /* BAR 0 (registers) */ 107 MemoryRegion *ivshmem_bar2; /* BAR 2 (shared memory) */ 108 MemoryRegion server_bar2; /* used with server_chr */ 109 110 /* interrupt support */ 111 Peer *peers; 112 int nb_peers; /* space in @peers[] */ 113 uint32_t vectors; 114 MSIVector *msi_vectors; 115 uint64_t msg_buf; /* buffer for receiving server messages */ 116 int msg_buffered_bytes; /* #bytes in @msg_buf */ 117 118 /* migration stuff */ 119 OnOffAuto master; 120 Error *migration_blocker; 121 }; 122 123 /* registers for the Inter-VM shared memory device */ 124 enum ivshmem_registers { 125 INTRMASK = 0, 126 INTRSTATUS = 4, 127 IVPOSITION = 8, 128 DOORBELL = 12, 129 }; 130 131 static inline uint32_t ivshmem_has_feature(IVShmemState *ivs, 132 unsigned int feature) { 133 return (ivs->features & (1 << feature)); 134 } 135 136 static inline bool ivshmem_is_master(IVShmemState *s) 137 { 138 assert(s->master != ON_OFF_AUTO_AUTO); 139 return s->master == ON_OFF_AUTO_ON; 140 } 141 142 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val) 143 { 144 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val); 145 146 s->intrmask = val; 147 } 148 149 static uint32_t ivshmem_IntrMask_read(IVShmemState *s) 150 { 151 uint32_t ret = s->intrmask; 152 153 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret); 154 return ret; 155 } 156 157 static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val) 158 { 159 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val); 160 161 s->intrstatus = val; 162 } 163 164 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s) 165 { 166 uint32_t ret = s->intrstatus; 167 168 /* reading ISR clears all interrupts */ 169 s->intrstatus = 0; 170 return ret; 171 } 172 173 static void ivshmem_io_write(void *opaque, hwaddr addr, 174 uint64_t val, unsigned size) 175 { 176 IVShmemState *s = opaque; 177 178 uint16_t dest = val >> 16; 179 uint16_t vector = val & 0xff; 180 181 addr &= 0xfc; 182 183 IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr); 184 switch (addr) 185 { 186 case INTRMASK: 187 ivshmem_IntrMask_write(s, val); 188 break; 189 190 case INTRSTATUS: 191 ivshmem_IntrStatus_write(s, val); 192 break; 193 194 case DOORBELL: 195 /* check that dest VM ID is reasonable */ 196 if (dest >= s->nb_peers) { 197 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest); 198 break; 199 } 200 201 /* check doorbell range */ 202 if (vector < s->peers[dest].nb_eventfds) { 203 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector); 204 event_notifier_set(&s->peers[dest].eventfds[vector]); 205 } else { 206 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n", 207 vector, dest); 208 } 209 break; 210 default: 211 IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr); 212 } 213 } 214 215 static uint64_t ivshmem_io_read(void *opaque, hwaddr addr, 216 unsigned size) 217 { 218 219 IVShmemState *s = opaque; 220 uint32_t ret; 221 222 switch (addr) 223 { 224 case INTRMASK: 225 ret = ivshmem_IntrMask_read(s); 226 break; 227 228 case INTRSTATUS: 229 ret = ivshmem_IntrStatus_read(s); 230 break; 231 232 case IVPOSITION: 233 ret = s->vm_id; 234 break; 235 236 default: 237 IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr); 238 ret = 0; 239 } 240 241 return ret; 242 } 243 244 static const MemoryRegionOps ivshmem_mmio_ops = { 245 .read = ivshmem_io_read, 246 .write = ivshmem_io_write, 247 .endianness = DEVICE_NATIVE_ENDIAN, 248 .impl = { 249 .min_access_size = 4, 250 .max_access_size = 4, 251 }, 252 }; 253 254 static void ivshmem_vector_notify(void *opaque) 255 { 256 MSIVector *entry = opaque; 257 PCIDevice *pdev = entry->pdev; 258 IVShmemState *s = IVSHMEM_COMMON(pdev); 259 int vector = entry - s->msi_vectors; 260 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 261 262 if (!event_notifier_test_and_clear(n)) { 263 return; 264 } 265 266 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector); 267 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 268 if (msix_enabled(pdev)) { 269 msix_notify(pdev, vector); 270 } 271 } else { 272 ivshmem_IntrStatus_write(s, 1); 273 } 274 } 275 276 static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector, 277 MSIMessage msg) 278 { 279 IVShmemState *s = IVSHMEM_COMMON(dev); 280 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 281 MSIVector *v = &s->msi_vectors[vector]; 282 int ret; 283 284 IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector); 285 if (!v->pdev) { 286 error_report("ivshmem: vector %d route does not exist", vector); 287 return -EINVAL; 288 } 289 assert(!v->unmasked); 290 291 ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev); 292 if (ret < 0) { 293 return ret; 294 } 295 kvm_irqchip_commit_routes(kvm_state); 296 297 ret = kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq); 298 if (ret < 0) { 299 return ret; 300 } 301 v->unmasked = true; 302 303 return 0; 304 } 305 306 static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector) 307 { 308 IVShmemState *s = IVSHMEM_COMMON(dev); 309 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 310 MSIVector *v = &s->msi_vectors[vector]; 311 int ret; 312 313 IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector); 314 if (!v->pdev) { 315 error_report("ivshmem: vector %d route does not exist", vector); 316 return; 317 } 318 assert(v->unmasked); 319 320 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, v->virq); 321 if (ret < 0) { 322 error_report("remove_irqfd_notifier_gsi failed"); 323 return; 324 } 325 v->unmasked = false; 326 } 327 328 static void ivshmem_vector_poll(PCIDevice *dev, 329 unsigned int vector_start, 330 unsigned int vector_end) 331 { 332 IVShmemState *s = IVSHMEM_COMMON(dev); 333 unsigned int vector; 334 335 IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end); 336 337 vector_end = MIN(vector_end, s->vectors); 338 339 for (vector = vector_start; vector < vector_end; vector++) { 340 EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector]; 341 342 if (!msix_is_masked(dev, vector)) { 343 continue; 344 } 345 346 if (event_notifier_test_and_clear(notifier)) { 347 msix_set_pending(dev, vector); 348 } 349 } 350 } 351 352 static void watch_vector_notifier(IVShmemState *s, EventNotifier *n, 353 int vector) 354 { 355 int eventfd = event_notifier_get_fd(n); 356 357 assert(!s->msi_vectors[vector].pdev); 358 s->msi_vectors[vector].pdev = PCI_DEVICE(s); 359 360 qemu_set_fd_handler(eventfd, ivshmem_vector_notify, 361 NULL, &s->msi_vectors[vector]); 362 } 363 364 static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i) 365 { 366 memory_region_add_eventfd(&s->ivshmem_mmio, 367 DOORBELL, 368 4, 369 true, 370 (posn << 16) | i, 371 &s->peers[posn].eventfds[i]); 372 } 373 374 static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i) 375 { 376 memory_region_del_eventfd(&s->ivshmem_mmio, 377 DOORBELL, 378 4, 379 true, 380 (posn << 16) | i, 381 &s->peers[posn].eventfds[i]); 382 } 383 384 static void close_peer_eventfds(IVShmemState *s, int posn) 385 { 386 int i, n; 387 388 assert(posn >= 0 && posn < s->nb_peers); 389 n = s->peers[posn].nb_eventfds; 390 391 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) { 392 memory_region_transaction_begin(); 393 for (i = 0; i < n; i++) { 394 ivshmem_del_eventfd(s, posn, i); 395 } 396 memory_region_transaction_commit(); 397 } 398 399 for (i = 0; i < n; i++) { 400 event_notifier_cleanup(&s->peers[posn].eventfds[i]); 401 } 402 403 g_free(s->peers[posn].eventfds); 404 s->peers[posn].nb_eventfds = 0; 405 } 406 407 static void resize_peers(IVShmemState *s, int nb_peers) 408 { 409 int old_nb_peers = s->nb_peers; 410 int i; 411 412 assert(nb_peers > old_nb_peers); 413 IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers); 414 415 s->peers = g_realloc(s->peers, nb_peers * sizeof(Peer)); 416 s->nb_peers = nb_peers; 417 418 for (i = old_nb_peers; i < nb_peers; i++) { 419 s->peers[i].eventfds = g_new0(EventNotifier, s->vectors); 420 s->peers[i].nb_eventfds = 0; 421 } 422 } 423 424 static void ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector, 425 Error **errp) 426 { 427 PCIDevice *pdev = PCI_DEVICE(s); 428 int ret; 429 430 IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector); 431 assert(!s->msi_vectors[vector].pdev); 432 433 ret = kvm_irqchip_add_msi_route(kvm_state, vector, pdev); 434 if (ret < 0) { 435 error_setg(errp, "kvm_irqchip_add_msi_route failed"); 436 return; 437 } 438 439 s->msi_vectors[vector].virq = ret; 440 s->msi_vectors[vector].pdev = pdev; 441 } 442 443 static void setup_interrupt(IVShmemState *s, int vector, Error **errp) 444 { 445 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 446 bool with_irqfd = kvm_msi_via_irqfd_enabled() && 447 ivshmem_has_feature(s, IVSHMEM_MSI); 448 PCIDevice *pdev = PCI_DEVICE(s); 449 Error *err = NULL; 450 451 IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector); 452 453 if (!with_irqfd) { 454 IVSHMEM_DPRINTF("with eventfd\n"); 455 watch_vector_notifier(s, n, vector); 456 } else if (msix_enabled(pdev)) { 457 IVSHMEM_DPRINTF("with irqfd\n"); 458 ivshmem_add_kvm_msi_virq(s, vector, &err); 459 if (err) { 460 error_propagate(errp, err); 461 return; 462 } 463 464 if (!msix_is_masked(pdev, vector)) { 465 kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, 466 s->msi_vectors[vector].virq); 467 /* TODO handle error */ 468 } 469 } else { 470 /* it will be delayed until msix is enabled, in write_config */ 471 IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n"); 472 } 473 } 474 475 static void process_msg_shmem(IVShmemState *s, int fd, Error **errp) 476 { 477 Error *local_err = NULL; 478 struct stat buf; 479 size_t size; 480 481 if (s->ivshmem_bar2) { 482 error_setg(errp, "server sent unexpected shared memory message"); 483 close(fd); 484 return; 485 } 486 487 if (fstat(fd, &buf) < 0) { 488 error_setg_errno(errp, errno, 489 "can't determine size of shared memory sent by server"); 490 close(fd); 491 return; 492 } 493 494 size = buf.st_size; 495 496 /* mmap the region and map into the BAR2 */ 497 memory_region_init_ram_from_fd(&s->server_bar2, OBJECT(s), 498 "ivshmem.bar2", size, true, fd, 0, 499 &local_err); 500 if (local_err) { 501 error_propagate(errp, local_err); 502 return; 503 } 504 505 s->ivshmem_bar2 = &s->server_bar2; 506 } 507 508 static void process_msg_disconnect(IVShmemState *s, uint16_t posn, 509 Error **errp) 510 { 511 IVSHMEM_DPRINTF("posn %d has gone away\n", posn); 512 if (posn >= s->nb_peers || posn == s->vm_id) { 513 error_setg(errp, "invalid peer %d", posn); 514 return; 515 } 516 close_peer_eventfds(s, posn); 517 } 518 519 static void process_msg_connect(IVShmemState *s, uint16_t posn, int fd, 520 Error **errp) 521 { 522 Peer *peer = &s->peers[posn]; 523 int vector; 524 525 /* 526 * The N-th connect message for this peer comes with the file 527 * descriptor for vector N-1. Count messages to find the vector. 528 */ 529 if (peer->nb_eventfds >= s->vectors) { 530 error_setg(errp, "Too many eventfd received, device has %d vectors", 531 s->vectors); 532 close(fd); 533 return; 534 } 535 vector = peer->nb_eventfds++; 536 537 IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn, vector, fd); 538 event_notifier_init_fd(&peer->eventfds[vector], fd); 539 fcntl_setfl(fd, O_NONBLOCK); /* msix/irqfd poll non block */ 540 541 if (posn == s->vm_id) { 542 setup_interrupt(s, vector, errp); 543 /* TODO do we need to handle the error? */ 544 } 545 546 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) { 547 ivshmem_add_eventfd(s, posn, vector); 548 } 549 } 550 551 static void process_msg(IVShmemState *s, int64_t msg, int fd, Error **errp) 552 { 553 IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd); 554 555 if (msg < -1 || msg > IVSHMEM_MAX_PEERS) { 556 error_setg(errp, "server sent invalid message %" PRId64, msg); 557 close(fd); 558 return; 559 } 560 561 if (msg == -1) { 562 process_msg_shmem(s, fd, errp); 563 return; 564 } 565 566 if (msg >= s->nb_peers) { 567 resize_peers(s, msg + 1); 568 } 569 570 if (fd >= 0) { 571 process_msg_connect(s, msg, fd, errp); 572 } else { 573 process_msg_disconnect(s, msg, errp); 574 } 575 } 576 577 static int ivshmem_can_receive(void *opaque) 578 { 579 IVShmemState *s = opaque; 580 581 assert(s->msg_buffered_bytes < sizeof(s->msg_buf)); 582 return sizeof(s->msg_buf) - s->msg_buffered_bytes; 583 } 584 585 static void ivshmem_read(void *opaque, const uint8_t *buf, int size) 586 { 587 IVShmemState *s = opaque; 588 Error *err = NULL; 589 int fd; 590 int64_t msg; 591 592 assert(size >= 0 && s->msg_buffered_bytes + size <= sizeof(s->msg_buf)); 593 memcpy((unsigned char *)&s->msg_buf + s->msg_buffered_bytes, buf, size); 594 s->msg_buffered_bytes += size; 595 if (s->msg_buffered_bytes < sizeof(s->msg_buf)) { 596 return; 597 } 598 msg = le64_to_cpu(s->msg_buf); 599 s->msg_buffered_bytes = 0; 600 601 fd = qemu_chr_fe_get_msgfd(&s->server_chr); 602 603 process_msg(s, msg, fd, &err); 604 if (err) { 605 error_report_err(err); 606 } 607 } 608 609 static int64_t ivshmem_recv_msg(IVShmemState *s, int *pfd, Error **errp) 610 { 611 int64_t msg; 612 int n, ret; 613 614 n = 0; 615 do { 616 ret = qemu_chr_fe_read_all(&s->server_chr, (uint8_t *)&msg + n, 617 sizeof(msg) - n); 618 if (ret < 0) { 619 if (ret == -EINTR) { 620 continue; 621 } 622 error_setg_errno(errp, -ret, "read from server failed"); 623 return INT64_MIN; 624 } 625 n += ret; 626 } while (n < sizeof(msg)); 627 628 *pfd = qemu_chr_fe_get_msgfd(&s->server_chr); 629 return le64_to_cpu(msg); 630 } 631 632 static void ivshmem_recv_setup(IVShmemState *s, Error **errp) 633 { 634 Error *err = NULL; 635 int64_t msg; 636 int fd; 637 638 msg = ivshmem_recv_msg(s, &fd, &err); 639 if (err) { 640 error_propagate(errp, err); 641 return; 642 } 643 if (msg != IVSHMEM_PROTOCOL_VERSION) { 644 error_setg(errp, "server sent version %" PRId64 ", expecting %d", 645 msg, IVSHMEM_PROTOCOL_VERSION); 646 return; 647 } 648 if (fd != -1) { 649 error_setg(errp, "server sent invalid version message"); 650 return; 651 } 652 653 /* 654 * ivshmem-server sends the remaining initial messages in a fixed 655 * order, but the device has always accepted them in any order. 656 * Stay as compatible as practical, just in case people use 657 * servers that behave differently. 658 */ 659 660 /* 661 * ivshmem_device_spec.txt has always required the ID message 662 * right here, and ivshmem-server has always complied. However, 663 * older versions of the device accepted it out of order, but 664 * broke when an interrupt setup message arrived before it. 665 */ 666 msg = ivshmem_recv_msg(s, &fd, &err); 667 if (err) { 668 error_propagate(errp, err); 669 return; 670 } 671 if (fd != -1 || msg < 0 || msg > IVSHMEM_MAX_PEERS) { 672 error_setg(errp, "server sent invalid ID message"); 673 return; 674 } 675 s->vm_id = msg; 676 677 /* 678 * Receive more messages until we got shared memory. 679 */ 680 do { 681 msg = ivshmem_recv_msg(s, &fd, &err); 682 if (err) { 683 error_propagate(errp, err); 684 return; 685 } 686 process_msg(s, msg, fd, &err); 687 if (err) { 688 error_propagate(errp, err); 689 return; 690 } 691 } while (msg != -1); 692 693 /* 694 * This function must either map the shared memory or fail. The 695 * loop above ensures that: it terminates normally only after it 696 * successfully processed the server's shared memory message. 697 * Assert that actually mapped the shared memory: 698 */ 699 assert(s->ivshmem_bar2); 700 } 701 702 /* Select the MSI-X vectors used by device. 703 * ivshmem maps events to vectors statically, so 704 * we just enable all vectors on init and after reset. */ 705 static void ivshmem_msix_vector_use(IVShmemState *s) 706 { 707 PCIDevice *d = PCI_DEVICE(s); 708 int i; 709 710 for (i = 0; i < s->vectors; i++) { 711 msix_vector_use(d, i); 712 } 713 } 714 715 static void ivshmem_disable_irqfd(IVShmemState *s); 716 717 static void ivshmem_reset(DeviceState *d) 718 { 719 IVShmemState *s = IVSHMEM_COMMON(d); 720 721 ivshmem_disable_irqfd(s); 722 723 s->intrstatus = 0; 724 s->intrmask = 0; 725 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 726 ivshmem_msix_vector_use(s); 727 } 728 } 729 730 static int ivshmem_setup_interrupts(IVShmemState *s, Error **errp) 731 { 732 /* allocate QEMU callback data for receiving interrupts */ 733 s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector)); 734 735 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 736 if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1, errp)) { 737 return -1; 738 } 739 740 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors); 741 ivshmem_msix_vector_use(s); 742 } 743 744 return 0; 745 } 746 747 static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector) 748 { 749 IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector); 750 751 if (s->msi_vectors[vector].pdev == NULL) { 752 return; 753 } 754 755 /* it was cleaned when masked in the frontend. */ 756 kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq); 757 758 s->msi_vectors[vector].pdev = NULL; 759 } 760 761 static void ivshmem_enable_irqfd(IVShmemState *s) 762 { 763 PCIDevice *pdev = PCI_DEVICE(s); 764 int i; 765 766 for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) { 767 Error *err = NULL; 768 769 ivshmem_add_kvm_msi_virq(s, i, &err); 770 if (err) { 771 error_report_err(err); 772 goto undo; 773 } 774 } 775 776 if (msix_set_vector_notifiers(pdev, 777 ivshmem_vector_unmask, 778 ivshmem_vector_mask, 779 ivshmem_vector_poll)) { 780 error_report("ivshmem: msix_set_vector_notifiers failed"); 781 goto undo; 782 } 783 return; 784 785 undo: 786 while (--i >= 0) { 787 ivshmem_remove_kvm_msi_virq(s, i); 788 } 789 } 790 791 static void ivshmem_disable_irqfd(IVShmemState *s) 792 { 793 PCIDevice *pdev = PCI_DEVICE(s); 794 int i; 795 796 if (!pdev->msix_vector_use_notifier) { 797 return; 798 } 799 800 msix_unset_vector_notifiers(pdev); 801 802 for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) { 803 /* 804 * MSI-X is already disabled here so msix_unset_vector_notifiers() 805 * didn't call our release notifier. Do it now to keep our masks and 806 * unmasks balanced. 807 */ 808 if (s->msi_vectors[i].unmasked) { 809 ivshmem_vector_mask(pdev, i); 810 } 811 ivshmem_remove_kvm_msi_virq(s, i); 812 } 813 814 } 815 816 static void ivshmem_write_config(PCIDevice *pdev, uint32_t address, 817 uint32_t val, int len) 818 { 819 IVShmemState *s = IVSHMEM_COMMON(pdev); 820 int is_enabled, was_enabled = msix_enabled(pdev); 821 822 pci_default_write_config(pdev, address, val, len); 823 is_enabled = msix_enabled(pdev); 824 825 if (kvm_msi_via_irqfd_enabled()) { 826 if (!was_enabled && is_enabled) { 827 ivshmem_enable_irqfd(s); 828 } else if (was_enabled && !is_enabled) { 829 ivshmem_disable_irqfd(s); 830 } 831 } 832 } 833 834 static void ivshmem_common_realize(PCIDevice *dev, Error **errp) 835 { 836 IVShmemState *s = IVSHMEM_COMMON(dev); 837 Error *err = NULL; 838 uint8_t *pci_conf; 839 840 /* IRQFD requires MSI */ 841 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) && 842 !ivshmem_has_feature(s, IVSHMEM_MSI)) { 843 error_setg(errp, "ioeventfd/irqfd requires MSI"); 844 return; 845 } 846 847 pci_conf = dev->config; 848 pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY; 849 850 memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s, 851 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE); 852 853 /* region for registers*/ 854 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, 855 &s->ivshmem_mmio); 856 857 if (s->hostmem != NULL) { 858 IVSHMEM_DPRINTF("using hostmem\n"); 859 860 s->ivshmem_bar2 = host_memory_backend_get_memory(s->hostmem); 861 host_memory_backend_set_mapped(s->hostmem, true); 862 } else { 863 Chardev *chr = qemu_chr_fe_get_driver(&s->server_chr); 864 assert(chr); 865 866 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n", 867 chr->filename); 868 869 /* we allocate enough space for 16 peers and grow as needed */ 870 resize_peers(s, 16); 871 872 /* 873 * Receive setup messages from server synchronously. 874 * Older versions did it asynchronously, but that creates a 875 * number of entertaining race conditions. 876 */ 877 ivshmem_recv_setup(s, &err); 878 if (err) { 879 error_propagate(errp, err); 880 return; 881 } 882 883 if (s->master == ON_OFF_AUTO_ON && s->vm_id != 0) { 884 error_setg(errp, 885 "master must connect to the server before any peers"); 886 return; 887 } 888 889 qemu_chr_fe_set_handlers(&s->server_chr, ivshmem_can_receive, 890 ivshmem_read, NULL, NULL, s, NULL, true); 891 892 if (ivshmem_setup_interrupts(s, errp) < 0) { 893 error_prepend(errp, "Failed to initialize interrupts: "); 894 return; 895 } 896 } 897 898 if (s->master == ON_OFF_AUTO_AUTO) { 899 s->master = s->vm_id == 0 ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 900 } 901 902 if (!ivshmem_is_master(s)) { 903 error_setg(&s->migration_blocker, 904 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'"); 905 if (migrate_add_blocker(s->migration_blocker, errp) < 0) { 906 error_free(s->migration_blocker); 907 return; 908 } 909 } 910 911 vmstate_register_ram(s->ivshmem_bar2, DEVICE(s)); 912 pci_register_bar(PCI_DEVICE(s), 2, 913 PCI_BASE_ADDRESS_SPACE_MEMORY | 914 PCI_BASE_ADDRESS_MEM_PREFETCH | 915 PCI_BASE_ADDRESS_MEM_TYPE_64, 916 s->ivshmem_bar2); 917 } 918 919 static void ivshmem_exit(PCIDevice *dev) 920 { 921 IVShmemState *s = IVSHMEM_COMMON(dev); 922 int i; 923 924 if (s->migration_blocker) { 925 migrate_del_blocker(s->migration_blocker); 926 error_free(s->migration_blocker); 927 } 928 929 if (memory_region_is_mapped(s->ivshmem_bar2)) { 930 if (!s->hostmem) { 931 void *addr = memory_region_get_ram_ptr(s->ivshmem_bar2); 932 int fd; 933 934 if (munmap(addr, memory_region_size(s->ivshmem_bar2) == -1)) { 935 error_report("Failed to munmap shared memory %s", 936 strerror(errno)); 937 } 938 939 fd = memory_region_get_fd(s->ivshmem_bar2); 940 close(fd); 941 } 942 943 vmstate_unregister_ram(s->ivshmem_bar2, DEVICE(dev)); 944 } 945 946 if (s->hostmem) { 947 host_memory_backend_set_mapped(s->hostmem, false); 948 } 949 950 if (s->peers) { 951 for (i = 0; i < s->nb_peers; i++) { 952 close_peer_eventfds(s, i); 953 } 954 g_free(s->peers); 955 } 956 957 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 958 msix_uninit_exclusive_bar(dev); 959 } 960 961 g_free(s->msi_vectors); 962 } 963 964 static int ivshmem_pre_load(void *opaque) 965 { 966 IVShmemState *s = opaque; 967 968 if (!ivshmem_is_master(s)) { 969 error_report("'peer' devices are not migratable"); 970 return -EINVAL; 971 } 972 973 return 0; 974 } 975 976 static int ivshmem_post_load(void *opaque, int version_id) 977 { 978 IVShmemState *s = opaque; 979 980 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 981 ivshmem_msix_vector_use(s); 982 } 983 return 0; 984 } 985 986 static void ivshmem_common_class_init(ObjectClass *klass, void *data) 987 { 988 DeviceClass *dc = DEVICE_CLASS(klass); 989 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 990 991 k->realize = ivshmem_common_realize; 992 k->exit = ivshmem_exit; 993 k->config_write = ivshmem_write_config; 994 k->vendor_id = PCI_VENDOR_ID_IVSHMEM; 995 k->device_id = PCI_DEVICE_ID_IVSHMEM; 996 k->class_id = PCI_CLASS_MEMORY_RAM; 997 k->revision = 1; 998 dc->reset = ivshmem_reset; 999 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1000 dc->desc = "Inter-VM shared memory"; 1001 } 1002 1003 static const TypeInfo ivshmem_common_info = { 1004 .name = TYPE_IVSHMEM_COMMON, 1005 .parent = TYPE_PCI_DEVICE, 1006 .instance_size = sizeof(IVShmemState), 1007 .abstract = true, 1008 .class_init = ivshmem_common_class_init, 1009 .interfaces = (InterfaceInfo[]) { 1010 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1011 { }, 1012 }, 1013 }; 1014 1015 static const VMStateDescription ivshmem_plain_vmsd = { 1016 .name = TYPE_IVSHMEM_PLAIN, 1017 .version_id = 0, 1018 .minimum_version_id = 0, 1019 .pre_load = ivshmem_pre_load, 1020 .post_load = ivshmem_post_load, 1021 .fields = (VMStateField[]) { 1022 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState), 1023 VMSTATE_UINT32(intrstatus, IVShmemState), 1024 VMSTATE_UINT32(intrmask, IVShmemState), 1025 VMSTATE_END_OF_LIST() 1026 }, 1027 }; 1028 1029 static Property ivshmem_plain_properties[] = { 1030 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), 1031 DEFINE_PROP_LINK("memdev", IVShmemState, hostmem, TYPE_MEMORY_BACKEND, 1032 HostMemoryBackend *), 1033 DEFINE_PROP_END_OF_LIST(), 1034 }; 1035 1036 static void ivshmem_plain_realize(PCIDevice *dev, Error **errp) 1037 { 1038 IVShmemState *s = IVSHMEM_COMMON(dev); 1039 1040 if (!s->hostmem) { 1041 error_setg(errp, "You must specify a 'memdev'"); 1042 return; 1043 } else if (host_memory_backend_is_mapped(s->hostmem)) { 1044 error_setg(errp, "can't use already busy memdev: %s", 1045 object_get_canonical_path_component(OBJECT(s->hostmem))); 1046 return; 1047 } 1048 1049 ivshmem_common_realize(dev, errp); 1050 } 1051 1052 static void ivshmem_plain_class_init(ObjectClass *klass, void *data) 1053 { 1054 DeviceClass *dc = DEVICE_CLASS(klass); 1055 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1056 1057 k->realize = ivshmem_plain_realize; 1058 device_class_set_props(dc, ivshmem_plain_properties); 1059 dc->vmsd = &ivshmem_plain_vmsd; 1060 } 1061 1062 static const TypeInfo ivshmem_plain_info = { 1063 .name = TYPE_IVSHMEM_PLAIN, 1064 .parent = TYPE_IVSHMEM_COMMON, 1065 .instance_size = sizeof(IVShmemState), 1066 .class_init = ivshmem_plain_class_init, 1067 }; 1068 1069 static const VMStateDescription ivshmem_doorbell_vmsd = { 1070 .name = TYPE_IVSHMEM_DOORBELL, 1071 .version_id = 0, 1072 .minimum_version_id = 0, 1073 .pre_load = ivshmem_pre_load, 1074 .post_load = ivshmem_post_load, 1075 .fields = (VMStateField[]) { 1076 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState), 1077 VMSTATE_MSIX(parent_obj, IVShmemState), 1078 VMSTATE_UINT32(intrstatus, IVShmemState), 1079 VMSTATE_UINT32(intrmask, IVShmemState), 1080 VMSTATE_END_OF_LIST() 1081 }, 1082 }; 1083 1084 static Property ivshmem_doorbell_properties[] = { 1085 DEFINE_PROP_CHR("chardev", IVShmemState, server_chr), 1086 DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1), 1087 DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, 1088 true), 1089 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), 1090 DEFINE_PROP_END_OF_LIST(), 1091 }; 1092 1093 static void ivshmem_doorbell_init(Object *obj) 1094 { 1095 IVShmemState *s = IVSHMEM_DOORBELL(obj); 1096 1097 s->features |= (1 << IVSHMEM_MSI); 1098 } 1099 1100 static void ivshmem_doorbell_realize(PCIDevice *dev, Error **errp) 1101 { 1102 IVShmemState *s = IVSHMEM_COMMON(dev); 1103 1104 if (!qemu_chr_fe_backend_connected(&s->server_chr)) { 1105 error_setg(errp, "You must specify a 'chardev'"); 1106 return; 1107 } 1108 1109 ivshmem_common_realize(dev, errp); 1110 } 1111 1112 static void ivshmem_doorbell_class_init(ObjectClass *klass, void *data) 1113 { 1114 DeviceClass *dc = DEVICE_CLASS(klass); 1115 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1116 1117 k->realize = ivshmem_doorbell_realize; 1118 device_class_set_props(dc, ivshmem_doorbell_properties); 1119 dc->vmsd = &ivshmem_doorbell_vmsd; 1120 } 1121 1122 static const TypeInfo ivshmem_doorbell_info = { 1123 .name = TYPE_IVSHMEM_DOORBELL, 1124 .parent = TYPE_IVSHMEM_COMMON, 1125 .instance_size = sizeof(IVShmemState), 1126 .instance_init = ivshmem_doorbell_init, 1127 .class_init = ivshmem_doorbell_class_init, 1128 }; 1129 1130 static void ivshmem_register_types(void) 1131 { 1132 type_register_static(&ivshmem_common_info); 1133 type_register_static(&ivshmem_plain_info); 1134 type_register_static(&ivshmem_doorbell_info); 1135 } 1136 1137 type_init(ivshmem_register_types) 1138