1 /* 2 * Inter-VM Shared Memory PCI device. 3 * 4 * Author: 5 * Cam Macdonell <cam@cs.ualberta.ca> 6 * 7 * Based On: cirrus_vga.c 8 * Copyright (c) 2004 Fabrice Bellard 9 * Copyright (c) 2004 Makoto Suzuki (suzu) 10 * 11 * and rtl8139.c 12 * Copyright (c) 2006 Igor Kovalenko 13 * 14 * This code is licensed under the GNU GPL v2. 15 * 16 * Contributions after 2012-01-13 are licensed under the terms of the 17 * GNU GPL, version 2 or (at your option) any later version. 18 */ 19 #include "qemu/osdep.h" 20 #include "qapi/error.h" 21 #include "qemu/cutils.h" 22 #include "hw/hw.h" 23 #include "hw/pci/pci.h" 24 #include "hw/pci/msi.h" 25 #include "hw/pci/msix.h" 26 #include "sysemu/kvm.h" 27 #include "migration/blocker.h" 28 #include "qemu/error-report.h" 29 #include "qemu/event_notifier.h" 30 #include "qom/object_interfaces.h" 31 #include "chardev/char-fe.h" 32 #include "sysemu/hostmem.h" 33 #include "sysemu/qtest.h" 34 #include "qapi/visitor.h" 35 36 #include "hw/misc/ivshmem.h" 37 38 #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET 39 #define PCI_DEVICE_ID_IVSHMEM 0x1110 40 41 #define IVSHMEM_MAX_PEERS UINT16_MAX 42 #define IVSHMEM_IOEVENTFD 0 43 #define IVSHMEM_MSI 1 44 45 #define IVSHMEM_REG_BAR_SIZE 0x100 46 47 #define IVSHMEM_DEBUG 0 48 #define IVSHMEM_DPRINTF(fmt, ...) \ 49 do { \ 50 if (IVSHMEM_DEBUG) { \ 51 printf("IVSHMEM: " fmt, ## __VA_ARGS__); \ 52 } \ 53 } while (0) 54 55 #define TYPE_IVSHMEM_COMMON "ivshmem-common" 56 #define IVSHMEM_COMMON(obj) \ 57 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON) 58 59 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain" 60 #define IVSHMEM_PLAIN(obj) \ 61 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_PLAIN) 62 63 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell" 64 #define IVSHMEM_DOORBELL(obj) \ 65 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_DOORBELL) 66 67 #define TYPE_IVSHMEM "ivshmem" 68 #define IVSHMEM(obj) \ 69 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM) 70 71 typedef struct Peer { 72 int nb_eventfds; 73 EventNotifier *eventfds; 74 } Peer; 75 76 typedef struct MSIVector { 77 PCIDevice *pdev; 78 int virq; 79 bool unmasked; 80 } MSIVector; 81 82 typedef struct IVShmemState { 83 /*< private >*/ 84 PCIDevice parent_obj; 85 /*< public >*/ 86 87 uint32_t features; 88 89 /* exactly one of these two may be set */ 90 HostMemoryBackend *hostmem; /* with interrupts */ 91 CharBackend server_chr; /* without interrupts */ 92 93 /* registers */ 94 uint32_t intrmask; 95 uint32_t intrstatus; 96 int vm_id; 97 98 /* BARs */ 99 MemoryRegion ivshmem_mmio; /* BAR 0 (registers) */ 100 MemoryRegion *ivshmem_bar2; /* BAR 2 (shared memory) */ 101 MemoryRegion server_bar2; /* used with server_chr */ 102 103 /* interrupt support */ 104 Peer *peers; 105 int nb_peers; /* space in @peers[] */ 106 uint32_t vectors; 107 MSIVector *msi_vectors; 108 uint64_t msg_buf; /* buffer for receiving server messages */ 109 int msg_buffered_bytes; /* #bytes in @msg_buf */ 110 111 /* migration stuff */ 112 OnOffAuto master; 113 Error *migration_blocker; 114 115 /* legacy cruft */ 116 char *role; 117 char *shmobj; 118 char *sizearg; 119 size_t legacy_size; 120 uint32_t not_legacy_32bit; 121 } IVShmemState; 122 123 /* registers for the Inter-VM shared memory device */ 124 enum ivshmem_registers { 125 INTRMASK = 0, 126 INTRSTATUS = 4, 127 IVPOSITION = 8, 128 DOORBELL = 12, 129 }; 130 131 static inline uint32_t ivshmem_has_feature(IVShmemState *ivs, 132 unsigned int feature) { 133 return (ivs->features & (1 << feature)); 134 } 135 136 static inline bool ivshmem_is_master(IVShmemState *s) 137 { 138 assert(s->master != ON_OFF_AUTO_AUTO); 139 return s->master == ON_OFF_AUTO_ON; 140 } 141 142 static void ivshmem_update_irq(IVShmemState *s) 143 { 144 PCIDevice *d = PCI_DEVICE(s); 145 uint32_t isr = s->intrstatus & s->intrmask; 146 147 /* 148 * Do nothing unless the device actually uses INTx. Here's how 149 * the device variants signal interrupts, what they put in PCI 150 * config space: 151 * Device variant Interrupt Interrupt Pin MSI-X cap. 152 * ivshmem-plain none 0 no 153 * ivshmem-doorbell MSI-X 1 yes(1) 154 * ivshmem,msi=off INTx 1 no 155 * ivshmem,msi=on MSI-X 1(2) yes(1) 156 * (1) if guest enabled MSI-X 157 * (2) the device lies 158 * Leads to the condition for doing nothing: 159 */ 160 if (ivshmem_has_feature(s, IVSHMEM_MSI) 161 || !d->config[PCI_INTERRUPT_PIN]) { 162 return; 163 } 164 165 /* don't print ISR resets */ 166 if (isr) { 167 IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n", 168 isr ? 1 : 0, s->intrstatus, s->intrmask); 169 } 170 171 pci_set_irq(d, isr != 0); 172 } 173 174 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val) 175 { 176 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val); 177 178 s->intrmask = val; 179 ivshmem_update_irq(s); 180 } 181 182 static uint32_t ivshmem_IntrMask_read(IVShmemState *s) 183 { 184 uint32_t ret = s->intrmask; 185 186 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret); 187 return ret; 188 } 189 190 static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val) 191 { 192 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val); 193 194 s->intrstatus = val; 195 ivshmem_update_irq(s); 196 } 197 198 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s) 199 { 200 uint32_t ret = s->intrstatus; 201 202 /* reading ISR clears all interrupts */ 203 s->intrstatus = 0; 204 ivshmem_update_irq(s); 205 return ret; 206 } 207 208 static void ivshmem_io_write(void *opaque, hwaddr addr, 209 uint64_t val, unsigned size) 210 { 211 IVShmemState *s = opaque; 212 213 uint16_t dest = val >> 16; 214 uint16_t vector = val & 0xff; 215 216 addr &= 0xfc; 217 218 IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr); 219 switch (addr) 220 { 221 case INTRMASK: 222 ivshmem_IntrMask_write(s, val); 223 break; 224 225 case INTRSTATUS: 226 ivshmem_IntrStatus_write(s, val); 227 break; 228 229 case DOORBELL: 230 /* check that dest VM ID is reasonable */ 231 if (dest >= s->nb_peers) { 232 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest); 233 break; 234 } 235 236 /* check doorbell range */ 237 if (vector < s->peers[dest].nb_eventfds) { 238 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector); 239 event_notifier_set(&s->peers[dest].eventfds[vector]); 240 } else { 241 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n", 242 vector, dest); 243 } 244 break; 245 default: 246 IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr); 247 } 248 } 249 250 static uint64_t ivshmem_io_read(void *opaque, hwaddr addr, 251 unsigned size) 252 { 253 254 IVShmemState *s = opaque; 255 uint32_t ret; 256 257 switch (addr) 258 { 259 case INTRMASK: 260 ret = ivshmem_IntrMask_read(s); 261 break; 262 263 case INTRSTATUS: 264 ret = ivshmem_IntrStatus_read(s); 265 break; 266 267 case IVPOSITION: 268 ret = s->vm_id; 269 break; 270 271 default: 272 IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr); 273 ret = 0; 274 } 275 276 return ret; 277 } 278 279 static const MemoryRegionOps ivshmem_mmio_ops = { 280 .read = ivshmem_io_read, 281 .write = ivshmem_io_write, 282 .endianness = DEVICE_NATIVE_ENDIAN, 283 .impl = { 284 .min_access_size = 4, 285 .max_access_size = 4, 286 }, 287 }; 288 289 static void ivshmem_vector_notify(void *opaque) 290 { 291 MSIVector *entry = opaque; 292 PCIDevice *pdev = entry->pdev; 293 IVShmemState *s = IVSHMEM_COMMON(pdev); 294 int vector = entry - s->msi_vectors; 295 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 296 297 if (!event_notifier_test_and_clear(n)) { 298 return; 299 } 300 301 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector); 302 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 303 if (msix_enabled(pdev)) { 304 msix_notify(pdev, vector); 305 } 306 } else { 307 ivshmem_IntrStatus_write(s, 1); 308 } 309 } 310 311 static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector, 312 MSIMessage msg) 313 { 314 IVShmemState *s = IVSHMEM_COMMON(dev); 315 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 316 MSIVector *v = &s->msi_vectors[vector]; 317 int ret; 318 319 IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector); 320 if (!v->pdev) { 321 error_report("ivshmem: vector %d route does not exist", vector); 322 return -EINVAL; 323 } 324 assert(!v->unmasked); 325 326 ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev); 327 if (ret < 0) { 328 return ret; 329 } 330 kvm_irqchip_commit_routes(kvm_state); 331 332 ret = kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq); 333 if (ret < 0) { 334 return ret; 335 } 336 v->unmasked = true; 337 338 return 0; 339 } 340 341 static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector) 342 { 343 IVShmemState *s = IVSHMEM_COMMON(dev); 344 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 345 MSIVector *v = &s->msi_vectors[vector]; 346 int ret; 347 348 IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector); 349 if (!v->pdev) { 350 error_report("ivshmem: vector %d route does not exist", vector); 351 return; 352 } 353 assert(v->unmasked); 354 355 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, v->virq); 356 if (ret < 0) { 357 error_report("remove_irqfd_notifier_gsi failed"); 358 return; 359 } 360 v->unmasked = false; 361 } 362 363 static void ivshmem_vector_poll(PCIDevice *dev, 364 unsigned int vector_start, 365 unsigned int vector_end) 366 { 367 IVShmemState *s = IVSHMEM_COMMON(dev); 368 unsigned int vector; 369 370 IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end); 371 372 vector_end = MIN(vector_end, s->vectors); 373 374 for (vector = vector_start; vector < vector_end; vector++) { 375 EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector]; 376 377 if (!msix_is_masked(dev, vector)) { 378 continue; 379 } 380 381 if (event_notifier_test_and_clear(notifier)) { 382 msix_set_pending(dev, vector); 383 } 384 } 385 } 386 387 static void watch_vector_notifier(IVShmemState *s, EventNotifier *n, 388 int vector) 389 { 390 int eventfd = event_notifier_get_fd(n); 391 392 assert(!s->msi_vectors[vector].pdev); 393 s->msi_vectors[vector].pdev = PCI_DEVICE(s); 394 395 qemu_set_fd_handler(eventfd, ivshmem_vector_notify, 396 NULL, &s->msi_vectors[vector]); 397 } 398 399 static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i) 400 { 401 memory_region_add_eventfd(&s->ivshmem_mmio, 402 DOORBELL, 403 4, 404 true, 405 (posn << 16) | i, 406 &s->peers[posn].eventfds[i]); 407 } 408 409 static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i) 410 { 411 memory_region_del_eventfd(&s->ivshmem_mmio, 412 DOORBELL, 413 4, 414 true, 415 (posn << 16) | i, 416 &s->peers[posn].eventfds[i]); 417 } 418 419 static void close_peer_eventfds(IVShmemState *s, int posn) 420 { 421 int i, n; 422 423 assert(posn >= 0 && posn < s->nb_peers); 424 n = s->peers[posn].nb_eventfds; 425 426 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) { 427 memory_region_transaction_begin(); 428 for (i = 0; i < n; i++) { 429 ivshmem_del_eventfd(s, posn, i); 430 } 431 memory_region_transaction_commit(); 432 } 433 434 for (i = 0; i < n; i++) { 435 event_notifier_cleanup(&s->peers[posn].eventfds[i]); 436 } 437 438 g_free(s->peers[posn].eventfds); 439 s->peers[posn].nb_eventfds = 0; 440 } 441 442 static void resize_peers(IVShmemState *s, int nb_peers) 443 { 444 int old_nb_peers = s->nb_peers; 445 int i; 446 447 assert(nb_peers > old_nb_peers); 448 IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers); 449 450 s->peers = g_realloc(s->peers, nb_peers * sizeof(Peer)); 451 s->nb_peers = nb_peers; 452 453 for (i = old_nb_peers; i < nb_peers; i++) { 454 s->peers[i].eventfds = g_new0(EventNotifier, s->vectors); 455 s->peers[i].nb_eventfds = 0; 456 } 457 } 458 459 static void ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector, 460 Error **errp) 461 { 462 PCIDevice *pdev = PCI_DEVICE(s); 463 int ret; 464 465 IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector); 466 assert(!s->msi_vectors[vector].pdev); 467 468 ret = kvm_irqchip_add_msi_route(kvm_state, vector, pdev); 469 if (ret < 0) { 470 error_setg(errp, "kvm_irqchip_add_msi_route failed"); 471 return; 472 } 473 474 s->msi_vectors[vector].virq = ret; 475 s->msi_vectors[vector].pdev = pdev; 476 } 477 478 static void setup_interrupt(IVShmemState *s, int vector, Error **errp) 479 { 480 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 481 bool with_irqfd = kvm_msi_via_irqfd_enabled() && 482 ivshmem_has_feature(s, IVSHMEM_MSI); 483 PCIDevice *pdev = PCI_DEVICE(s); 484 Error *err = NULL; 485 486 IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector); 487 488 if (!with_irqfd) { 489 IVSHMEM_DPRINTF("with eventfd\n"); 490 watch_vector_notifier(s, n, vector); 491 } else if (msix_enabled(pdev)) { 492 IVSHMEM_DPRINTF("with irqfd\n"); 493 ivshmem_add_kvm_msi_virq(s, vector, &err); 494 if (err) { 495 error_propagate(errp, err); 496 return; 497 } 498 499 if (!msix_is_masked(pdev, vector)) { 500 kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, 501 s->msi_vectors[vector].virq); 502 /* TODO handle error */ 503 } 504 } else { 505 /* it will be delayed until msix is enabled, in write_config */ 506 IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n"); 507 } 508 } 509 510 static void process_msg_shmem(IVShmemState *s, int fd, Error **errp) 511 { 512 Error *local_err = NULL; 513 struct stat buf; 514 size_t size; 515 516 if (s->ivshmem_bar2) { 517 error_setg(errp, "server sent unexpected shared memory message"); 518 close(fd); 519 return; 520 } 521 522 if (fstat(fd, &buf) < 0) { 523 error_setg_errno(errp, errno, 524 "can't determine size of shared memory sent by server"); 525 close(fd); 526 return; 527 } 528 529 size = buf.st_size; 530 531 /* Legacy cruft */ 532 if (s->legacy_size != SIZE_MAX) { 533 if (size < s->legacy_size) { 534 error_setg(errp, "server sent only %zd bytes of shared memory", 535 (size_t)buf.st_size); 536 close(fd); 537 return; 538 } 539 size = s->legacy_size; 540 } 541 542 /* mmap the region and map into the BAR2 */ 543 memory_region_init_ram_from_fd(&s->server_bar2, OBJECT(s), 544 "ivshmem.bar2", size, true, fd, &local_err); 545 if (local_err) { 546 error_propagate(errp, local_err); 547 return; 548 } 549 550 s->ivshmem_bar2 = &s->server_bar2; 551 } 552 553 static void process_msg_disconnect(IVShmemState *s, uint16_t posn, 554 Error **errp) 555 { 556 IVSHMEM_DPRINTF("posn %d has gone away\n", posn); 557 if (posn >= s->nb_peers || posn == s->vm_id) { 558 error_setg(errp, "invalid peer %d", posn); 559 return; 560 } 561 close_peer_eventfds(s, posn); 562 } 563 564 static void process_msg_connect(IVShmemState *s, uint16_t posn, int fd, 565 Error **errp) 566 { 567 Peer *peer = &s->peers[posn]; 568 int vector; 569 570 /* 571 * The N-th connect message for this peer comes with the file 572 * descriptor for vector N-1. Count messages to find the vector. 573 */ 574 if (peer->nb_eventfds >= s->vectors) { 575 error_setg(errp, "Too many eventfd received, device has %d vectors", 576 s->vectors); 577 close(fd); 578 return; 579 } 580 vector = peer->nb_eventfds++; 581 582 IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn, vector, fd); 583 event_notifier_init_fd(&peer->eventfds[vector], fd); 584 fcntl_setfl(fd, O_NONBLOCK); /* msix/irqfd poll non block */ 585 586 if (posn == s->vm_id) { 587 setup_interrupt(s, vector, errp); 588 /* TODO do we need to handle the error? */ 589 } 590 591 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) { 592 ivshmem_add_eventfd(s, posn, vector); 593 } 594 } 595 596 static void process_msg(IVShmemState *s, int64_t msg, int fd, Error **errp) 597 { 598 IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd); 599 600 if (msg < -1 || msg > IVSHMEM_MAX_PEERS) { 601 error_setg(errp, "server sent invalid message %" PRId64, msg); 602 close(fd); 603 return; 604 } 605 606 if (msg == -1) { 607 process_msg_shmem(s, fd, errp); 608 return; 609 } 610 611 if (msg >= s->nb_peers) { 612 resize_peers(s, msg + 1); 613 } 614 615 if (fd >= 0) { 616 process_msg_connect(s, msg, fd, errp); 617 } else { 618 process_msg_disconnect(s, msg, errp); 619 } 620 } 621 622 static int ivshmem_can_receive(void *opaque) 623 { 624 IVShmemState *s = opaque; 625 626 assert(s->msg_buffered_bytes < sizeof(s->msg_buf)); 627 return sizeof(s->msg_buf) - s->msg_buffered_bytes; 628 } 629 630 static void ivshmem_read(void *opaque, const uint8_t *buf, int size) 631 { 632 IVShmemState *s = opaque; 633 Error *err = NULL; 634 int fd; 635 int64_t msg; 636 637 assert(size >= 0 && s->msg_buffered_bytes + size <= sizeof(s->msg_buf)); 638 memcpy((unsigned char *)&s->msg_buf + s->msg_buffered_bytes, buf, size); 639 s->msg_buffered_bytes += size; 640 if (s->msg_buffered_bytes < sizeof(s->msg_buf)) { 641 return; 642 } 643 msg = le64_to_cpu(s->msg_buf); 644 s->msg_buffered_bytes = 0; 645 646 fd = qemu_chr_fe_get_msgfd(&s->server_chr); 647 648 process_msg(s, msg, fd, &err); 649 if (err) { 650 error_report_err(err); 651 } 652 } 653 654 static int64_t ivshmem_recv_msg(IVShmemState *s, int *pfd, Error **errp) 655 { 656 int64_t msg; 657 int n, ret; 658 659 n = 0; 660 do { 661 ret = qemu_chr_fe_read_all(&s->server_chr, (uint8_t *)&msg + n, 662 sizeof(msg) - n); 663 if (ret < 0) { 664 if (ret == -EINTR) { 665 continue; 666 } 667 error_setg_errno(errp, -ret, "read from server failed"); 668 return INT64_MIN; 669 } 670 n += ret; 671 } while (n < sizeof(msg)); 672 673 *pfd = qemu_chr_fe_get_msgfd(&s->server_chr); 674 return le64_to_cpu(msg); 675 } 676 677 static void ivshmem_recv_setup(IVShmemState *s, Error **errp) 678 { 679 Error *err = NULL; 680 int64_t msg; 681 int fd; 682 683 msg = ivshmem_recv_msg(s, &fd, &err); 684 if (err) { 685 error_propagate(errp, err); 686 return; 687 } 688 if (msg != IVSHMEM_PROTOCOL_VERSION) { 689 error_setg(errp, "server sent version %" PRId64 ", expecting %d", 690 msg, IVSHMEM_PROTOCOL_VERSION); 691 return; 692 } 693 if (fd != -1) { 694 error_setg(errp, "server sent invalid version message"); 695 return; 696 } 697 698 /* 699 * ivshmem-server sends the remaining initial messages in a fixed 700 * order, but the device has always accepted them in any order. 701 * Stay as compatible as practical, just in case people use 702 * servers that behave differently. 703 */ 704 705 /* 706 * ivshmem_device_spec.txt has always required the ID message 707 * right here, and ivshmem-server has always complied. However, 708 * older versions of the device accepted it out of order, but 709 * broke when an interrupt setup message arrived before it. 710 */ 711 msg = ivshmem_recv_msg(s, &fd, &err); 712 if (err) { 713 error_propagate(errp, err); 714 return; 715 } 716 if (fd != -1 || msg < 0 || msg > IVSHMEM_MAX_PEERS) { 717 error_setg(errp, "server sent invalid ID message"); 718 return; 719 } 720 s->vm_id = msg; 721 722 /* 723 * Receive more messages until we got shared memory. 724 */ 725 do { 726 msg = ivshmem_recv_msg(s, &fd, &err); 727 if (err) { 728 error_propagate(errp, err); 729 return; 730 } 731 process_msg(s, msg, fd, &err); 732 if (err) { 733 error_propagate(errp, err); 734 return; 735 } 736 } while (msg != -1); 737 738 /* 739 * This function must either map the shared memory or fail. The 740 * loop above ensures that: it terminates normally only after it 741 * successfully processed the server's shared memory message. 742 * Assert that actually mapped the shared memory: 743 */ 744 assert(s->ivshmem_bar2); 745 } 746 747 /* Select the MSI-X vectors used by device. 748 * ivshmem maps events to vectors statically, so 749 * we just enable all vectors on init and after reset. */ 750 static void ivshmem_msix_vector_use(IVShmemState *s) 751 { 752 PCIDevice *d = PCI_DEVICE(s); 753 int i; 754 755 for (i = 0; i < s->vectors; i++) { 756 msix_vector_use(d, i); 757 } 758 } 759 760 static void ivshmem_disable_irqfd(IVShmemState *s); 761 762 static void ivshmem_reset(DeviceState *d) 763 { 764 IVShmemState *s = IVSHMEM_COMMON(d); 765 766 ivshmem_disable_irqfd(s); 767 768 s->intrstatus = 0; 769 s->intrmask = 0; 770 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 771 ivshmem_msix_vector_use(s); 772 } 773 } 774 775 static int ivshmem_setup_interrupts(IVShmemState *s, Error **errp) 776 { 777 /* allocate QEMU callback data for receiving interrupts */ 778 s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector)); 779 780 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 781 if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1, errp)) { 782 return -1; 783 } 784 785 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors); 786 ivshmem_msix_vector_use(s); 787 } 788 789 return 0; 790 } 791 792 static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector) 793 { 794 IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector); 795 796 if (s->msi_vectors[vector].pdev == NULL) { 797 return; 798 } 799 800 /* it was cleaned when masked in the frontend. */ 801 kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq); 802 803 s->msi_vectors[vector].pdev = NULL; 804 } 805 806 static void ivshmem_enable_irqfd(IVShmemState *s) 807 { 808 PCIDevice *pdev = PCI_DEVICE(s); 809 int i; 810 811 for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) { 812 Error *err = NULL; 813 814 ivshmem_add_kvm_msi_virq(s, i, &err); 815 if (err) { 816 error_report_err(err); 817 goto undo; 818 } 819 } 820 821 if (msix_set_vector_notifiers(pdev, 822 ivshmem_vector_unmask, 823 ivshmem_vector_mask, 824 ivshmem_vector_poll)) { 825 error_report("ivshmem: msix_set_vector_notifiers failed"); 826 goto undo; 827 } 828 return; 829 830 undo: 831 while (--i >= 0) { 832 ivshmem_remove_kvm_msi_virq(s, i); 833 } 834 } 835 836 static void ivshmem_disable_irqfd(IVShmemState *s) 837 { 838 PCIDevice *pdev = PCI_DEVICE(s); 839 int i; 840 841 if (!pdev->msix_vector_use_notifier) { 842 return; 843 } 844 845 msix_unset_vector_notifiers(pdev); 846 847 for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) { 848 /* 849 * MSI-X is already disabled here so msix_unset_vector_notifiers() 850 * didn't call our release notifier. Do it now to keep our masks and 851 * unmasks balanced. 852 */ 853 if (s->msi_vectors[i].unmasked) { 854 ivshmem_vector_mask(pdev, i); 855 } 856 ivshmem_remove_kvm_msi_virq(s, i); 857 } 858 859 } 860 861 static void ivshmem_write_config(PCIDevice *pdev, uint32_t address, 862 uint32_t val, int len) 863 { 864 IVShmemState *s = IVSHMEM_COMMON(pdev); 865 int is_enabled, was_enabled = msix_enabled(pdev); 866 867 pci_default_write_config(pdev, address, val, len); 868 is_enabled = msix_enabled(pdev); 869 870 if (kvm_msi_via_irqfd_enabled()) { 871 if (!was_enabled && is_enabled) { 872 ivshmem_enable_irqfd(s); 873 } else if (was_enabled && !is_enabled) { 874 ivshmem_disable_irqfd(s); 875 } 876 } 877 } 878 879 static void ivshmem_common_realize(PCIDevice *dev, Error **errp) 880 { 881 IVShmemState *s = IVSHMEM_COMMON(dev); 882 Error *err = NULL; 883 uint8_t *pci_conf; 884 uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY | 885 PCI_BASE_ADDRESS_MEM_PREFETCH; 886 Error *local_err = NULL; 887 888 /* IRQFD requires MSI */ 889 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) && 890 !ivshmem_has_feature(s, IVSHMEM_MSI)) { 891 error_setg(errp, "ioeventfd/irqfd requires MSI"); 892 return; 893 } 894 895 pci_conf = dev->config; 896 pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY; 897 898 memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s, 899 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE); 900 901 /* region for registers*/ 902 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, 903 &s->ivshmem_mmio); 904 905 if (s->not_legacy_32bit) { 906 attr |= PCI_BASE_ADDRESS_MEM_TYPE_64; 907 } 908 909 if (s->hostmem != NULL) { 910 IVSHMEM_DPRINTF("using hostmem\n"); 911 912 s->ivshmem_bar2 = host_memory_backend_get_memory(s->hostmem); 913 } else { 914 Chardev *chr = qemu_chr_fe_get_driver(&s->server_chr); 915 assert(chr); 916 917 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n", 918 chr->filename); 919 920 /* we allocate enough space for 16 peers and grow as needed */ 921 resize_peers(s, 16); 922 923 /* 924 * Receive setup messages from server synchronously. 925 * Older versions did it asynchronously, but that creates a 926 * number of entertaining race conditions. 927 */ 928 ivshmem_recv_setup(s, &err); 929 if (err) { 930 error_propagate(errp, err); 931 return; 932 } 933 934 if (s->master == ON_OFF_AUTO_ON && s->vm_id != 0) { 935 error_setg(errp, 936 "master must connect to the server before any peers"); 937 return; 938 } 939 940 qemu_chr_fe_set_handlers(&s->server_chr, ivshmem_can_receive, 941 ivshmem_read, NULL, NULL, s, NULL, true); 942 943 if (ivshmem_setup_interrupts(s, errp) < 0) { 944 error_prepend(errp, "Failed to initialize interrupts: "); 945 return; 946 } 947 } 948 949 if (s->master == ON_OFF_AUTO_AUTO) { 950 s->master = s->vm_id == 0 ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 951 } 952 953 if (!ivshmem_is_master(s)) { 954 error_setg(&s->migration_blocker, 955 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'"); 956 migrate_add_blocker(s->migration_blocker, &local_err); 957 if (local_err) { 958 error_propagate(errp, local_err); 959 error_free(s->migration_blocker); 960 return; 961 } 962 } 963 964 vmstate_register_ram(s->ivshmem_bar2, DEVICE(s)); 965 pci_register_bar(PCI_DEVICE(s), 2, attr, s->ivshmem_bar2); 966 } 967 968 static void ivshmem_exit(PCIDevice *dev) 969 { 970 IVShmemState *s = IVSHMEM_COMMON(dev); 971 int i; 972 973 if (s->migration_blocker) { 974 migrate_del_blocker(s->migration_blocker); 975 error_free(s->migration_blocker); 976 } 977 978 if (memory_region_is_mapped(s->ivshmem_bar2)) { 979 if (!s->hostmem) { 980 void *addr = memory_region_get_ram_ptr(s->ivshmem_bar2); 981 int fd; 982 983 if (munmap(addr, memory_region_size(s->ivshmem_bar2) == -1)) { 984 error_report("Failed to munmap shared memory %s", 985 strerror(errno)); 986 } 987 988 fd = memory_region_get_fd(s->ivshmem_bar2); 989 close(fd); 990 } 991 992 vmstate_unregister_ram(s->ivshmem_bar2, DEVICE(dev)); 993 } 994 995 if (s->peers) { 996 for (i = 0; i < s->nb_peers; i++) { 997 close_peer_eventfds(s, i); 998 } 999 g_free(s->peers); 1000 } 1001 1002 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 1003 msix_uninit_exclusive_bar(dev); 1004 } 1005 1006 g_free(s->msi_vectors); 1007 } 1008 1009 static int ivshmem_pre_load(void *opaque) 1010 { 1011 IVShmemState *s = opaque; 1012 1013 if (!ivshmem_is_master(s)) { 1014 error_report("'peer' devices are not migratable"); 1015 return -EINVAL; 1016 } 1017 1018 return 0; 1019 } 1020 1021 static int ivshmem_post_load(void *opaque, int version_id) 1022 { 1023 IVShmemState *s = opaque; 1024 1025 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 1026 ivshmem_msix_vector_use(s); 1027 } 1028 return 0; 1029 } 1030 1031 static void ivshmem_common_class_init(ObjectClass *klass, void *data) 1032 { 1033 DeviceClass *dc = DEVICE_CLASS(klass); 1034 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1035 1036 k->realize = ivshmem_common_realize; 1037 k->exit = ivshmem_exit; 1038 k->config_write = ivshmem_write_config; 1039 k->vendor_id = PCI_VENDOR_ID_IVSHMEM; 1040 k->device_id = PCI_DEVICE_ID_IVSHMEM; 1041 k->class_id = PCI_CLASS_MEMORY_RAM; 1042 k->revision = 1; 1043 dc->reset = ivshmem_reset; 1044 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1045 dc->desc = "Inter-VM shared memory"; 1046 } 1047 1048 static const TypeInfo ivshmem_common_info = { 1049 .name = TYPE_IVSHMEM_COMMON, 1050 .parent = TYPE_PCI_DEVICE, 1051 .instance_size = sizeof(IVShmemState), 1052 .abstract = true, 1053 .class_init = ivshmem_common_class_init, 1054 .interfaces = (InterfaceInfo[]) { 1055 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1056 { }, 1057 }, 1058 }; 1059 1060 static const VMStateDescription ivshmem_plain_vmsd = { 1061 .name = TYPE_IVSHMEM_PLAIN, 1062 .version_id = 0, 1063 .minimum_version_id = 0, 1064 .pre_load = ivshmem_pre_load, 1065 .post_load = ivshmem_post_load, 1066 .fields = (VMStateField[]) { 1067 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState), 1068 VMSTATE_UINT32(intrstatus, IVShmemState), 1069 VMSTATE_UINT32(intrmask, IVShmemState), 1070 VMSTATE_END_OF_LIST() 1071 }, 1072 }; 1073 1074 static Property ivshmem_plain_properties[] = { 1075 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), 1076 DEFINE_PROP_LINK("memdev", IVShmemState, hostmem, TYPE_MEMORY_BACKEND, 1077 HostMemoryBackend *), 1078 DEFINE_PROP_END_OF_LIST(), 1079 }; 1080 1081 static void ivshmem_plain_init(Object *obj) 1082 { 1083 IVShmemState *s = IVSHMEM_PLAIN(obj); 1084 1085 s->not_legacy_32bit = 1; 1086 } 1087 1088 static void ivshmem_plain_realize(PCIDevice *dev, Error **errp) 1089 { 1090 IVShmemState *s = IVSHMEM_COMMON(dev); 1091 1092 if (!s->hostmem) { 1093 error_setg(errp, "You must specify a 'memdev'"); 1094 return; 1095 } else if (host_memory_backend_is_mapped(s->hostmem)) { 1096 char *path = object_get_canonical_path_component(OBJECT(s->hostmem)); 1097 error_setg(errp, "can't use already busy memdev: %s", path); 1098 g_free(path); 1099 return; 1100 } 1101 1102 ivshmem_common_realize(dev, errp); 1103 host_memory_backend_set_mapped(s->hostmem, true); 1104 } 1105 1106 static void ivshmem_plain_exit(PCIDevice *pci_dev) 1107 { 1108 IVShmemState *s = IVSHMEM_COMMON(pci_dev); 1109 1110 host_memory_backend_set_mapped(s->hostmem, false); 1111 } 1112 1113 static void ivshmem_plain_class_init(ObjectClass *klass, void *data) 1114 { 1115 DeviceClass *dc = DEVICE_CLASS(klass); 1116 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1117 1118 k->realize = ivshmem_plain_realize; 1119 k->exit = ivshmem_plain_exit; 1120 dc->props = ivshmem_plain_properties; 1121 dc->vmsd = &ivshmem_plain_vmsd; 1122 } 1123 1124 static const TypeInfo ivshmem_plain_info = { 1125 .name = TYPE_IVSHMEM_PLAIN, 1126 .parent = TYPE_IVSHMEM_COMMON, 1127 .instance_size = sizeof(IVShmemState), 1128 .instance_init = ivshmem_plain_init, 1129 .class_init = ivshmem_plain_class_init, 1130 }; 1131 1132 static const VMStateDescription ivshmem_doorbell_vmsd = { 1133 .name = TYPE_IVSHMEM_DOORBELL, 1134 .version_id = 0, 1135 .minimum_version_id = 0, 1136 .pre_load = ivshmem_pre_load, 1137 .post_load = ivshmem_post_load, 1138 .fields = (VMStateField[]) { 1139 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState), 1140 VMSTATE_MSIX(parent_obj, IVShmemState), 1141 VMSTATE_UINT32(intrstatus, IVShmemState), 1142 VMSTATE_UINT32(intrmask, IVShmemState), 1143 VMSTATE_END_OF_LIST() 1144 }, 1145 }; 1146 1147 static Property ivshmem_doorbell_properties[] = { 1148 DEFINE_PROP_CHR("chardev", IVShmemState, server_chr), 1149 DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1), 1150 DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, 1151 true), 1152 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), 1153 DEFINE_PROP_END_OF_LIST(), 1154 }; 1155 1156 static void ivshmem_doorbell_init(Object *obj) 1157 { 1158 IVShmemState *s = IVSHMEM_DOORBELL(obj); 1159 1160 s->features |= (1 << IVSHMEM_MSI); 1161 s->legacy_size = SIZE_MAX; /* whatever the server sends */ 1162 s->not_legacy_32bit = 1; 1163 } 1164 1165 static void ivshmem_doorbell_realize(PCIDevice *dev, Error **errp) 1166 { 1167 IVShmemState *s = IVSHMEM_COMMON(dev); 1168 1169 if (!qemu_chr_fe_backend_connected(&s->server_chr)) { 1170 error_setg(errp, "You must specify a 'chardev'"); 1171 return; 1172 } 1173 1174 ivshmem_common_realize(dev, errp); 1175 } 1176 1177 static void ivshmem_doorbell_class_init(ObjectClass *klass, void *data) 1178 { 1179 DeviceClass *dc = DEVICE_CLASS(klass); 1180 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1181 1182 k->realize = ivshmem_doorbell_realize; 1183 dc->props = ivshmem_doorbell_properties; 1184 dc->vmsd = &ivshmem_doorbell_vmsd; 1185 } 1186 1187 static const TypeInfo ivshmem_doorbell_info = { 1188 .name = TYPE_IVSHMEM_DOORBELL, 1189 .parent = TYPE_IVSHMEM_COMMON, 1190 .instance_size = sizeof(IVShmemState), 1191 .instance_init = ivshmem_doorbell_init, 1192 .class_init = ivshmem_doorbell_class_init, 1193 }; 1194 1195 static int ivshmem_load_old(QEMUFile *f, void *opaque, int version_id) 1196 { 1197 IVShmemState *s = opaque; 1198 PCIDevice *pdev = PCI_DEVICE(s); 1199 int ret; 1200 1201 IVSHMEM_DPRINTF("ivshmem_load_old\n"); 1202 1203 if (version_id != 0) { 1204 return -EINVAL; 1205 } 1206 1207 ret = ivshmem_pre_load(s); 1208 if (ret) { 1209 return ret; 1210 } 1211 1212 ret = pci_device_load(pdev, f); 1213 if (ret) { 1214 return ret; 1215 } 1216 1217 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 1218 msix_load(pdev, f); 1219 ivshmem_msix_vector_use(s); 1220 } else { 1221 s->intrstatus = qemu_get_be32(f); 1222 s->intrmask = qemu_get_be32(f); 1223 } 1224 1225 return 0; 1226 } 1227 1228 static bool test_msix(void *opaque, int version_id) 1229 { 1230 IVShmemState *s = opaque; 1231 1232 return ivshmem_has_feature(s, IVSHMEM_MSI); 1233 } 1234 1235 static bool test_no_msix(void *opaque, int version_id) 1236 { 1237 return !test_msix(opaque, version_id); 1238 } 1239 1240 static const VMStateDescription ivshmem_vmsd = { 1241 .name = "ivshmem", 1242 .version_id = 1, 1243 .minimum_version_id = 1, 1244 .pre_load = ivshmem_pre_load, 1245 .post_load = ivshmem_post_load, 1246 .fields = (VMStateField[]) { 1247 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState), 1248 1249 VMSTATE_MSIX_TEST(parent_obj, IVShmemState, test_msix), 1250 VMSTATE_UINT32_TEST(intrstatus, IVShmemState, test_no_msix), 1251 VMSTATE_UINT32_TEST(intrmask, IVShmemState, test_no_msix), 1252 1253 VMSTATE_END_OF_LIST() 1254 }, 1255 .load_state_old = ivshmem_load_old, 1256 .minimum_version_id_old = 0 1257 }; 1258 1259 static Property ivshmem_properties[] = { 1260 DEFINE_PROP_CHR("chardev", IVShmemState, server_chr), 1261 DEFINE_PROP_STRING("size", IVShmemState, sizearg), 1262 DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1), 1263 DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, 1264 false), 1265 DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true), 1266 DEFINE_PROP_STRING("shm", IVShmemState, shmobj), 1267 DEFINE_PROP_STRING("role", IVShmemState, role), 1268 DEFINE_PROP_UINT32("use64", IVShmemState, not_legacy_32bit, 1), 1269 DEFINE_PROP_END_OF_LIST(), 1270 }; 1271 1272 static void desugar_shm(IVShmemState *s) 1273 { 1274 Object *obj; 1275 char *path; 1276 1277 obj = object_new("memory-backend-file"); 1278 path = g_strdup_printf("/dev/shm/%s", s->shmobj); 1279 object_property_set_str(obj, path, "mem-path", &error_abort); 1280 g_free(path); 1281 object_property_set_int(obj, s->legacy_size, "size", &error_abort); 1282 object_property_set_bool(obj, true, "share", &error_abort); 1283 object_property_add_child(OBJECT(s), "internal-shm-backend", obj, 1284 &error_abort); 1285 user_creatable_complete(obj, &error_abort); 1286 s->hostmem = MEMORY_BACKEND(obj); 1287 } 1288 1289 static void ivshmem_realize(PCIDevice *dev, Error **errp) 1290 { 1291 IVShmemState *s = IVSHMEM_COMMON(dev); 1292 1293 if (!qtest_enabled()) { 1294 error_report("ivshmem is deprecated, please use ivshmem-plain" 1295 " or ivshmem-doorbell instead"); 1296 } 1297 1298 if (qemu_chr_fe_backend_connected(&s->server_chr) + !!s->shmobj != 1) { 1299 error_setg(errp, "You must specify either 'shm' or 'chardev'"); 1300 return; 1301 } 1302 1303 if (s->sizearg == NULL) { 1304 s->legacy_size = 4 << 20; /* 4 MB default */ 1305 } else { 1306 int ret; 1307 uint64_t size; 1308 1309 ret = qemu_strtosz_MiB(s->sizearg, NULL, &size); 1310 if (ret < 0 || (size_t)size != size || !is_power_of_2(size)) { 1311 error_setg(errp, "Invalid size %s", s->sizearg); 1312 return; 1313 } 1314 s->legacy_size = size; 1315 } 1316 1317 /* check that role is reasonable */ 1318 if (s->role) { 1319 if (strncmp(s->role, "peer", 5) == 0) { 1320 s->master = ON_OFF_AUTO_OFF; 1321 } else if (strncmp(s->role, "master", 7) == 0) { 1322 s->master = ON_OFF_AUTO_ON; 1323 } else { 1324 error_setg(errp, "'role' must be 'peer' or 'master'"); 1325 return; 1326 } 1327 } else { 1328 s->master = ON_OFF_AUTO_AUTO; 1329 } 1330 1331 if (s->shmobj) { 1332 desugar_shm(s); 1333 } 1334 1335 /* 1336 * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a 1337 * bald-faced lie then. But it's a backwards compatible lie. 1338 */ 1339 pci_config_set_interrupt_pin(dev->config, 1); 1340 1341 ivshmem_common_realize(dev, errp); 1342 } 1343 1344 static void ivshmem_class_init(ObjectClass *klass, void *data) 1345 { 1346 DeviceClass *dc = DEVICE_CLASS(klass); 1347 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1348 1349 k->realize = ivshmem_realize; 1350 k->revision = 0; 1351 dc->desc = "Inter-VM shared memory (legacy)"; 1352 dc->props = ivshmem_properties; 1353 dc->vmsd = &ivshmem_vmsd; 1354 } 1355 1356 static const TypeInfo ivshmem_info = { 1357 .name = TYPE_IVSHMEM, 1358 .parent = TYPE_IVSHMEM_COMMON, 1359 .instance_size = sizeof(IVShmemState), 1360 .class_init = ivshmem_class_init, 1361 }; 1362 1363 static void ivshmem_register_types(void) 1364 { 1365 type_register_static(&ivshmem_common_info); 1366 type_register_static(&ivshmem_plain_info); 1367 type_register_static(&ivshmem_doorbell_info); 1368 type_register_static(&ivshmem_info); 1369 } 1370 1371 type_init(ivshmem_register_types) 1372