1 /* 2 * Inter-VM Shared Memory PCI device. 3 * 4 * Author: 5 * Cam Macdonell <cam@cs.ualberta.ca> 6 * 7 * Based On: cirrus_vga.c 8 * Copyright (c) 2004 Fabrice Bellard 9 * Copyright (c) 2004 Makoto Suzuki (suzu) 10 * 11 * and rtl8139.c 12 * Copyright (c) 2006 Igor Kovalenko 13 * 14 * This code is licensed under the GNU GPL v2. 15 * 16 * Contributions after 2012-01-13 are licensed under the terms of the 17 * GNU GPL, version 2 or (at your option) any later version. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/units.h" 22 #include "qapi/error.h" 23 #include "qemu/cutils.h" 24 #include "hw/pci/pci.h" 25 #include "hw/qdev-properties.h" 26 #include "hw/qdev-properties-system.h" 27 #include "hw/pci/msi.h" 28 #include "hw/pci/msix.h" 29 #include "system/kvm.h" 30 #include "migration/blocker.h" 31 #include "migration/vmstate.h" 32 #include "qemu/error-report.h" 33 #include "qemu/event_notifier.h" 34 #include "qemu/module.h" 35 #include "qom/object_interfaces.h" 36 #include "chardev/char-fe.h" 37 #include "system/hostmem.h" 38 #include "qapi/visitor.h" 39 40 #include "hw/misc/ivshmem.h" 41 #include "qom/object.h" 42 43 #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET 44 #define PCI_DEVICE_ID_IVSHMEM 0x1110 45 46 #define IVSHMEM_MAX_PEERS UINT16_MAX 47 #define IVSHMEM_IOEVENTFD 0 48 #define IVSHMEM_MSI 1 49 50 #define IVSHMEM_REG_BAR_SIZE 0x100 51 52 #define IVSHMEM_DEBUG 0 53 #define IVSHMEM_DPRINTF(fmt, ...) \ 54 do { \ 55 if (IVSHMEM_DEBUG) { \ 56 printf("IVSHMEM: " fmt, ## __VA_ARGS__); \ 57 } \ 58 } while (0) 59 60 #define TYPE_IVSHMEM_COMMON "ivshmem-common" 61 typedef struct IVShmemState IVShmemState; 62 DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_COMMON, 63 TYPE_IVSHMEM_COMMON) 64 65 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain" 66 DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_PLAIN, 67 TYPE_IVSHMEM_PLAIN) 68 69 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell" 70 DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_DOORBELL, 71 TYPE_IVSHMEM_DOORBELL) 72 73 #define TYPE_IVSHMEM "ivshmem" 74 DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM, 75 TYPE_IVSHMEM) 76 77 typedef struct Peer { 78 int nb_eventfds; 79 EventNotifier *eventfds; 80 } Peer; 81 82 typedef struct MSIVector { 83 PCIDevice *pdev; 84 int virq; 85 bool unmasked; 86 } MSIVector; 87 88 struct IVShmemState { 89 /*< private >*/ 90 PCIDevice parent_obj; 91 /*< public >*/ 92 93 uint32_t features; 94 95 /* exactly one of these two may be set */ 96 HostMemoryBackend *hostmem; /* with interrupts */ 97 CharBackend server_chr; /* without interrupts */ 98 99 /* registers */ 100 uint32_t intrmask; 101 uint32_t intrstatus; 102 int vm_id; 103 104 /* BARs */ 105 MemoryRegion ivshmem_mmio; /* BAR 0 (registers) */ 106 MemoryRegion *ivshmem_bar2; /* BAR 2 (shared memory) */ 107 MemoryRegion server_bar2; /* used with server_chr */ 108 109 /* interrupt support */ 110 Peer *peers; 111 int nb_peers; /* space in @peers[] */ 112 uint32_t vectors; 113 MSIVector *msi_vectors; 114 uint64_t msg_buf; /* buffer for receiving server messages */ 115 int msg_buffered_bytes; /* #bytes in @msg_buf */ 116 117 /* migration stuff */ 118 OnOffAuto master; 119 Error *migration_blocker; 120 }; 121 122 /* registers for the Inter-VM shared memory device */ 123 enum ivshmem_registers { 124 INTRMASK = 0, 125 INTRSTATUS = 4, 126 IVPOSITION = 8, 127 DOORBELL = 12, 128 }; 129 130 static inline uint32_t ivshmem_has_feature(IVShmemState *ivs, 131 unsigned int feature) { 132 return (ivs->features & (1 << feature)); 133 } 134 135 static inline bool ivshmem_is_master(IVShmemState *s) 136 { 137 assert(s->master != ON_OFF_AUTO_AUTO); 138 return s->master == ON_OFF_AUTO_ON; 139 } 140 141 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val) 142 { 143 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val); 144 145 s->intrmask = val; 146 } 147 148 static uint32_t ivshmem_IntrMask_read(IVShmemState *s) 149 { 150 uint32_t ret = s->intrmask; 151 152 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret); 153 return ret; 154 } 155 156 static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val) 157 { 158 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val); 159 160 s->intrstatus = val; 161 } 162 163 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s) 164 { 165 uint32_t ret = s->intrstatus; 166 167 /* reading ISR clears all interrupts */ 168 s->intrstatus = 0; 169 return ret; 170 } 171 172 static void ivshmem_io_write(void *opaque, hwaddr addr, 173 uint64_t val, unsigned size) 174 { 175 IVShmemState *s = opaque; 176 177 uint16_t dest = val >> 16; 178 uint16_t vector = val & 0xff; 179 180 addr &= 0xfc; 181 182 IVSHMEM_DPRINTF("writing to addr " HWADDR_FMT_plx "\n", addr); 183 switch (addr) 184 { 185 case INTRMASK: 186 ivshmem_IntrMask_write(s, val); 187 break; 188 189 case INTRSTATUS: 190 ivshmem_IntrStatus_write(s, val); 191 break; 192 193 case DOORBELL: 194 /* check that dest VM ID is reasonable */ 195 if (dest >= s->nb_peers) { 196 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest); 197 break; 198 } 199 200 /* check doorbell range */ 201 if (vector < s->peers[dest].nb_eventfds) { 202 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector); 203 event_notifier_set(&s->peers[dest].eventfds[vector]); 204 } else { 205 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n", 206 vector, dest); 207 } 208 break; 209 default: 210 IVSHMEM_DPRINTF("Unhandled write " HWADDR_FMT_plx "\n", addr); 211 } 212 } 213 214 static uint64_t ivshmem_io_read(void *opaque, hwaddr addr, 215 unsigned size) 216 { 217 218 IVShmemState *s = opaque; 219 uint32_t ret; 220 221 switch (addr) 222 { 223 case INTRMASK: 224 ret = ivshmem_IntrMask_read(s); 225 break; 226 227 case INTRSTATUS: 228 ret = ivshmem_IntrStatus_read(s); 229 break; 230 231 case IVPOSITION: 232 ret = s->vm_id; 233 break; 234 235 default: 236 IVSHMEM_DPRINTF("why are we reading " HWADDR_FMT_plx "\n", addr); 237 ret = 0; 238 } 239 240 return ret; 241 } 242 243 static const MemoryRegionOps ivshmem_mmio_ops = { 244 .read = ivshmem_io_read, 245 .write = ivshmem_io_write, 246 .endianness = DEVICE_LITTLE_ENDIAN, 247 .impl = { 248 .min_access_size = 4, 249 .max_access_size = 4, 250 }, 251 }; 252 253 static void ivshmem_vector_notify(void *opaque) 254 { 255 MSIVector *entry = opaque; 256 PCIDevice *pdev = entry->pdev; 257 IVShmemState *s = IVSHMEM_COMMON(pdev); 258 int vector = entry - s->msi_vectors; 259 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 260 261 if (!event_notifier_test_and_clear(n)) { 262 return; 263 } 264 265 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector); 266 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 267 if (msix_enabled(pdev)) { 268 msix_notify(pdev, vector); 269 } 270 } else { 271 ivshmem_IntrStatus_write(s, 1); 272 } 273 } 274 275 static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector, 276 MSIMessage msg) 277 { 278 IVShmemState *s = IVSHMEM_COMMON(dev); 279 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 280 MSIVector *v = &s->msi_vectors[vector]; 281 int ret; 282 283 IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector); 284 if (!v->pdev) { 285 error_report("ivshmem: vector %d route does not exist", vector); 286 return -EINVAL; 287 } 288 assert(!v->unmasked); 289 290 ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev); 291 if (ret < 0) { 292 return ret; 293 } 294 kvm_irqchip_commit_routes(kvm_state); 295 296 ret = kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq); 297 if (ret < 0) { 298 return ret; 299 } 300 v->unmasked = true; 301 302 return 0; 303 } 304 305 static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector) 306 { 307 IVShmemState *s = IVSHMEM_COMMON(dev); 308 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 309 MSIVector *v = &s->msi_vectors[vector]; 310 int ret; 311 312 IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector); 313 if (!v->pdev) { 314 error_report("ivshmem: vector %d route does not exist", vector); 315 return; 316 } 317 assert(v->unmasked); 318 319 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, v->virq); 320 if (ret < 0) { 321 error_report("remove_irqfd_notifier_gsi failed"); 322 return; 323 } 324 v->unmasked = false; 325 } 326 327 static void ivshmem_vector_poll(PCIDevice *dev, 328 unsigned int vector_start, 329 unsigned int vector_end) 330 { 331 IVShmemState *s = IVSHMEM_COMMON(dev); 332 unsigned int vector; 333 334 IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end); 335 336 vector_end = MIN(vector_end, s->vectors); 337 338 for (vector = vector_start; vector < vector_end; vector++) { 339 EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector]; 340 341 if (!msix_is_masked(dev, vector)) { 342 continue; 343 } 344 345 if (event_notifier_test_and_clear(notifier)) { 346 msix_set_pending(dev, vector); 347 } 348 } 349 } 350 351 static void watch_vector_notifier(IVShmemState *s, EventNotifier *n, 352 int vector) 353 { 354 int eventfd = event_notifier_get_fd(n); 355 356 assert(!s->msi_vectors[vector].pdev); 357 s->msi_vectors[vector].pdev = PCI_DEVICE(s); 358 359 qemu_set_fd_handler(eventfd, ivshmem_vector_notify, 360 NULL, &s->msi_vectors[vector]); 361 } 362 363 static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i) 364 { 365 memory_region_add_eventfd(&s->ivshmem_mmio, 366 DOORBELL, 367 4, 368 true, 369 (posn << 16) | i, 370 &s->peers[posn].eventfds[i]); 371 } 372 373 static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i) 374 { 375 memory_region_del_eventfd(&s->ivshmem_mmio, 376 DOORBELL, 377 4, 378 true, 379 (posn << 16) | i, 380 &s->peers[posn].eventfds[i]); 381 } 382 383 static void close_peer_eventfds(IVShmemState *s, int posn) 384 { 385 int i, n; 386 387 assert(posn >= 0 && posn < s->nb_peers); 388 n = s->peers[posn].nb_eventfds; 389 390 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) { 391 memory_region_transaction_begin(); 392 for (i = 0; i < n; i++) { 393 ivshmem_del_eventfd(s, posn, i); 394 } 395 memory_region_transaction_commit(); 396 } 397 398 for (i = 0; i < n; i++) { 399 event_notifier_cleanup(&s->peers[posn].eventfds[i]); 400 } 401 402 g_free(s->peers[posn].eventfds); 403 s->peers[posn].nb_eventfds = 0; 404 } 405 406 static void resize_peers(IVShmemState *s, int nb_peers) 407 { 408 int old_nb_peers = s->nb_peers; 409 int i; 410 411 assert(nb_peers > old_nb_peers); 412 IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers); 413 414 s->peers = g_renew(Peer, s->peers, nb_peers); 415 s->nb_peers = nb_peers; 416 417 for (i = old_nb_peers; i < nb_peers; i++) { 418 s->peers[i].eventfds = g_new0(EventNotifier, s->vectors); 419 s->peers[i].nb_eventfds = 0; 420 } 421 } 422 423 static void ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector, 424 Error **errp) 425 { 426 PCIDevice *pdev = PCI_DEVICE(s); 427 KVMRouteChange c; 428 int ret; 429 430 IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector); 431 assert(!s->msi_vectors[vector].pdev); 432 433 c = kvm_irqchip_begin_route_changes(kvm_state); 434 ret = kvm_irqchip_add_msi_route(&c, vector, pdev); 435 if (ret < 0) { 436 error_setg(errp, "kvm_irqchip_add_msi_route failed"); 437 return; 438 } 439 kvm_irqchip_commit_route_changes(&c); 440 441 s->msi_vectors[vector].virq = ret; 442 s->msi_vectors[vector].pdev = pdev; 443 } 444 445 static void setup_interrupt(IVShmemState *s, int vector, Error **errp) 446 { 447 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; 448 bool with_irqfd = kvm_msi_via_irqfd_enabled() && 449 ivshmem_has_feature(s, IVSHMEM_MSI); 450 PCIDevice *pdev = PCI_DEVICE(s); 451 Error *err = NULL; 452 453 IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector); 454 455 if (!with_irqfd) { 456 IVSHMEM_DPRINTF("with eventfd\n"); 457 watch_vector_notifier(s, n, vector); 458 } else if (msix_enabled(pdev)) { 459 IVSHMEM_DPRINTF("with irqfd\n"); 460 ivshmem_add_kvm_msi_virq(s, vector, &err); 461 if (err) { 462 error_propagate(errp, err); 463 return; 464 } 465 466 if (!msix_is_masked(pdev, vector)) { 467 kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, 468 s->msi_vectors[vector].virq); 469 /* TODO handle error */ 470 } 471 } else { 472 /* it will be delayed until msix is enabled, in write_config */ 473 IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n"); 474 } 475 } 476 477 static void process_msg_shmem(IVShmemState *s, int fd, Error **errp) 478 { 479 struct stat buf; 480 size_t size; 481 482 if (fd < 0) { 483 error_setg(errp, "server didn't provide fd with shared memory message"); 484 return; 485 } 486 487 if (s->ivshmem_bar2) { 488 error_setg(errp, "server sent unexpected shared memory message"); 489 close(fd); 490 return; 491 } 492 493 if (fstat(fd, &buf) < 0) { 494 error_setg_errno(errp, errno, 495 "can't determine size of shared memory sent by server"); 496 close(fd); 497 return; 498 } 499 500 size = buf.st_size; 501 502 /* mmap the region and map into the BAR2 */ 503 if (!memory_region_init_ram_from_fd(&s->server_bar2, OBJECT(s), 504 "ivshmem.bar2", size, RAM_SHARED, 505 fd, 0, errp)) { 506 return; 507 } 508 509 s->ivshmem_bar2 = &s->server_bar2; 510 } 511 512 static void process_msg_disconnect(IVShmemState *s, uint16_t posn, 513 Error **errp) 514 { 515 IVSHMEM_DPRINTF("posn %d has gone away\n", posn); 516 if (posn >= s->nb_peers || posn == s->vm_id) { 517 error_setg(errp, "invalid peer %d", posn); 518 return; 519 } 520 close_peer_eventfds(s, posn); 521 } 522 523 static void process_msg_connect(IVShmemState *s, uint16_t posn, int fd, 524 Error **errp) 525 { 526 Peer *peer = &s->peers[posn]; 527 int vector; 528 529 /* 530 * The N-th connect message for this peer comes with the file 531 * descriptor for vector N-1. Count messages to find the vector. 532 */ 533 if (peer->nb_eventfds >= s->vectors) { 534 error_setg(errp, "Too many eventfd received, device has %d vectors", 535 s->vectors); 536 close(fd); 537 return; 538 } 539 vector = peer->nb_eventfds++; 540 541 IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn, vector, fd); 542 event_notifier_init_fd(&peer->eventfds[vector], fd); 543 g_unix_set_fd_nonblocking(fd, true, NULL); /* msix/irqfd poll non block */ 544 545 if (posn == s->vm_id) { 546 setup_interrupt(s, vector, errp); 547 /* TODO do we need to handle the error? */ 548 } 549 550 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) { 551 ivshmem_add_eventfd(s, posn, vector); 552 } 553 } 554 555 static void process_msg(IVShmemState *s, int64_t msg, int fd, Error **errp) 556 { 557 IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd); 558 559 if (msg < -1 || msg > IVSHMEM_MAX_PEERS) { 560 error_setg(errp, "server sent invalid message %" PRId64, msg); 561 if (fd >= 0) { 562 close(fd); 563 } 564 return; 565 } 566 567 if (msg == -1) { 568 process_msg_shmem(s, fd, errp); 569 return; 570 } 571 572 if (msg >= s->nb_peers) { 573 resize_peers(s, msg + 1); 574 } 575 576 if (fd >= 0) { 577 process_msg_connect(s, msg, fd, errp); 578 } else { 579 process_msg_disconnect(s, msg, errp); 580 } 581 } 582 583 static int ivshmem_can_receive(void *opaque) 584 { 585 IVShmemState *s = opaque; 586 587 assert(s->msg_buffered_bytes < sizeof(s->msg_buf)); 588 return sizeof(s->msg_buf) - s->msg_buffered_bytes; 589 } 590 591 static void ivshmem_read(void *opaque, const uint8_t *buf, int size) 592 { 593 IVShmemState *s = opaque; 594 Error *err = NULL; 595 int fd; 596 int64_t msg; 597 598 assert(size >= 0 && s->msg_buffered_bytes + size <= sizeof(s->msg_buf)); 599 memcpy((unsigned char *)&s->msg_buf + s->msg_buffered_bytes, buf, size); 600 s->msg_buffered_bytes += size; 601 if (s->msg_buffered_bytes < sizeof(s->msg_buf)) { 602 return; 603 } 604 msg = le64_to_cpu(s->msg_buf); 605 s->msg_buffered_bytes = 0; 606 607 fd = qemu_chr_fe_get_msgfd(&s->server_chr); 608 609 process_msg(s, msg, fd, &err); 610 if (err) { 611 error_report_err(err); 612 } 613 } 614 615 static int64_t ivshmem_recv_msg(IVShmemState *s, int *pfd, Error **errp) 616 { 617 int64_t msg; 618 int n, ret; 619 620 n = 0; 621 do { 622 ret = qemu_chr_fe_read_all(&s->server_chr, (uint8_t *)&msg + n, 623 sizeof(msg) - n); 624 if (ret < 0) { 625 if (ret == -EINTR) { 626 continue; 627 } 628 error_setg_errno(errp, -ret, "read from server failed"); 629 return INT64_MIN; 630 } 631 n += ret; 632 } while (n < sizeof(msg)); 633 634 *pfd = qemu_chr_fe_get_msgfd(&s->server_chr); 635 return le64_to_cpu(msg); 636 } 637 638 static void ivshmem_recv_setup(IVShmemState *s, Error **errp) 639 { 640 Error *err = NULL; 641 int64_t msg; 642 int fd; 643 644 msg = ivshmem_recv_msg(s, &fd, &err); 645 if (err) { 646 error_propagate(errp, err); 647 return; 648 } 649 if (msg != IVSHMEM_PROTOCOL_VERSION) { 650 error_setg(errp, "server sent version %" PRId64 ", expecting %d", 651 msg, IVSHMEM_PROTOCOL_VERSION); 652 return; 653 } 654 if (fd != -1) { 655 error_setg(errp, "server sent invalid version message"); 656 return; 657 } 658 659 /* 660 * ivshmem-server sends the remaining initial messages in a fixed 661 * order, but the device has always accepted them in any order. 662 * Stay as compatible as practical, just in case people use 663 * servers that behave differently. 664 */ 665 666 /* 667 * ivshmem_device_spec.txt has always required the ID message 668 * right here, and ivshmem-server has always complied. However, 669 * older versions of the device accepted it out of order, but 670 * broke when an interrupt setup message arrived before it. 671 */ 672 msg = ivshmem_recv_msg(s, &fd, &err); 673 if (err) { 674 error_propagate(errp, err); 675 return; 676 } 677 if (fd != -1 || msg < 0 || msg > IVSHMEM_MAX_PEERS) { 678 error_setg(errp, "server sent invalid ID message"); 679 return; 680 } 681 s->vm_id = msg; 682 683 /* 684 * Receive more messages until we got shared memory. 685 */ 686 do { 687 msg = ivshmem_recv_msg(s, &fd, &err); 688 if (err) { 689 error_propagate(errp, err); 690 return; 691 } 692 process_msg(s, msg, fd, &err); 693 if (err) { 694 error_propagate(errp, err); 695 return; 696 } 697 } while (msg != -1); 698 699 /* 700 * This function must either map the shared memory or fail. The 701 * loop above ensures that: it terminates normally only after it 702 * successfully processed the server's shared memory message. 703 * Assert that actually mapped the shared memory: 704 */ 705 assert(s->ivshmem_bar2); 706 } 707 708 /* Select the MSI-X vectors used by device. 709 * ivshmem maps events to vectors statically, so 710 * we just enable all vectors on init and after reset. */ 711 static void ivshmem_msix_vector_use(IVShmemState *s) 712 { 713 PCIDevice *d = PCI_DEVICE(s); 714 int i; 715 716 for (i = 0; i < s->vectors; i++) { 717 msix_vector_use(d, i); 718 } 719 } 720 721 static void ivshmem_disable_irqfd(IVShmemState *s); 722 723 static void ivshmem_reset(DeviceState *d) 724 { 725 IVShmemState *s = IVSHMEM_COMMON(d); 726 727 ivshmem_disable_irqfd(s); 728 729 s->intrstatus = 0; 730 s->intrmask = 0; 731 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 732 ivshmem_msix_vector_use(s); 733 } 734 } 735 736 static int ivshmem_setup_interrupts(IVShmemState *s, Error **errp) 737 { 738 /* allocate QEMU callback data for receiving interrupts */ 739 s->msi_vectors = g_new0(MSIVector, s->vectors); 740 741 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 742 if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1, errp)) { 743 return -1; 744 } 745 746 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors); 747 ivshmem_msix_vector_use(s); 748 } 749 750 return 0; 751 } 752 753 static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector) 754 { 755 IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector); 756 757 if (s->msi_vectors[vector].pdev == NULL) { 758 return; 759 } 760 761 /* it was cleaned when masked in the frontend. */ 762 kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq); 763 764 s->msi_vectors[vector].pdev = NULL; 765 } 766 767 static void ivshmem_enable_irqfd(IVShmemState *s) 768 { 769 PCIDevice *pdev = PCI_DEVICE(s); 770 int i; 771 772 for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) { 773 Error *err = NULL; 774 775 ivshmem_add_kvm_msi_virq(s, i, &err); 776 if (err) { 777 error_report_err(err); 778 goto undo; 779 } 780 } 781 782 if (msix_set_vector_notifiers(pdev, 783 ivshmem_vector_unmask, 784 ivshmem_vector_mask, 785 ivshmem_vector_poll)) { 786 error_report("ivshmem: msix_set_vector_notifiers failed"); 787 goto undo; 788 } 789 return; 790 791 undo: 792 while (--i >= 0) { 793 ivshmem_remove_kvm_msi_virq(s, i); 794 } 795 } 796 797 static void ivshmem_disable_irqfd(IVShmemState *s) 798 { 799 PCIDevice *pdev = PCI_DEVICE(s); 800 int i; 801 802 if (!pdev->msix_vector_use_notifier) { 803 return; 804 } 805 806 msix_unset_vector_notifiers(pdev); 807 808 for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) { 809 /* 810 * MSI-X is already disabled here so msix_unset_vector_notifiers() 811 * didn't call our release notifier. Do it now to keep our masks and 812 * unmasks balanced. 813 */ 814 if (s->msi_vectors[i].unmasked) { 815 ivshmem_vector_mask(pdev, i); 816 } 817 ivshmem_remove_kvm_msi_virq(s, i); 818 } 819 820 } 821 822 static void ivshmem_write_config(PCIDevice *pdev, uint32_t address, 823 uint32_t val, int len) 824 { 825 IVShmemState *s = IVSHMEM_COMMON(pdev); 826 int is_enabled, was_enabled = msix_enabled(pdev); 827 828 pci_default_write_config(pdev, address, val, len); 829 is_enabled = msix_enabled(pdev); 830 831 if (kvm_msi_via_irqfd_enabled()) { 832 if (!was_enabled && is_enabled) { 833 ivshmem_enable_irqfd(s); 834 } else if (was_enabled && !is_enabled) { 835 ivshmem_disable_irqfd(s); 836 } 837 } 838 } 839 840 static void ivshmem_common_realize(PCIDevice *dev, Error **errp) 841 { 842 ERRP_GUARD(); 843 IVShmemState *s = IVSHMEM_COMMON(dev); 844 Error *err = NULL; 845 uint8_t *pci_conf; 846 847 /* IRQFD requires MSI */ 848 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) && 849 !ivshmem_has_feature(s, IVSHMEM_MSI)) { 850 error_setg(errp, "ioeventfd/irqfd requires MSI"); 851 return; 852 } 853 854 pci_conf = dev->config; 855 pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY; 856 857 memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s, 858 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE); 859 860 /* region for registers*/ 861 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, 862 &s->ivshmem_mmio); 863 864 if (s->hostmem != NULL) { 865 IVSHMEM_DPRINTF("using hostmem\n"); 866 867 s->ivshmem_bar2 = host_memory_backend_get_memory(s->hostmem); 868 host_memory_backend_set_mapped(s->hostmem, true); 869 } else { 870 Chardev *chr = qemu_chr_fe_get_driver(&s->server_chr); 871 assert(chr); 872 873 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n", 874 chr->filename); 875 876 /* we allocate enough space for 16 peers and grow as needed */ 877 resize_peers(s, 16); 878 879 /* 880 * Receive setup messages from server synchronously. 881 * Older versions did it asynchronously, but that creates a 882 * number of entertaining race conditions. 883 */ 884 ivshmem_recv_setup(s, &err); 885 if (err) { 886 error_propagate(errp, err); 887 return; 888 } 889 890 if (s->master == ON_OFF_AUTO_ON && s->vm_id != 0) { 891 error_setg(errp, 892 "master must connect to the server before any peers"); 893 return; 894 } 895 896 qemu_chr_fe_set_handlers(&s->server_chr, ivshmem_can_receive, 897 ivshmem_read, NULL, NULL, s, NULL, true); 898 899 if (ivshmem_setup_interrupts(s, errp) < 0) { 900 error_prepend(errp, "Failed to initialize interrupts: "); 901 return; 902 } 903 } 904 905 if (s->master == ON_OFF_AUTO_AUTO) { 906 s->master = s->vm_id == 0 ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 907 } 908 909 if (!ivshmem_is_master(s)) { 910 error_setg(&s->migration_blocker, 911 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'"); 912 if (migrate_add_blocker(&s->migration_blocker, errp) < 0) { 913 return; 914 } 915 } 916 917 vmstate_register_ram(s->ivshmem_bar2, DEVICE(s)); 918 pci_register_bar(PCI_DEVICE(s), 2, 919 PCI_BASE_ADDRESS_SPACE_MEMORY | 920 PCI_BASE_ADDRESS_MEM_PREFETCH | 921 PCI_BASE_ADDRESS_MEM_TYPE_64, 922 s->ivshmem_bar2); 923 } 924 925 static void ivshmem_exit(PCIDevice *dev) 926 { 927 IVShmemState *s = IVSHMEM_COMMON(dev); 928 int i; 929 930 migrate_del_blocker(&s->migration_blocker); 931 932 if (memory_region_is_mapped(s->ivshmem_bar2)) { 933 if (!s->hostmem) { 934 void *addr = memory_region_get_ram_ptr(s->ivshmem_bar2); 935 int fd; 936 937 if (munmap(addr, memory_region_size(s->ivshmem_bar2) == -1)) { 938 error_report("Failed to munmap shared memory %s", 939 strerror(errno)); 940 } 941 942 fd = memory_region_get_fd(s->ivshmem_bar2); 943 close(fd); 944 } 945 946 vmstate_unregister_ram(s->ivshmem_bar2, DEVICE(dev)); 947 } 948 949 if (s->hostmem) { 950 host_memory_backend_set_mapped(s->hostmem, false); 951 } 952 953 if (s->peers) { 954 for (i = 0; i < s->nb_peers; i++) { 955 close_peer_eventfds(s, i); 956 } 957 g_free(s->peers); 958 } 959 960 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 961 msix_uninit_exclusive_bar(dev); 962 } 963 964 g_free(s->msi_vectors); 965 } 966 967 static int ivshmem_pre_load(void *opaque) 968 { 969 IVShmemState *s = opaque; 970 971 if (!ivshmem_is_master(s)) { 972 error_report("'peer' devices are not migratable"); 973 return -EINVAL; 974 } 975 976 return 0; 977 } 978 979 static int ivshmem_post_load(void *opaque, int version_id) 980 { 981 IVShmemState *s = opaque; 982 983 if (ivshmem_has_feature(s, IVSHMEM_MSI)) { 984 ivshmem_msix_vector_use(s); 985 } 986 return 0; 987 } 988 989 static void ivshmem_common_class_init(ObjectClass *klass, const void *data) 990 { 991 DeviceClass *dc = DEVICE_CLASS(klass); 992 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 993 994 k->realize = ivshmem_common_realize; 995 k->exit = ivshmem_exit; 996 k->config_write = ivshmem_write_config; 997 k->vendor_id = PCI_VENDOR_ID_IVSHMEM; 998 k->device_id = PCI_DEVICE_ID_IVSHMEM; 999 k->class_id = PCI_CLASS_MEMORY_RAM; 1000 k->revision = 1; 1001 device_class_set_legacy_reset(dc, ivshmem_reset); 1002 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1003 dc->desc = "Inter-VM shared memory"; 1004 } 1005 1006 static const TypeInfo ivshmem_common_info = { 1007 .name = TYPE_IVSHMEM_COMMON, 1008 .parent = TYPE_PCI_DEVICE, 1009 .instance_size = sizeof(IVShmemState), 1010 .abstract = true, 1011 .class_init = ivshmem_common_class_init, 1012 .interfaces = (const InterfaceInfo[]) { 1013 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1014 { }, 1015 }, 1016 }; 1017 1018 static const VMStateDescription ivshmem_plain_vmsd = { 1019 .name = TYPE_IVSHMEM_PLAIN, 1020 .version_id = 0, 1021 .minimum_version_id = 0, 1022 .pre_load = ivshmem_pre_load, 1023 .post_load = ivshmem_post_load, 1024 .fields = (const VMStateField[]) { 1025 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState), 1026 VMSTATE_UINT32(intrstatus, IVShmemState), 1027 VMSTATE_UINT32(intrmask, IVShmemState), 1028 VMSTATE_END_OF_LIST() 1029 }, 1030 }; 1031 1032 static const Property ivshmem_plain_properties[] = { 1033 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), 1034 DEFINE_PROP_LINK("memdev", IVShmemState, hostmem, TYPE_MEMORY_BACKEND, 1035 HostMemoryBackend *), 1036 }; 1037 1038 static void ivshmem_plain_realize(PCIDevice *dev, Error **errp) 1039 { 1040 IVShmemState *s = IVSHMEM_COMMON(dev); 1041 1042 if (!s->hostmem) { 1043 error_setg(errp, "You must specify a 'memdev'"); 1044 return; 1045 } else if (host_memory_backend_is_mapped(s->hostmem)) { 1046 error_setg(errp, "can't use already busy memdev: %s", 1047 object_get_canonical_path_component(OBJECT(s->hostmem))); 1048 return; 1049 } 1050 1051 ivshmem_common_realize(dev, errp); 1052 } 1053 1054 static void ivshmem_plain_class_init(ObjectClass *klass, const void *data) 1055 { 1056 DeviceClass *dc = DEVICE_CLASS(klass); 1057 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1058 1059 k->realize = ivshmem_plain_realize; 1060 device_class_set_props(dc, ivshmem_plain_properties); 1061 dc->vmsd = &ivshmem_plain_vmsd; 1062 } 1063 1064 static const TypeInfo ivshmem_plain_info = { 1065 .name = TYPE_IVSHMEM_PLAIN, 1066 .parent = TYPE_IVSHMEM_COMMON, 1067 .instance_size = sizeof(IVShmemState), 1068 .class_init = ivshmem_plain_class_init, 1069 }; 1070 1071 static const VMStateDescription ivshmem_doorbell_vmsd = { 1072 .name = TYPE_IVSHMEM_DOORBELL, 1073 .version_id = 0, 1074 .minimum_version_id = 0, 1075 .pre_load = ivshmem_pre_load, 1076 .post_load = ivshmem_post_load, 1077 .fields = (const VMStateField[]) { 1078 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState), 1079 VMSTATE_MSIX(parent_obj, IVShmemState), 1080 VMSTATE_UINT32(intrstatus, IVShmemState), 1081 VMSTATE_UINT32(intrmask, IVShmemState), 1082 VMSTATE_END_OF_LIST() 1083 }, 1084 }; 1085 1086 static const Property ivshmem_doorbell_properties[] = { 1087 DEFINE_PROP_CHR("chardev", IVShmemState, server_chr), 1088 DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1), 1089 DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, 1090 true), 1091 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), 1092 }; 1093 1094 static void ivshmem_doorbell_init(Object *obj) 1095 { 1096 IVShmemState *s = IVSHMEM_DOORBELL(obj); 1097 1098 s->features |= (1 << IVSHMEM_MSI); 1099 } 1100 1101 static void ivshmem_doorbell_realize(PCIDevice *dev, Error **errp) 1102 { 1103 IVShmemState *s = IVSHMEM_COMMON(dev); 1104 1105 if (!qemu_chr_fe_backend_connected(&s->server_chr)) { 1106 error_setg(errp, "You must specify a 'chardev'"); 1107 return; 1108 } 1109 1110 ivshmem_common_realize(dev, errp); 1111 } 1112 1113 static void ivshmem_doorbell_class_init(ObjectClass *klass, const void *data) 1114 { 1115 DeviceClass *dc = DEVICE_CLASS(klass); 1116 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1117 1118 k->realize = ivshmem_doorbell_realize; 1119 device_class_set_props(dc, ivshmem_doorbell_properties); 1120 dc->vmsd = &ivshmem_doorbell_vmsd; 1121 } 1122 1123 static const TypeInfo ivshmem_doorbell_info = { 1124 .name = TYPE_IVSHMEM_DOORBELL, 1125 .parent = TYPE_IVSHMEM_COMMON, 1126 .instance_size = sizeof(IVShmemState), 1127 .instance_init = ivshmem_doorbell_init, 1128 .class_init = ivshmem_doorbell_class_init, 1129 }; 1130 1131 static void ivshmem_register_types(void) 1132 { 1133 type_register_static(&ivshmem_common_info); 1134 type_register_static(&ivshmem_plain_info); 1135 type_register_static(&ivshmem_doorbell_info); 1136 } 1137 1138 type_init(ivshmem_register_types) 1139