1 /* 2 * LED, Switch and Debug control registers for ARM Integrator Boards 3 * 4 * This is currently a stub for this functionality but at least 5 * ensures something other than unassigned_mem_read() handles access 6 * to this area. 7 * 8 * The real h/w is described at: 9 * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0159b/Babbfijf.html 10 * 11 * Copyright (c) 2013 Alex Bennée <alex@bennee.com> 12 * 13 * This work is licensed under the terms of the GNU GPL, version 2 or later. 14 * See the COPYING file in the top-level directory. 15 */ 16 17 #include "qemu/osdep.h" 18 #include "hw/hw.h" 19 #include "hw/sysbus.h" 20 #include "exec/address-spaces.h" 21 #include "hw/misc/arm_integrator_debug.h" 22 #include "qemu/log.h" 23 24 #define INTEGRATOR_DEBUG(obj) \ 25 OBJECT_CHECK(IntegratorDebugState, (obj), TYPE_INTEGRATOR_DEBUG) 26 27 typedef struct { 28 SysBusDevice parent_obj; 29 30 MemoryRegion iomem; 31 } IntegratorDebugState; 32 33 static uint64_t intdbg_control_read(void *opaque, hwaddr offset, 34 unsigned size) 35 { 36 switch (offset >> 2) { 37 case 0: /* ALPHA */ 38 case 1: /* LEDS */ 39 case 2: /* SWITCHES */ 40 qemu_log_mask(LOG_UNIMP, 41 "%s: returning zero from %" HWADDR_PRIx ":%u\n", 42 __func__, offset, size); 43 return 0; 44 default: 45 qemu_log_mask(LOG_GUEST_ERROR, 46 "%s: Bad offset %" HWADDR_PRIx, 47 __func__, offset); 48 return 0; 49 } 50 } 51 52 static void intdbg_control_write(void *opaque, hwaddr offset, 53 uint64_t value, unsigned size) 54 { 55 switch (offset >> 2) { 56 case 1: /* ALPHA */ 57 case 2: /* LEDS */ 58 case 3: /* SWITCHES */ 59 /* Nothing interesting implemented yet. */ 60 qemu_log_mask(LOG_UNIMP, 61 "%s: ignoring write of %" PRIu64 62 " to %" HWADDR_PRIx ":%u\n", 63 __func__, value, offset, size); 64 break; 65 default: 66 qemu_log_mask(LOG_GUEST_ERROR, 67 "%s: write of %" PRIu64 68 " to bad offset %" HWADDR_PRIx "\n", 69 __func__, value, offset); 70 } 71 } 72 73 static const MemoryRegionOps intdbg_control_ops = { 74 .read = intdbg_control_read, 75 .write = intdbg_control_write, 76 .endianness = DEVICE_NATIVE_ENDIAN, 77 }; 78 79 static void intdbg_control_init(Object *obj) 80 { 81 SysBusDevice *sd = SYS_BUS_DEVICE(obj); 82 IntegratorDebugState *s = INTEGRATOR_DEBUG(obj); 83 84 memory_region_init_io(&s->iomem, obj, &intdbg_control_ops, 85 NULL, "dbg-leds", 0x1000000); 86 sysbus_init_mmio(sd, &s->iomem); 87 } 88 89 static const TypeInfo intdbg_info = { 90 .name = TYPE_INTEGRATOR_DEBUG, 91 .parent = TYPE_SYS_BUS_DEVICE, 92 .instance_size = sizeof(IntegratorDebugState), 93 .instance_init = intdbg_control_init, 94 }; 95 96 static void intdbg_register_types(void) 97 { 98 type_register_static(&intdbg_info); 99 } 100 101 type_init(intdbg_register_types) 102