1 /* 2 * QEMU/mipssim emulation 3 * 4 * Emulates a very simple machine model similar to the one used by the 5 * proprietary MIPS emulator. 6 * 7 * Copyright (c) 2007 Thiemo Seufer 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "qapi/error.h" 30 #include "qemu-common.h" 31 #include "qemu/datadir.h" 32 #include "hw/clock.h" 33 #include "hw/mips/mips.h" 34 #include "hw/mips/cpudevs.h" 35 #include "hw/char/serial.h" 36 #include "hw/isa/isa.h" 37 #include "net/net.h" 38 #include "sysemu/sysemu.h" 39 #include "hw/boards.h" 40 #include "hw/mips/bios.h" 41 #include "hw/loader.h" 42 #include "elf.h" 43 #include "hw/sysbus.h" 44 #include "hw/qdev-properties.h" 45 #include "qemu/error-report.h" 46 #include "sysemu/qtest.h" 47 #include "sysemu/reset.h" 48 49 static struct _loaderparams { 50 int ram_size; 51 const char *kernel_filename; 52 const char *kernel_cmdline; 53 const char *initrd_filename; 54 } loaderparams; 55 56 typedef struct ResetData { 57 MIPSCPU *cpu; 58 uint64_t vector; 59 } ResetData; 60 61 static uint64_t load_kernel(void) 62 { 63 uint64_t entry, kernel_high, initrd_size; 64 long kernel_size; 65 ram_addr_t initrd_offset; 66 int big_endian; 67 68 #ifdef TARGET_WORDS_BIGENDIAN 69 big_endian = 1; 70 #else 71 big_endian = 0; 72 #endif 73 74 kernel_size = load_elf(loaderparams.kernel_filename, NULL, 75 cpu_mips_kseg0_to_phys, NULL, 76 &entry, NULL, 77 &kernel_high, NULL, big_endian, 78 EM_MIPS, 1, 0); 79 if (kernel_size < 0) { 80 error_report("could not load kernel '%s': %s", 81 loaderparams.kernel_filename, 82 load_elf_strerror(kernel_size)); 83 exit(1); 84 } 85 86 /* load initrd */ 87 initrd_size = 0; 88 initrd_offset = 0; 89 if (loaderparams.initrd_filename) { 90 initrd_size = get_image_size(loaderparams.initrd_filename); 91 if (initrd_size > 0) { 92 initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE); 93 if (initrd_offset + initrd_size > loaderparams.ram_size) { 94 error_report("memory too small for initial ram disk '%s'", 95 loaderparams.initrd_filename); 96 exit(1); 97 } 98 initrd_size = load_image_targphys(loaderparams.initrd_filename, 99 initrd_offset, loaderparams.ram_size - initrd_offset); 100 } 101 if (initrd_size == (target_ulong) -1) { 102 error_report("could not load initial ram disk '%s'", 103 loaderparams.initrd_filename); 104 exit(1); 105 } 106 } 107 return entry; 108 } 109 110 static void main_cpu_reset(void *opaque) 111 { 112 ResetData *s = (ResetData *)opaque; 113 CPUMIPSState *env = &s->cpu->env; 114 115 cpu_reset(CPU(s->cpu)); 116 env->active_tc.PC = s->vector & ~(target_ulong)1; 117 if (s->vector & 1) { 118 env->hflags |= MIPS_HFLAG_M16; 119 } 120 } 121 122 static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd) 123 { 124 DeviceState *dev; 125 SysBusDevice *s; 126 127 dev = qdev_new("mipsnet"); 128 qdev_set_nic_properties(dev, nd); 129 130 s = SYS_BUS_DEVICE(dev); 131 sysbus_realize_and_unref(s, &error_fatal); 132 sysbus_connect_irq(s, 0, irq); 133 memory_region_add_subregion(get_system_io(), 134 base, 135 sysbus_mmio_get_region(s, 0)); 136 } 137 138 static void 139 mips_mipssim_init(MachineState *machine) 140 { 141 const char *kernel_filename = machine->kernel_filename; 142 const char *kernel_cmdline = machine->kernel_cmdline; 143 const char *initrd_filename = machine->initrd_filename; 144 char *filename; 145 MemoryRegion *address_space_mem = get_system_memory(); 146 MemoryRegion *isa = g_new(MemoryRegion, 1); 147 MemoryRegion *bios = g_new(MemoryRegion, 1); 148 Clock *cpuclk; 149 MIPSCPU *cpu; 150 CPUMIPSState *env; 151 ResetData *reset_info; 152 int bios_size; 153 154 cpuclk = clock_new(OBJECT(machine), "cpu-refclk"); 155 #ifdef TARGET_MIPS64 156 clock_set_hz(cpuclk, 6000000); /* 6 MHz */ 157 #else 158 clock_set_hz(cpuclk, 12000000); /* 12 MHz */ 159 #endif 160 161 /* Init CPUs. */ 162 cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk); 163 env = &cpu->env; 164 165 reset_info = g_malloc0(sizeof(ResetData)); 166 reset_info->cpu = cpu; 167 reset_info->vector = env->active_tc.PC; 168 qemu_register_reset(main_cpu_reset, reset_info); 169 170 /* Allocate RAM. */ 171 memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, 172 &error_fatal); 173 174 memory_region_add_subregion(address_space_mem, 0, machine->ram); 175 176 /* Map the BIOS / boot exception handler. */ 177 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); 178 /* Load a BIOS / boot exception handler image. */ 179 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware ?: BIOS_FILENAME); 180 if (filename) { 181 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); 182 g_free(filename); 183 } else { 184 bios_size = -1; 185 } 186 if ((bios_size < 0 || bios_size > BIOS_SIZE) && 187 machine->firmware && !qtest_enabled()) { 188 /* Bail out if we have neither a kernel image nor boot vector code. */ 189 error_report("Could not load MIPS bios '%s'", machine->firmware); 190 exit(1); 191 } else { 192 /* We have a boot vector start address. */ 193 env->active_tc.PC = (target_long)(int32_t)0xbfc00000; 194 } 195 196 if (kernel_filename) { 197 loaderparams.ram_size = machine->ram_size; 198 loaderparams.kernel_filename = kernel_filename; 199 loaderparams.kernel_cmdline = kernel_cmdline; 200 loaderparams.initrd_filename = initrd_filename; 201 reset_info->vector = load_kernel(); 202 } 203 204 /* Init CPU internal devices. */ 205 cpu_mips_irq_init_cpu(cpu); 206 cpu_mips_clock_init(cpu); 207 208 /* Register 64 KB of ISA IO space at 0x1fd00000. */ 209 memory_region_init_alias(isa, NULL, "isa_mmio", 210 get_system_io(), 0, 0x00010000); 211 memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa); 212 213 /* 214 * A single 16450 sits at offset 0x3f8. It is attached to 215 * MIPS CPU INT2, which is interrupt 4. 216 */ 217 if (serial_hd(0)) { 218 DeviceState *dev = qdev_new(TYPE_SERIAL_MM); 219 220 qdev_prop_set_chr(dev, "chardev", serial_hd(0)); 221 qdev_prop_set_uint8(dev, "regshift", 0); 222 qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN); 223 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 224 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); 225 sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, 226 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 227 } 228 229 if (nd_table[0].used) 230 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ 231 mipsnet_init(0x4200, env->irq[2], &nd_table[0]); 232 } 233 234 static void mips_mipssim_machine_init(MachineClass *mc) 235 { 236 mc->desc = "MIPS MIPSsim platform"; 237 mc->init = mips_mipssim_init; 238 #ifdef TARGET_MIPS64 239 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf"); 240 #else 241 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf"); 242 #endif 243 mc->default_ram_id = "mips_mipssim.ram"; 244 } 245 246 DEFINE_MACHINE("mipssim", mips_mipssim_machine_init) 247