1 /* 2 * Xilinx Zynq MPSoC PMU (Power Management Unit) emulation 3 * 4 * Copyright (C) 2017 Xilinx Inc 5 * Written by Alistair Francis <alistair.francis@xilinx.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qapi/error.h" 20 #include "qemu-common.h" 21 #include "exec/address-spaces.h" 22 #include "hw/boards.h" 23 #include "hw/qdev-properties.h" 24 #include "cpu.h" 25 #include "boot.h" 26 27 #include "hw/intc/xlnx-zynqmp-ipi.h" 28 #include "hw/intc/xlnx-pmu-iomod-intc.h" 29 30 /* Define the PMU device */ 31 32 #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc" 33 #define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj), \ 34 TYPE_XLNX_ZYNQMP_PMU_SOC) 35 36 #define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000 37 #define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000 38 #define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000 39 40 #define XLNX_ZYNQMP_PMU_INTC_ADDR 0xFFD40000 41 42 #define XLNX_ZYNQMP_PMU_NUM_IPIS 4 43 44 static const uint64_t ipi_addr[XLNX_ZYNQMP_PMU_NUM_IPIS] = { 45 0xFF340000, 0xFF350000, 0xFF360000, 0xFF370000, 46 }; 47 static const uint64_t ipi_irq[XLNX_ZYNQMP_PMU_NUM_IPIS] = { 48 19, 20, 21, 22, 49 }; 50 51 typedef struct XlnxZynqMPPMUSoCState { 52 /*< private >*/ 53 DeviceState parent_obj; 54 55 /*< public >*/ 56 MicroBlazeCPU cpu; 57 XlnxPMUIOIntc intc; 58 XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; 59 } XlnxZynqMPPMUSoCState; 60 61 62 static void xlnx_zynqmp_pmu_soc_init(Object *obj) 63 { 64 XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj); 65 66 object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu), 67 TYPE_MICROBLAZE_CPU, &error_abort, NULL); 68 69 sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), 70 TYPE_XLNX_PMU_IO_INTC); 71 72 /* Create the IPI device */ 73 for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { 74 char *name = g_strdup_printf("ipi%d", i); 75 sysbus_init_child_obj(obj, name, &s->ipi[i], 76 sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI); 77 g_free(name); 78 } 79 } 80 81 static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) 82 { 83 XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev); 84 Error *err = NULL; 85 86 object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR, 87 "base-vectors", &error_abort); 88 object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection", 89 &error_abort); 90 object_property_set_uint(OBJECT(&s->cpu), 0, "use-fpu", &error_abort); 91 object_property_set_uint(OBJECT(&s->cpu), 0, "use-hw-mul", &error_abort); 92 object_property_set_bool(OBJECT(&s->cpu), true, "use-barrel", 93 &error_abort); 94 object_property_set_bool(OBJECT(&s->cpu), true, "use-msr-instr", 95 &error_abort); 96 object_property_set_bool(OBJECT(&s->cpu), true, "use-pcmp-instr", 97 &error_abort); 98 object_property_set_bool(OBJECT(&s->cpu), false, "use-mmu", &error_abort); 99 object_property_set_bool(OBJECT(&s->cpu), true, "endianness", 100 &error_abort); 101 object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version", 102 &error_abort); 103 object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort); 104 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 105 if (err) { 106 error_propagate(errp, err); 107 return; 108 } 109 110 object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size", 111 &error_abort); 112 object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge", 113 &error_abort); 114 object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive", 115 &error_abort); 116 object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); 117 if (err) { 118 error_propagate(errp, err); 119 return; 120 } 121 sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR); 122 sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0, 123 qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ)); 124 125 /* Connect the IPI device */ 126 for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { 127 object_property_set_bool(OBJECT(&s->ipi[i]), true, "realized", 128 &error_abort); 129 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi[i]), 0, ipi_addr[i]); 130 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi[i]), 0, 131 qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i])); 132 } 133 } 134 135 static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data) 136 { 137 DeviceClass *dc = DEVICE_CLASS(oc); 138 139 dc->realize = xlnx_zynqmp_pmu_soc_realize; 140 } 141 142 static const TypeInfo xlnx_zynqmp_pmu_soc_type_info = { 143 .name = TYPE_XLNX_ZYNQMP_PMU_SOC, 144 .parent = TYPE_DEVICE, 145 .instance_size = sizeof(XlnxZynqMPPMUSoCState), 146 .instance_init = xlnx_zynqmp_pmu_soc_init, 147 .class_init = xlnx_zynqmp_pmu_soc_class_init, 148 }; 149 150 static void xlnx_zynqmp_pmu_soc_register_types(void) 151 { 152 type_register_static(&xlnx_zynqmp_pmu_soc_type_info); 153 } 154 155 type_init(xlnx_zynqmp_pmu_soc_register_types) 156 157 /* Define the PMU Machine */ 158 159 static void xlnx_zynqmp_pmu_init(MachineState *machine) 160 { 161 XlnxZynqMPPMUSoCState *pmu = g_new0(XlnxZynqMPPMUSoCState, 1); 162 MemoryRegion *address_space_mem = get_system_memory(); 163 MemoryRegion *pmu_rom = g_new(MemoryRegion, 1); 164 MemoryRegion *pmu_ram = g_new(MemoryRegion, 1); 165 166 /* Create the ROM */ 167 memory_region_init_rom(pmu_rom, NULL, "xlnx-zynqmp-pmu.rom", 168 XLNX_ZYNQMP_PMU_ROM_SIZE, &error_fatal); 169 memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_ROM_ADDR, 170 pmu_rom); 171 172 /* Create the RAM */ 173 memory_region_init_ram(pmu_ram, NULL, "xlnx-zynqmp-pmu.ram", 174 machine->ram_size, &error_fatal); 175 memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_RAM_ADDR, 176 pmu_ram); 177 178 /* Create the PMU device */ 179 object_initialize_child(OBJECT(machine), "pmu", pmu, 180 sizeof(XlnxZynqMPPMUSoCState), 181 TYPE_XLNX_ZYNQMP_PMU_SOC, &error_abort, NULL); 182 object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); 183 184 /* Load the kernel */ 185 microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR, 186 machine->ram_size, 187 machine->initrd_filename, 188 machine->dtb, 189 NULL); 190 } 191 192 static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc) 193 { 194 mc->desc = "Xilinx ZynqMP PMU machine"; 195 mc->init = xlnx_zynqmp_pmu_init; 196 } 197 198 DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init) 199 200