1 /* 2 * Xilinx Zynq MPSoC PMU (Power Management Unit) emulation 3 * 4 * Copyright (C) 2017 Xilinx Inc 5 * Written by Alistair Francis <alistair.francis@xilinx.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 * for more details. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qapi/error.h" 20 #include "exec/address-spaces.h" 21 #include "hw/boards.h" 22 #include "cpu.h" 23 #include "boot.h" 24 25 #include "hw/intc/xlnx-zynqmp-ipi.h" 26 #include "hw/intc/xlnx-pmu-iomod-intc.h" 27 28 /* Define the PMU device */ 29 30 #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc" 31 #define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj), \ 32 TYPE_XLNX_ZYNQMP_PMU_SOC) 33 34 #define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000 35 #define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000 36 #define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000 37 38 #define XLNX_ZYNQMP_PMU_INTC_ADDR 0xFFD40000 39 40 #define XLNX_ZYNQMP_PMU_NUM_IPIS 4 41 42 static const uint64_t ipi_addr[XLNX_ZYNQMP_PMU_NUM_IPIS] = { 43 0xFF340000, 0xFF350000, 0xFF360000, 0xFF370000, 44 }; 45 static const uint64_t ipi_irq[XLNX_ZYNQMP_PMU_NUM_IPIS] = { 46 19, 20, 21, 22, 47 }; 48 49 typedef struct XlnxZynqMPPMUSoCState { 50 /*< private >*/ 51 DeviceState parent_obj; 52 53 /*< public >*/ 54 MicroBlazeCPU cpu; 55 XlnxPMUIOIntc intc; 56 XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; 57 } XlnxZynqMPPMUSoCState; 58 59 60 static void xlnx_zynqmp_pmu_soc_init(Object *obj) 61 { 62 XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj); 63 64 object_initialize_child(obj, "pmu-cpu", &s->cpu, TYPE_MICROBLAZE_CPU); 65 66 sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), 67 TYPE_XLNX_PMU_IO_INTC); 68 69 /* Create the IPI device */ 70 for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { 71 char *name = g_strdup_printf("ipi%d", i); 72 sysbus_init_child_obj(obj, name, &s->ipi[i], sizeof(s->ipi[i]), 73 TYPE_XLNX_ZYNQMP_IPI); 74 g_free(name); 75 } 76 } 77 78 static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) 79 { 80 XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev); 81 Error *err = NULL; 82 83 object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR, 84 "base-vectors", &error_abort); 85 object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection", 86 &error_abort); 87 object_property_set_uint(OBJECT(&s->cpu), 0, "use-fpu", &error_abort); 88 object_property_set_uint(OBJECT(&s->cpu), 0, "use-hw-mul", &error_abort); 89 object_property_set_bool(OBJECT(&s->cpu), true, "use-barrel", 90 &error_abort); 91 object_property_set_bool(OBJECT(&s->cpu), true, "use-msr-instr", 92 &error_abort); 93 object_property_set_bool(OBJECT(&s->cpu), true, "use-pcmp-instr", 94 &error_abort); 95 object_property_set_bool(OBJECT(&s->cpu), false, "use-mmu", &error_abort); 96 object_property_set_bool(OBJECT(&s->cpu), true, "endianness", 97 &error_abort); 98 object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version", 99 &error_abort); 100 object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort); 101 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); 102 if (err) { 103 error_propagate(errp, err); 104 return; 105 } 106 107 object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size", 108 &error_abort); 109 object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge", 110 &error_abort); 111 object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive", 112 &error_abort); 113 object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); 114 if (err) { 115 error_propagate(errp, err); 116 return; 117 } 118 sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR); 119 sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0, 120 qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ)); 121 122 /* Connect the IPI device */ 123 for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { 124 object_property_set_bool(OBJECT(&s->ipi[i]), true, "realized", 125 &error_abort); 126 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi[i]), 0, ipi_addr[i]); 127 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi[i]), 0, 128 qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i])); 129 } 130 } 131 132 static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data) 133 { 134 DeviceClass *dc = DEVICE_CLASS(oc); 135 136 dc->realize = xlnx_zynqmp_pmu_soc_realize; 137 } 138 139 static const TypeInfo xlnx_zynqmp_pmu_soc_type_info = { 140 .name = TYPE_XLNX_ZYNQMP_PMU_SOC, 141 .parent = TYPE_DEVICE, 142 .instance_size = sizeof(XlnxZynqMPPMUSoCState), 143 .instance_init = xlnx_zynqmp_pmu_soc_init, 144 .class_init = xlnx_zynqmp_pmu_soc_class_init, 145 }; 146 147 static void xlnx_zynqmp_pmu_soc_register_types(void) 148 { 149 type_register_static(&xlnx_zynqmp_pmu_soc_type_info); 150 } 151 152 type_init(xlnx_zynqmp_pmu_soc_register_types) 153 154 /* Define the PMU Machine */ 155 156 static void xlnx_zynqmp_pmu_init(MachineState *machine) 157 { 158 XlnxZynqMPPMUSoCState *pmu = g_new0(XlnxZynqMPPMUSoCState, 1); 159 MemoryRegion *address_space_mem = get_system_memory(); 160 MemoryRegion *pmu_rom = g_new(MemoryRegion, 1); 161 MemoryRegion *pmu_ram = g_new(MemoryRegion, 1); 162 163 /* Create the ROM */ 164 memory_region_init_rom(pmu_rom, NULL, "xlnx-zynqmp-pmu.rom", 165 XLNX_ZYNQMP_PMU_ROM_SIZE, &error_fatal); 166 memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_ROM_ADDR, 167 pmu_rom); 168 169 /* Create the RAM */ 170 memory_region_init_ram(pmu_ram, NULL, "xlnx-zynqmp-pmu.ram", 171 machine->ram_size, &error_fatal); 172 memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_RAM_ADDR, 173 pmu_ram); 174 175 /* Create the PMU device */ 176 object_initialize_child(OBJECT(machine), "pmu", pmu, 177 TYPE_XLNX_ZYNQMP_PMU_SOC); 178 object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); 179 180 /* Load the kernel */ 181 microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR, 182 machine->ram_size, 183 machine->initrd_filename, 184 machine->dtb, 185 NULL); 186 } 187 188 static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc) 189 { 190 mc->desc = "Xilinx ZynqMP PMU machine"; 191 mc->init = xlnx_zynqmp_pmu_init; 192 } 193 194 DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init) 195 196