1 /* 2 * Nuvoton NPCM7xx Memory Controller stub 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * for more details. 15 */ 16 17 #include "qemu/osdep.h" 18 19 #include "hw/mem/npcm7xx_mc.h" 20 #include "qapi/error.h" 21 #include "qemu/log.h" 22 #include "qemu/module.h" 23 #include "qemu/units.h" 24 25 #define NPCM7XX_MC_REGS_SIZE (4 * KiB) 26 27 static uint64_t npcm7xx_mc_read(void *opaque, hwaddr addr, unsigned int size) 28 { 29 /* 30 * If bits 8..11 @ offset 0 are not zero, the boot block thinks the memory 31 * controller has already been initialized and will skip DDR training. 32 */ 33 if (addr == 0) { 34 return 0x100; 35 } 36 37 qemu_log_mask(LOG_UNIMP, "%s: mostly unimplemented\n", __func__); 38 39 return 0; 40 } 41 42 static void npcm7xx_mc_write(void *opaque, hwaddr addr, uint64_t v, 43 unsigned int size) 44 { 45 qemu_log_mask(LOG_UNIMP, "%s: mostly unimplemented\n", __func__); 46 } 47 48 static const MemoryRegionOps npcm7xx_mc_ops = { 49 .read = npcm7xx_mc_read, 50 .write = npcm7xx_mc_write, 51 .endianness = DEVICE_LITTLE_ENDIAN, 52 .valid = { 53 .min_access_size = 4, 54 .max_access_size = 4, 55 .unaligned = false, 56 }, 57 }; 58 59 static void npcm7xx_mc_realize(DeviceState *dev, Error **errp) 60 { 61 NPCM7xxMCState *s = NPCM7XX_MC(dev); 62 63 memory_region_init_io(&s->mmio, OBJECT(s), &npcm7xx_mc_ops, s, "regs", 64 NPCM7XX_MC_REGS_SIZE); 65 sysbus_init_mmio(&s->parent, &s->mmio); 66 } 67 68 static void npcm7xx_mc_class_init(ObjectClass *klass, void *data) 69 { 70 DeviceClass *dc = DEVICE_CLASS(klass); 71 72 dc->desc = "NPCM7xx Memory Controller stub"; 73 dc->realize = npcm7xx_mc_realize; 74 } 75 76 static const TypeInfo npcm7xx_mc_types[] = { 77 { 78 .name = TYPE_NPCM7XX_MC, 79 .parent = TYPE_SYS_BUS_DEVICE, 80 .instance_size = sizeof(NPCM7xxMCState), 81 .class_init = npcm7xx_mc_class_init, 82 }, 83 }; 84 DEFINE_TYPES(npcm7xx_mc_types); 85