1 /* 2 * SPDX-License-Identifer: GPL-2.0-or-later 3 * 4 * QEMU Vitual M68K Machine 5 * 6 * (c) 2020 Laurent Vivier <laurent@vivier.eu> 7 * 8 */ 9 10 #include "qemu/osdep.h" 11 #include "qemu/units.h" 12 #include "qemu-common.h" 13 #include "sysemu/sysemu.h" 14 #include "cpu.h" 15 #include "hw/hw.h" 16 #include "hw/boards.h" 17 #include "hw/irq.h" 18 #include "hw/qdev-properties.h" 19 #include "elf.h" 20 #include "hw/loader.h" 21 #include "ui/console.h" 22 #include "exec/address-spaces.h" 23 #include "hw/sysbus.h" 24 #include "standard-headers/asm-m68k/bootinfo.h" 25 #include "standard-headers/asm-m68k/bootinfo-virt.h" 26 #include "bootinfo.h" 27 #include "net/net.h" 28 #include "qapi/error.h" 29 #include "sysemu/qtest.h" 30 #include "sysemu/runstate.h" 31 #include "sysemu/reset.h" 32 33 #include "hw/intc/m68k_irqc.h" 34 #include "hw/misc/virt_ctrl.h" 35 #include "hw/char/goldfish_tty.h" 36 #include "hw/rtc/goldfish_rtc.h" 37 #include "hw/intc/goldfish_pic.h" 38 #include "hw/virtio/virtio-mmio.h" 39 #include "hw/virtio/virtio-blk.h" 40 41 /* 42 * 6 goldfish-pic for CPU IRQ #1 to IRQ #6 43 * CPU IRQ #1 -> PIC #1 44 * IRQ #1 to IRQ #31 -> unused 45 * IRQ #32 -> goldfish-tty 46 * CPU IRQ #2 -> PIC #2 47 * IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32 48 * CPU IRQ #3 -> PIC #3 49 * IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64 50 * CPU IRQ #4 -> PIC #4 51 * IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96 52 * CPU IRQ #5 -> PIC #5 53 * IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128 54 * CPU IRQ #6 -> PIC #6 55 * IRQ #1 -> goldfish-rtc 56 * IRQ #2 to IRQ #32 -> unused 57 * CPU IRQ #7 -> NMI 58 */ 59 60 #define PIC_IRQ_BASE(num) (8 + (num - 1) * 32) 61 #define PIC_IRQ(num, irq) (PIC_IRQ_BASE(num) + irq - 1) 62 #define PIC_GPIO(pic_irq) (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \ 63 (pic_irq - 8) % 32)) 64 65 #define VIRT_GF_PIC_MMIO_BASE 0xff000000 /* MMIO: 0xff000000 - 0xff005fff */ 66 #define VIRT_GF_PIC_IRQ_BASE 1 /* IRQ: #1 -> #6 */ 67 #define VIRT_GF_PIC_NB 6 68 69 /* 2 goldfish-rtc (and timer) */ 70 #define VIRT_GF_RTC_MMIO_BASE 0xff006000 /* MMIO: 0xff006000 - 0xff007fff */ 71 #define VIRT_GF_RTC_IRQ_BASE PIC_IRQ(6, 1) /* PIC: #6, IRQ: #1 */ 72 #define VIRT_GF_RTC_NB 2 73 74 /* 1 goldfish-tty */ 75 #define VIRT_GF_TTY_MMIO_BASE 0xff008000 /* MMIO: 0xff008000 - 0xff008fff */ 76 #define VIRT_GF_TTY_IRQ_BASE PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */ 77 78 /* 1 virt-ctrl */ 79 #define VIRT_CTRL_MMIO_BASE 0xff009000 /* MMIO: 0xff009000 - 0xff009fff */ 80 #define VIRT_CTRL_IRQ_BASE PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */ 81 82 /* 83 * virtio-mmio size is 0x200 bytes 84 * we use 4 goldfish-pic to attach them, 85 * we can attach 32 virtio devices / goldfish-pic 86 * -> we can manage 32 * 4 = 128 virtio devices 87 */ 88 #define VIRT_VIRTIO_MMIO_BASE 0xff010000 /* MMIO: 0xff010000 - 0xff01ffff */ 89 #define VIRT_VIRTIO_IRQ_BASE PIC_IRQ(2, 1) /* PIC: 2, 3, 4, 5, IRQ: ALL */ 90 91 static void main_cpu_reset(void *opaque) 92 { 93 M68kCPU *cpu = opaque; 94 CPUState *cs = CPU(cpu); 95 96 cpu_reset(cs); 97 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 98 cpu->env.pc = ldl_phys(cs->as, 4); 99 } 100 101 static void virt_init(MachineState *machine) 102 { 103 M68kCPU *cpu = NULL; 104 int32_t kernel_size; 105 uint64_t elf_entry; 106 ram_addr_t initrd_base; 107 int32_t initrd_size; 108 ram_addr_t ram_size = machine->ram_size; 109 const char *kernel_filename = machine->kernel_filename; 110 const char *initrd_filename = machine->initrd_filename; 111 const char *kernel_cmdline = machine->kernel_cmdline; 112 hwaddr parameters_base; 113 DeviceState *dev; 114 DeviceState *irqc_dev; 115 DeviceState *pic_dev[VIRT_GF_PIC_NB]; 116 SysBusDevice *sysbus; 117 hwaddr io_base; 118 int i; 119 120 if (ram_size > 3399672 * KiB) { 121 /* 122 * The physical memory can be up to 4 GiB - 16 MiB, but linux 123 * kernel crashes after this limit (~ 3.2 GiB) 124 */ 125 error_report("Too much memory for this machine: %" PRId64 " KiB, " 126 "maximum 3399672 KiB", ram_size / KiB); 127 exit(1); 128 } 129 130 /* init CPUs */ 131 cpu = M68K_CPU(cpu_create(machine->cpu_type)); 132 qemu_register_reset(main_cpu_reset, cpu); 133 134 /* RAM */ 135 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 136 137 /* IRQ Controller */ 138 139 irqc_dev = qdev_new(TYPE_M68K_IRQC); 140 sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal); 141 142 /* 143 * 6 goldfish-pic 144 * 145 * map: 0xff000000 - 0xff006fff = 28 KiB 146 * IRQ: #1 (lower priority) -> #6 (higher priority) 147 * 148 */ 149 io_base = VIRT_GF_PIC_MMIO_BASE; 150 for (i = 0; i < VIRT_GF_PIC_NB; i++) { 151 pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC); 152 sysbus = SYS_BUS_DEVICE(pic_dev[i]); 153 qdev_prop_set_uint8(pic_dev[i], "index", i); 154 sysbus_realize_and_unref(sysbus, &error_fatal); 155 156 sysbus_mmio_map(sysbus, 0, io_base); 157 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i)); 158 159 io_base += 0x1000; 160 } 161 162 /* goldfish-rtc */ 163 io_base = VIRT_GF_RTC_MMIO_BASE; 164 for (i = 0; i < VIRT_GF_RTC_NB; i++) { 165 dev = qdev_new(TYPE_GOLDFISH_RTC); 166 sysbus = SYS_BUS_DEVICE(dev); 167 sysbus_realize_and_unref(sysbus, &error_fatal); 168 sysbus_mmio_map(sysbus, 0, io_base); 169 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i)); 170 171 io_base += 0x1000; 172 } 173 174 /* goldfish-tty */ 175 dev = qdev_new(TYPE_GOLDFISH_TTY); 176 sysbus = SYS_BUS_DEVICE(dev); 177 qdev_prop_set_chr(dev, "chardev", serial_hd(0)); 178 sysbus_realize_and_unref(sysbus, &error_fatal); 179 sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE); 180 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE)); 181 182 /* virt controller */ 183 dev = qdev_new(TYPE_VIRT_CTRL); 184 sysbus = SYS_BUS_DEVICE(dev); 185 sysbus_realize_and_unref(sysbus, &error_fatal); 186 sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE); 187 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE)); 188 189 /* virtio-mmio */ 190 io_base = VIRT_VIRTIO_MMIO_BASE; 191 for (i = 0; i < 128; i++) { 192 dev = qdev_new(TYPE_VIRTIO_MMIO); 193 qdev_prop_set_bit(dev, "force-legacy", false); 194 sysbus = SYS_BUS_DEVICE(dev); 195 sysbus_realize_and_unref(sysbus, &error_fatal); 196 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i)); 197 sysbus_mmio_map(sysbus, 0, io_base); 198 io_base += 0x200; 199 } 200 201 if (kernel_filename) { 202 CPUState *cs = CPU(cpu); 203 uint64_t high; 204 205 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 206 &elf_entry, NULL, &high, NULL, 1, 207 EM_68K, 0, 0); 208 if (kernel_size < 0) { 209 error_report("could not load kernel '%s'", kernel_filename); 210 exit(1); 211 } 212 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 213 parameters_base = (high + 1) & ~1; 214 215 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_VIRT); 216 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); 217 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); 218 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); 219 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); 220 221 BOOTINFO1(cs->as, parameters_base, BI_VIRT_QEMU_VERSION, 222 ((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) | 223 (QEMU_VERSION_MICRO << 8))); 224 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_PIC_BASE, 225 VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE); 226 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_RTC_BASE, 227 VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE); 228 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_TTY_BASE, 229 VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE); 230 BOOTINFO2(cs->as, parameters_base, BI_VIRT_CTRL_BASE, 231 VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE); 232 BOOTINFO2(cs->as, parameters_base, BI_VIRT_VIRTIO_BASE, 233 VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE); 234 235 if (kernel_cmdline) { 236 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, 237 kernel_cmdline); 238 } 239 240 /* load initrd */ 241 if (initrd_filename) { 242 initrd_size = get_image_size(initrd_filename); 243 if (initrd_size < 0) { 244 error_report("could not load initial ram disk '%s'", 245 initrd_filename); 246 exit(1); 247 } 248 249 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 250 load_image_targphys(initrd_filename, initrd_base, 251 ram_size - initrd_base); 252 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, 253 initrd_size); 254 } else { 255 initrd_base = 0; 256 initrd_size = 0; 257 } 258 BOOTINFO0(cs->as, parameters_base, BI_LAST); 259 } 260 } 261 262 static void virt_machine_class_init(ObjectClass *oc, void *data) 263 { 264 MachineClass *mc = MACHINE_CLASS(oc); 265 mc->desc = "QEMU M68K Virtual Machine"; 266 mc->init = virt_init; 267 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 268 mc->max_cpus = 1; 269 mc->no_floppy = 1; 270 mc->no_parallel = 1; 271 mc->default_ram_id = "m68k_virt.ram"; 272 } 273 274 static const TypeInfo virt_machine_info = { 275 .name = MACHINE_TYPE_NAME("virt"), 276 .parent = TYPE_MACHINE, 277 .abstract = true, 278 .class_init = virt_machine_class_init, 279 }; 280 281 static void virt_machine_register_types(void) 282 { 283 type_register_static(&virt_machine_info); 284 } 285 286 type_init(virt_machine_register_types) 287 288 #define DEFINE_VIRT_MACHINE(major, minor, latest) \ 289 static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ 290 void *data) \ 291 { \ 292 MachineClass *mc = MACHINE_CLASS(oc); \ 293 virt_machine_##major##_##minor##_options(mc); \ 294 mc->desc = "QEMU " # major "." # minor " M68K Virtual Machine"; \ 295 if (latest) { \ 296 mc->alias = "virt"; \ 297 } \ 298 } \ 299 static const TypeInfo machvirt_##major##_##minor##_info = { \ 300 .name = MACHINE_TYPE_NAME("virt-" # major "." # minor), \ 301 .parent = MACHINE_TYPE_NAME("virt"), \ 302 .class_init = virt_##major##_##minor##_class_init, \ 303 }; \ 304 static void machvirt_machine_##major##_##minor##_init(void) \ 305 { \ 306 type_register_static(&machvirt_##major##_##minor##_info); \ 307 } \ 308 type_init(machvirt_machine_##major##_##minor##_init); 309 310 static void virt_machine_6_0_options(MachineClass *mc) 311 { 312 } 313 DEFINE_VIRT_MACHINE(6, 0, true) 314