1 /* 2 * SPDX-License-Identifier: GPL-2.0-or-later 3 * 4 * QEMU Vitual M68K Machine 5 * 6 * (c) 2020 Laurent Vivier <laurent@vivier.eu> 7 * 8 */ 9 10 #include "qemu/osdep.h" 11 #include "qemu/units.h" 12 #include "qemu/guest-random.h" 13 #include "sysemu/sysemu.h" 14 #include "cpu.h" 15 #include "hw/boards.h" 16 #include "hw/qdev-properties.h" 17 #include "elf.h" 18 #include "hw/loader.h" 19 #include "ui/console.h" 20 #include "hw/sysbus.h" 21 #include "standard-headers/asm-m68k/bootinfo.h" 22 #include "standard-headers/asm-m68k/bootinfo-virt.h" 23 #include "bootinfo.h" 24 #include "net/net.h" 25 #include "qapi/error.h" 26 #include "sysemu/qtest.h" 27 #include "sysemu/runstate.h" 28 #include "sysemu/reset.h" 29 30 #include "hw/intc/m68k_irqc.h" 31 #include "hw/misc/virt_ctrl.h" 32 #include "hw/char/goldfish_tty.h" 33 #include "hw/rtc/goldfish_rtc.h" 34 #include "hw/intc/goldfish_pic.h" 35 #include "hw/virtio/virtio-mmio.h" 36 #include "hw/virtio/virtio-blk.h" 37 38 /* 39 * 6 goldfish-pic for CPU IRQ #1 to IRQ #6 40 * CPU IRQ #1 -> PIC #1 41 * IRQ #1 to IRQ #31 -> unused 42 * IRQ #32 -> goldfish-tty 43 * CPU IRQ #2 -> PIC #2 44 * IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32 45 * CPU IRQ #3 -> PIC #3 46 * IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64 47 * CPU IRQ #4 -> PIC #4 48 * IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96 49 * CPU IRQ #5 -> PIC #5 50 * IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128 51 * CPU IRQ #6 -> PIC #6 52 * IRQ #1 -> goldfish-rtc 53 * IRQ #2 to IRQ #32 -> unused 54 * CPU IRQ #7 -> NMI 55 */ 56 57 #define PIC_IRQ_BASE(num) (8 + (num - 1) * 32) 58 #define PIC_IRQ(num, irq) (PIC_IRQ_BASE(num) + irq - 1) 59 #define PIC_GPIO(pic_irq) (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \ 60 (pic_irq - 8) % 32)) 61 62 #define VIRT_GF_PIC_MMIO_BASE 0xff000000 /* MMIO: 0xff000000 - 0xff005fff */ 63 #define VIRT_GF_PIC_IRQ_BASE 1 /* IRQ: #1 -> #6 */ 64 #define VIRT_GF_PIC_NB 6 65 66 /* 2 goldfish-rtc (and timer) */ 67 #define VIRT_GF_RTC_MMIO_BASE 0xff006000 /* MMIO: 0xff006000 - 0xff007fff */ 68 #define VIRT_GF_RTC_IRQ_BASE PIC_IRQ(6, 1) /* PIC: #6, IRQ: #1 */ 69 #define VIRT_GF_RTC_NB 2 70 71 /* 1 goldfish-tty */ 72 #define VIRT_GF_TTY_MMIO_BASE 0xff008000 /* MMIO: 0xff008000 - 0xff008fff */ 73 #define VIRT_GF_TTY_IRQ_BASE PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */ 74 75 /* 1 virt-ctrl */ 76 #define VIRT_CTRL_MMIO_BASE 0xff009000 /* MMIO: 0xff009000 - 0xff009fff */ 77 #define VIRT_CTRL_IRQ_BASE PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */ 78 79 /* 80 * virtio-mmio size is 0x200 bytes 81 * we use 4 goldfish-pic to attach them, 82 * we can attach 32 virtio devices / goldfish-pic 83 * -> we can manage 32 * 4 = 128 virtio devices 84 */ 85 #define VIRT_VIRTIO_MMIO_BASE 0xff010000 /* MMIO: 0xff010000 - 0xff01ffff */ 86 #define VIRT_VIRTIO_IRQ_BASE PIC_IRQ(2, 1) /* PIC: 2, 3, 4, 5, IRQ: ALL */ 87 88 typedef struct { 89 M68kCPU *cpu; 90 hwaddr initial_pc; 91 hwaddr initial_stack; 92 } ResetInfo; 93 94 static void main_cpu_reset(void *opaque) 95 { 96 ResetInfo *reset_info = opaque; 97 M68kCPU *cpu = reset_info->cpu; 98 CPUState *cs = CPU(cpu); 99 100 cpu_reset(cs); 101 cpu->env.aregs[7] = reset_info->initial_stack; 102 cpu->env.pc = reset_info->initial_pc; 103 } 104 105 static void virt_init(MachineState *machine) 106 { 107 M68kCPU *cpu = NULL; 108 int32_t kernel_size; 109 uint64_t elf_entry; 110 ram_addr_t initrd_base; 111 int32_t initrd_size; 112 ram_addr_t ram_size = machine->ram_size; 113 const char *kernel_filename = machine->kernel_filename; 114 const char *initrd_filename = machine->initrd_filename; 115 const char *kernel_cmdline = machine->kernel_cmdline; 116 hwaddr parameters_base; 117 DeviceState *dev; 118 DeviceState *irqc_dev; 119 DeviceState *pic_dev[VIRT_GF_PIC_NB]; 120 SysBusDevice *sysbus; 121 hwaddr io_base; 122 int i; 123 ResetInfo *reset_info; 124 uint8_t rng_seed[32]; 125 126 if (ram_size > 3399672 * KiB) { 127 /* 128 * The physical memory can be up to 4 GiB - 16 MiB, but linux 129 * kernel crashes after this limit (~ 3.2 GiB) 130 */ 131 error_report("Too much memory for this machine: %" PRId64 " KiB, " 132 "maximum 3399672 KiB", ram_size / KiB); 133 exit(1); 134 } 135 136 reset_info = g_new0(ResetInfo, 1); 137 138 /* init CPUs */ 139 cpu = M68K_CPU(cpu_create(machine->cpu_type)); 140 141 reset_info->cpu = cpu; 142 qemu_register_reset(main_cpu_reset, reset_info); 143 144 /* RAM */ 145 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 146 147 /* IRQ Controller */ 148 149 irqc_dev = qdev_new(TYPE_M68K_IRQC); 150 sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal); 151 152 /* 153 * 6 goldfish-pic 154 * 155 * map: 0xff000000 - 0xff006fff = 28 KiB 156 * IRQ: #1 (lower priority) -> #6 (higher priority) 157 * 158 */ 159 io_base = VIRT_GF_PIC_MMIO_BASE; 160 for (i = 0; i < VIRT_GF_PIC_NB; i++) { 161 pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC); 162 sysbus = SYS_BUS_DEVICE(pic_dev[i]); 163 qdev_prop_set_uint8(pic_dev[i], "index", i); 164 sysbus_realize_and_unref(sysbus, &error_fatal); 165 166 sysbus_mmio_map(sysbus, 0, io_base); 167 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i)); 168 169 io_base += 0x1000; 170 } 171 172 /* goldfish-rtc */ 173 io_base = VIRT_GF_RTC_MMIO_BASE; 174 for (i = 0; i < VIRT_GF_RTC_NB; i++) { 175 dev = qdev_new(TYPE_GOLDFISH_RTC); 176 sysbus = SYS_BUS_DEVICE(dev); 177 sysbus_realize_and_unref(sysbus, &error_fatal); 178 sysbus_mmio_map(sysbus, 0, io_base); 179 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i)); 180 181 io_base += 0x1000; 182 } 183 184 /* goldfish-tty */ 185 dev = qdev_new(TYPE_GOLDFISH_TTY); 186 sysbus = SYS_BUS_DEVICE(dev); 187 qdev_prop_set_chr(dev, "chardev", serial_hd(0)); 188 sysbus_realize_and_unref(sysbus, &error_fatal); 189 sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE); 190 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE)); 191 192 /* virt controller */ 193 dev = qdev_new(TYPE_VIRT_CTRL); 194 sysbus = SYS_BUS_DEVICE(dev); 195 sysbus_realize_and_unref(sysbus, &error_fatal); 196 sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE); 197 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE)); 198 199 /* virtio-mmio */ 200 io_base = VIRT_VIRTIO_MMIO_BASE; 201 for (i = 0; i < 128; i++) { 202 dev = qdev_new(TYPE_VIRTIO_MMIO); 203 qdev_prop_set_bit(dev, "force-legacy", false); 204 sysbus = SYS_BUS_DEVICE(dev); 205 sysbus_realize_and_unref(sysbus, &error_fatal); 206 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i)); 207 sysbus_mmio_map(sysbus, 0, io_base); 208 io_base += 0x200; 209 } 210 211 if (kernel_filename) { 212 CPUState *cs = CPU(cpu); 213 uint64_t high; 214 215 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 216 &elf_entry, NULL, &high, NULL, 1, 217 EM_68K, 0, 0); 218 if (kernel_size < 0) { 219 error_report("could not load kernel '%s'", kernel_filename); 220 exit(1); 221 } 222 reset_info->initial_pc = elf_entry; 223 parameters_base = (high + 1) & ~1; 224 225 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_VIRT); 226 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); 227 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); 228 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); 229 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); 230 231 BOOTINFO1(cs->as, parameters_base, BI_VIRT_QEMU_VERSION, 232 ((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) | 233 (QEMU_VERSION_MICRO << 8))); 234 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_PIC_BASE, 235 VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE); 236 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_RTC_BASE, 237 VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE); 238 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_TTY_BASE, 239 VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE); 240 BOOTINFO2(cs->as, parameters_base, BI_VIRT_CTRL_BASE, 241 VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE); 242 BOOTINFO2(cs->as, parameters_base, BI_VIRT_VIRTIO_BASE, 243 VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE); 244 245 if (kernel_cmdline) { 246 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, 247 kernel_cmdline); 248 } 249 250 /* Pass seed to RNG. */ 251 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed)); 252 BOOTINFODATA(cs->as, parameters_base, BI_VIRT_RNG_SEED, 253 rng_seed, sizeof(rng_seed)); 254 255 /* load initrd */ 256 if (initrd_filename) { 257 initrd_size = get_image_size(initrd_filename); 258 if (initrd_size < 0) { 259 error_report("could not load initial ram disk '%s'", 260 initrd_filename); 261 exit(1); 262 } 263 264 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 265 load_image_targphys(initrd_filename, initrd_base, 266 ram_size - initrd_base); 267 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, 268 initrd_size); 269 } else { 270 initrd_base = 0; 271 initrd_size = 0; 272 } 273 BOOTINFO0(cs->as, parameters_base, BI_LAST); 274 } 275 } 276 277 static void virt_machine_class_init(ObjectClass *oc, void *data) 278 { 279 MachineClass *mc = MACHINE_CLASS(oc); 280 mc->desc = "QEMU M68K Virtual Machine"; 281 mc->init = virt_init; 282 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 283 mc->max_cpus = 1; 284 mc->no_floppy = 1; 285 mc->no_parallel = 1; 286 mc->default_ram_id = "m68k_virt.ram"; 287 } 288 289 static const TypeInfo virt_machine_info = { 290 .name = MACHINE_TYPE_NAME("virt"), 291 .parent = TYPE_MACHINE, 292 .abstract = true, 293 .class_init = virt_machine_class_init, 294 }; 295 296 static void virt_machine_register_types(void) 297 { 298 type_register_static(&virt_machine_info); 299 } 300 301 type_init(virt_machine_register_types) 302 303 #define DEFINE_VIRT_MACHINE(major, minor, latest) \ 304 static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ 305 void *data) \ 306 { \ 307 MachineClass *mc = MACHINE_CLASS(oc); \ 308 virt_machine_##major##_##minor##_options(mc); \ 309 mc->desc = "QEMU " # major "." # minor " M68K Virtual Machine"; \ 310 if (latest) { \ 311 mc->alias = "virt"; \ 312 } \ 313 } \ 314 static const TypeInfo machvirt_##major##_##minor##_info = { \ 315 .name = MACHINE_TYPE_NAME("virt-" # major "." # minor), \ 316 .parent = MACHINE_TYPE_NAME("virt"), \ 317 .class_init = virt_##major##_##minor##_class_init, \ 318 }; \ 319 static void machvirt_machine_##major##_##minor##_init(void) \ 320 { \ 321 type_register_static(&machvirt_##major##_##minor##_info); \ 322 } \ 323 type_init(machvirt_machine_##major##_##minor##_init); 324 325 static void virt_machine_7_1_options(MachineClass *mc) 326 { 327 } 328 DEFINE_VIRT_MACHINE(7, 1, true) 329 330 static void virt_machine_7_0_options(MachineClass *mc) 331 { 332 virt_machine_7_1_options(mc); 333 compat_props_add(mc->compat_props, hw_compat_7_0, hw_compat_7_0_len); 334 } 335 DEFINE_VIRT_MACHINE(7, 0, false) 336 337 static void virt_machine_6_2_options(MachineClass *mc) 338 { 339 virt_machine_7_0_options(mc); 340 compat_props_add(mc->compat_props, hw_compat_6_2, hw_compat_6_2_len); 341 } 342 DEFINE_VIRT_MACHINE(6, 2, false) 343 344 static void virt_machine_6_1_options(MachineClass *mc) 345 { 346 virt_machine_6_2_options(mc); 347 compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len); 348 } 349 DEFINE_VIRT_MACHINE(6, 1, false) 350 351 static void virt_machine_6_0_options(MachineClass *mc) 352 { 353 virt_machine_6_1_options(mc); 354 compat_props_add(mc->compat_props, hw_compat_6_0, hw_compat_6_0_len); 355 } 356 DEFINE_VIRT_MACHINE(6, 0, false) 357