xref: /openbmc/qemu/hw/m68k/virt.c (revision 4f7b1ecb)
1 /*
2  * SPDX-License-Identifier: GPL-2.0-or-later
3  *
4  * QEMU Virtual M68K Machine
5  *
6  * (c) 2020 Laurent Vivier <laurent@vivier.eu>
7  *
8  */
9 
10 #include "qemu/osdep.h"
11 #include "qemu/units.h"
12 #include "qemu/guest-random.h"
13 #include "sysemu/sysemu.h"
14 #include "cpu.h"
15 #include "hw/boards.h"
16 #include "hw/qdev-properties.h"
17 #include "elf.h"
18 #include "hw/loader.h"
19 #include "ui/console.h"
20 #include "hw/sysbus.h"
21 #include "standard-headers/asm-m68k/bootinfo.h"
22 #include "standard-headers/asm-m68k/bootinfo-virt.h"
23 #include "bootinfo.h"
24 #include "net/net.h"
25 #include "qapi/error.h"
26 #include "qemu/error-report.h"
27 #include "sysemu/qtest.h"
28 #include "sysemu/runstate.h"
29 #include "sysemu/reset.h"
30 
31 #include "hw/intc/m68k_irqc.h"
32 #include "hw/misc/virt_ctrl.h"
33 #include "hw/char/goldfish_tty.h"
34 #include "hw/rtc/goldfish_rtc.h"
35 #include "hw/intc/goldfish_pic.h"
36 #include "hw/virtio/virtio-mmio.h"
37 #include "hw/virtio/virtio-blk.h"
38 
39 /*
40  * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
41  * CPU IRQ #1 -> PIC #1
42  *               IRQ #1 to IRQ #31 -> unused
43  *               IRQ #32 -> goldfish-tty
44  * CPU IRQ #2 -> PIC #2
45  *               IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
46  * CPU IRQ #3 -> PIC #3
47  *               IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
48  * CPU IRQ #4 -> PIC #4
49  *               IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96
50  * CPU IRQ #5 -> PIC #5
51  *               IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128
52  * CPU IRQ #6 -> PIC #6
53  *               IRQ #1 -> goldfish-rtc
54  *               IRQ #2 to IRQ #32 -> unused
55  * CPU IRQ #7 -> NMI
56  */
57 
58 #define PIC_IRQ_BASE(num)     (8 + (num - 1) * 32)
59 #define PIC_IRQ(num, irq)     (PIC_IRQ_BASE(num) + irq - 1)
60 #define PIC_GPIO(pic_irq)     (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \
61                                                 (pic_irq - 8) % 32))
62 
63 #define VIRT_GF_PIC_MMIO_BASE 0xff000000     /* MMIO: 0xff000000 - 0xff005fff */
64 #define VIRT_GF_PIC_IRQ_BASE  1              /* IRQ: #1 -> #6 */
65 #define VIRT_GF_PIC_NB        6
66 
67 /* 2 goldfish-rtc (and timer) */
68 #define VIRT_GF_RTC_MMIO_BASE 0xff006000     /* MMIO: 0xff006000 - 0xff007fff */
69 #define VIRT_GF_RTC_IRQ_BASE  PIC_IRQ(6, 1)  /* PIC: #6, IRQ: #1 */
70 #define VIRT_GF_RTC_NB        2
71 
72 /* 1 goldfish-tty */
73 #define VIRT_GF_TTY_MMIO_BASE 0xff008000     /* MMIO: 0xff008000 - 0xff008fff */
74 #define VIRT_GF_TTY_IRQ_BASE  PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */
75 
76 /* 1 virt-ctrl */
77 #define VIRT_CTRL_MMIO_BASE 0xff009000    /* MMIO: 0xff009000 - 0xff009fff */
78 #define VIRT_CTRL_IRQ_BASE  PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */
79 
80 /*
81  * virtio-mmio size is 0x200 bytes
82  * we use 4 goldfish-pic to attach them,
83  * we can attach 32 virtio devices / goldfish-pic
84  * -> we can manage 32 * 4 = 128 virtio devices
85  */
86 #define VIRT_VIRTIO_MMIO_BASE 0xff010000     /* MMIO: 0xff010000 - 0xff01ffff */
87 #define VIRT_VIRTIO_IRQ_BASE  PIC_IRQ(2, 1)  /* PIC: 2, 3, 4, 5, IRQ: ALL */
88 
89 typedef struct {
90     M68kCPU *cpu;
91     hwaddr initial_pc;
92     hwaddr initial_stack;
93 } ResetInfo;
94 
95 static void main_cpu_reset(void *opaque)
96 {
97     ResetInfo *reset_info = opaque;
98     M68kCPU *cpu = reset_info->cpu;
99     CPUState *cs = CPU(cpu);
100 
101     cpu_reset(cs);
102     cpu->env.aregs[7] = reset_info->initial_stack;
103     cpu->env.pc = reset_info->initial_pc;
104 }
105 
106 static void rerandomize_rng_seed(void *opaque)
107 {
108     struct bi_record *rng_seed = opaque;
109     qemu_guest_getrandom_nofail((void *)rng_seed->data + 2,
110                                 be16_to_cpu(*(uint16_t *)rng_seed->data));
111 }
112 
113 static void virt_init(MachineState *machine)
114 {
115     M68kCPU *cpu = NULL;
116     int32_t kernel_size;
117     uint64_t elf_entry;
118     ram_addr_t initrd_base;
119     int32_t initrd_size;
120     ram_addr_t ram_size = machine->ram_size;
121     const char *kernel_filename = machine->kernel_filename;
122     const char *initrd_filename = machine->initrd_filename;
123     const char *kernel_cmdline = machine->kernel_cmdline;
124     hwaddr parameters_base;
125     DeviceState *dev;
126     DeviceState *irqc_dev;
127     DeviceState *pic_dev[VIRT_GF_PIC_NB];
128     SysBusDevice *sysbus;
129     hwaddr io_base;
130     int i;
131     ResetInfo *reset_info;
132     uint8_t rng_seed[32];
133 
134     if (ram_size > 3399672 * KiB) {
135         /*
136          * The physical memory can be up to 4 GiB - 16 MiB, but linux
137          * kernel crashes after this limit (~ 3.2 GiB)
138          */
139         error_report("Too much memory for this machine: %" PRId64 " KiB, "
140                      "maximum 3399672 KiB", ram_size / KiB);
141         exit(1);
142     }
143 
144     reset_info = g_new0(ResetInfo, 1);
145 
146     /* init CPUs */
147     cpu = M68K_CPU(cpu_create(machine->cpu_type));
148 
149     reset_info->cpu = cpu;
150     qemu_register_reset(main_cpu_reset, reset_info);
151 
152     /* RAM */
153     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
154 
155     /* IRQ Controller */
156 
157     irqc_dev = qdev_new(TYPE_M68K_IRQC);
158     object_property_set_link(OBJECT(irqc_dev), "m68k-cpu",
159                              OBJECT(cpu), &error_abort);
160     sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal);
161 
162     /*
163      * 6 goldfish-pic
164      *
165      * map: 0xff000000 - 0xff006fff = 28 KiB
166      * IRQ: #1 (lower priority) -> #6 (higher priority)
167      *
168      */
169     io_base = VIRT_GF_PIC_MMIO_BASE;
170     for (i = 0; i < VIRT_GF_PIC_NB; i++) {
171         pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC);
172         sysbus = SYS_BUS_DEVICE(pic_dev[i]);
173         qdev_prop_set_uint8(pic_dev[i], "index", i);
174         sysbus_realize_and_unref(sysbus, &error_fatal);
175 
176         sysbus_mmio_map(sysbus, 0, io_base);
177         sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i));
178 
179         io_base += 0x1000;
180     }
181 
182     /* goldfish-rtc */
183     io_base = VIRT_GF_RTC_MMIO_BASE;
184     for (i = 0; i < VIRT_GF_RTC_NB; i++) {
185         dev = qdev_new(TYPE_GOLDFISH_RTC);
186         qdev_prop_set_bit(dev, "big-endian", true);
187         sysbus = SYS_BUS_DEVICE(dev);
188         sysbus_realize_and_unref(sysbus, &error_fatal);
189         sysbus_mmio_map(sysbus, 0, io_base);
190         sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i));
191 
192         io_base += 0x1000;
193     }
194 
195     /* goldfish-tty */
196     dev = qdev_new(TYPE_GOLDFISH_TTY);
197     sysbus = SYS_BUS_DEVICE(dev);
198     qdev_prop_set_chr(dev, "chardev", serial_hd(0));
199     sysbus_realize_and_unref(sysbus, &error_fatal);
200     sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE);
201     sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE));
202 
203     /* virt controller */
204     dev = sysbus_create_simple(TYPE_VIRT_CTRL, VIRT_CTRL_MMIO_BASE,
205                                PIC_GPIO(VIRT_CTRL_IRQ_BASE));
206 
207     /* virtio-mmio */
208     io_base = VIRT_VIRTIO_MMIO_BASE;
209     for (i = 0; i < 128; i++) {
210         dev = qdev_new(TYPE_VIRTIO_MMIO);
211         qdev_prop_set_bit(dev, "force-legacy", false);
212         sysbus = SYS_BUS_DEVICE(dev);
213         sysbus_realize_and_unref(sysbus, &error_fatal);
214         sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i));
215         sysbus_mmio_map(sysbus, 0, io_base);
216         io_base += 0x200;
217     }
218 
219     if (kernel_filename) {
220         CPUState *cs = CPU(cpu);
221         uint64_t high;
222         void *param_blob, *param_ptr, *param_rng_seed;
223 
224         if (kernel_cmdline) {
225             param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
226         } else {
227             param_blob = g_malloc(1024);
228         }
229 
230         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
231                                &elf_entry, NULL, &high, NULL, 1,
232                                EM_68K, 0, 0);
233         if (kernel_size < 0) {
234             error_report("could not load kernel '%s'", kernel_filename);
235             exit(1);
236         }
237         reset_info->initial_pc = elf_entry;
238         parameters_base = (high + 1) & ~1;
239         param_ptr = param_blob;
240 
241         BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_VIRT);
242         if (m68k_feature(&cpu->env, M68K_FEATURE_M68020)) {
243             BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68020);
244         } else if (m68k_feature(&cpu->env, M68K_FEATURE_M68030)) {
245             BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68030);
246             BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68030);
247         } else if (m68k_feature(&cpu->env, M68K_FEATURE_M68040)) {
248             BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
249             BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
250             BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
251         } else if (m68k_feature(&cpu->env, M68K_FEATURE_M68060)) {
252             BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68060);
253             BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68060);
254             BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68060);
255         }
256         BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
257 
258         BOOTINFO1(param_ptr, BI_VIRT_QEMU_VERSION,
259                   ((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) |
260                    (QEMU_VERSION_MICRO << 8)));
261         BOOTINFO2(param_ptr, BI_VIRT_GF_PIC_BASE,
262                   VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE);
263         BOOTINFO2(param_ptr, BI_VIRT_GF_RTC_BASE,
264                   VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE);
265         BOOTINFO2(param_ptr, BI_VIRT_GF_TTY_BASE,
266                   VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE);
267         BOOTINFO2(param_ptr, BI_VIRT_CTRL_BASE,
268                   VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE);
269         BOOTINFO2(param_ptr, BI_VIRT_VIRTIO_BASE,
270                   VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE);
271 
272         if (kernel_cmdline) {
273             BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
274                         kernel_cmdline);
275         }
276 
277         /* Pass seed to RNG. */
278         param_rng_seed = param_ptr;
279         qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
280         BOOTINFODATA(param_ptr, BI_RNG_SEED,
281                      rng_seed, sizeof(rng_seed));
282 
283         /* load initrd */
284         if (initrd_filename) {
285             initrd_size = get_image_size(initrd_filename);
286             if (initrd_size < 0) {
287                 error_report("could not load initial ram disk '%s'",
288                              initrd_filename);
289                 exit(1);
290             }
291 
292             initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
293             load_image_targphys(initrd_filename, initrd_base,
294                                 ram_size - initrd_base);
295             BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
296                       initrd_size);
297         } else {
298             initrd_base = 0;
299             initrd_size = 0;
300         }
301         BOOTINFO0(param_ptr, BI_LAST);
302         rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
303                               parameters_base, cs->as);
304         qemu_register_reset_nosnapshotload(rerandomize_rng_seed,
305                             rom_ptr_for_as(cs->as, parameters_base,
306                                            param_ptr - param_blob) +
307                             (param_rng_seed - param_blob));
308         g_free(param_blob);
309     }
310 }
311 
312 static void virt_machine_class_init(ObjectClass *oc, void *data)
313 {
314     MachineClass *mc = MACHINE_CLASS(oc);
315     mc->desc = "QEMU M68K Virtual Machine";
316     mc->init = virt_init;
317     mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
318     mc->max_cpus = 1;
319     mc->no_floppy = 1;
320     mc->no_parallel = 1;
321     mc->default_ram_id = "m68k_virt.ram";
322 }
323 
324 static const TypeInfo virt_machine_info = {
325     .name       = MACHINE_TYPE_NAME("virt"),
326     .parent     = TYPE_MACHINE,
327     .abstract   = true,
328     .class_init = virt_machine_class_init,
329 };
330 
331 static void virt_machine_register_types(void)
332 {
333     type_register_static(&virt_machine_info);
334 }
335 
336 type_init(virt_machine_register_types)
337 
338 #define DEFINE_VIRT_MACHINE_IMPL(latest, ...) \
339     static void MACHINE_VER_SYM(class_init, virt, __VA_ARGS__)( \
340         ObjectClass *oc, \
341         void *data) \
342     { \
343         MachineClass *mc = MACHINE_CLASS(oc); \
344         MACHINE_VER_SYM(options, virt, __VA_ARGS__)(mc); \
345         mc->desc = "QEMU " MACHINE_VER_STR(__VA_ARGS__) " M68K Virtual Machine"; \
346         MACHINE_VER_DEPRECATION(__VA_ARGS__); \
347         if (latest) { \
348             mc->alias = "virt"; \
349         } \
350     } \
351     static const TypeInfo MACHINE_VER_SYM(info, virt, __VA_ARGS__) = \
352     { \
353         .name = MACHINE_VER_TYPE_NAME("virt", __VA_ARGS__), \
354         .parent = MACHINE_TYPE_NAME("virt"), \
355         .class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
356     }; \
357     static void MACHINE_VER_SYM(register, virt, __VA_ARGS__)(void) \
358     { \
359         MACHINE_VER_DELETION(__VA_ARGS__); \
360         type_register_static(&MACHINE_VER_SYM(info, virt, __VA_ARGS__)); \
361     } \
362     type_init(MACHINE_VER_SYM(register, virt, __VA_ARGS__));
363 
364 #define DEFINE_VIRT_MACHINE_AS_LATEST(major, minor) \
365     DEFINE_VIRT_MACHINE_IMPL(true, major, minor)
366 #define DEFINE_VIRT_MACHINE(major, minor) \
367     DEFINE_VIRT_MACHINE_IMPL(false, major, minor)
368 
369 static void virt_machine_9_1_options(MachineClass *mc)
370 {
371 }
372 DEFINE_VIRT_MACHINE_AS_LATEST(9, 1)
373 
374 static void virt_machine_9_0_options(MachineClass *mc)
375 {
376     virt_machine_9_1_options(mc);
377     compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
378 }
379 DEFINE_VIRT_MACHINE(9, 0)
380 
381 static void virt_machine_8_2_options(MachineClass *mc)
382 {
383     virt_machine_9_0_options(mc);
384     compat_props_add(mc->compat_props, hw_compat_8_2, hw_compat_8_2_len);
385 }
386 DEFINE_VIRT_MACHINE(8, 2)
387 
388 static void virt_machine_8_1_options(MachineClass *mc)
389 {
390     virt_machine_8_2_options(mc);
391     compat_props_add(mc->compat_props, hw_compat_8_1, hw_compat_8_1_len);
392 }
393 DEFINE_VIRT_MACHINE(8, 1)
394 
395 static void virt_machine_8_0_options(MachineClass *mc)
396 {
397     virt_machine_8_1_options(mc);
398     compat_props_add(mc->compat_props, hw_compat_8_0, hw_compat_8_0_len);
399 }
400 DEFINE_VIRT_MACHINE(8, 0)
401 
402 static void virt_machine_7_2_options(MachineClass *mc)
403 {
404     virt_machine_8_0_options(mc);
405     compat_props_add(mc->compat_props, hw_compat_7_2, hw_compat_7_2_len);
406 }
407 DEFINE_VIRT_MACHINE(7, 2)
408 
409 static void virt_machine_7_1_options(MachineClass *mc)
410 {
411     virt_machine_7_2_options(mc);
412     compat_props_add(mc->compat_props, hw_compat_7_1, hw_compat_7_1_len);
413 }
414 DEFINE_VIRT_MACHINE(7, 1)
415 
416 static void virt_machine_7_0_options(MachineClass *mc)
417 {
418     virt_machine_7_1_options(mc);
419     compat_props_add(mc->compat_props, hw_compat_7_0, hw_compat_7_0_len);
420 }
421 DEFINE_VIRT_MACHINE(7, 0)
422 
423 static void virt_machine_6_2_options(MachineClass *mc)
424 {
425     virt_machine_7_0_options(mc);
426     compat_props_add(mc->compat_props, hw_compat_6_2, hw_compat_6_2_len);
427 }
428 DEFINE_VIRT_MACHINE(6, 2)
429 
430 static void virt_machine_6_1_options(MachineClass *mc)
431 {
432     virt_machine_6_2_options(mc);
433     compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len);
434 }
435 DEFINE_VIRT_MACHINE(6, 1)
436 
437 static void virt_machine_6_0_options(MachineClass *mc)
438 {
439     virt_machine_6_1_options(mc);
440     compat_props_add(mc->compat_props, hw_compat_6_0, hw_compat_6_0_len);
441 }
442 DEFINE_VIRT_MACHINE(6, 0)
443