1 /* 2 * SPDX-License-Identifer: GPL-2.0-or-later 3 * 4 * QEMU Vitual M68K Machine 5 * 6 * (c) 2020 Laurent Vivier <laurent@vivier.eu> 7 * 8 */ 9 10 #include "qemu/osdep.h" 11 #include "qemu/units.h" 12 #include "qemu-common.h" 13 #include "sysemu/sysemu.h" 14 #include "cpu.h" 15 #include "hw/boards.h" 16 #include "hw/qdev-properties.h" 17 #include "elf.h" 18 #include "hw/loader.h" 19 #include "ui/console.h" 20 #include "exec/address-spaces.h" 21 #include "hw/sysbus.h" 22 #include "standard-headers/asm-m68k/bootinfo.h" 23 #include "standard-headers/asm-m68k/bootinfo-virt.h" 24 #include "bootinfo.h" 25 #include "net/net.h" 26 #include "qapi/error.h" 27 #include "sysemu/qtest.h" 28 #include "sysemu/runstate.h" 29 #include "sysemu/reset.h" 30 31 #include "hw/intc/m68k_irqc.h" 32 #include "hw/misc/virt_ctrl.h" 33 #include "hw/char/goldfish_tty.h" 34 #include "hw/rtc/goldfish_rtc.h" 35 #include "hw/intc/goldfish_pic.h" 36 #include "hw/virtio/virtio-mmio.h" 37 #include "hw/virtio/virtio-blk.h" 38 39 /* 40 * 6 goldfish-pic for CPU IRQ #1 to IRQ #6 41 * CPU IRQ #1 -> PIC #1 42 * IRQ #1 to IRQ #31 -> unused 43 * IRQ #32 -> goldfish-tty 44 * CPU IRQ #2 -> PIC #2 45 * IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32 46 * CPU IRQ #3 -> PIC #3 47 * IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64 48 * CPU IRQ #4 -> PIC #4 49 * IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96 50 * CPU IRQ #5 -> PIC #5 51 * IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128 52 * CPU IRQ #6 -> PIC #6 53 * IRQ #1 -> goldfish-rtc 54 * IRQ #2 to IRQ #32 -> unused 55 * CPU IRQ #7 -> NMI 56 */ 57 58 #define PIC_IRQ_BASE(num) (8 + (num - 1) * 32) 59 #define PIC_IRQ(num, irq) (PIC_IRQ_BASE(num) + irq - 1) 60 #define PIC_GPIO(pic_irq) (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \ 61 (pic_irq - 8) % 32)) 62 63 #define VIRT_GF_PIC_MMIO_BASE 0xff000000 /* MMIO: 0xff000000 - 0xff005fff */ 64 #define VIRT_GF_PIC_IRQ_BASE 1 /* IRQ: #1 -> #6 */ 65 #define VIRT_GF_PIC_NB 6 66 67 /* 2 goldfish-rtc (and timer) */ 68 #define VIRT_GF_RTC_MMIO_BASE 0xff006000 /* MMIO: 0xff006000 - 0xff007fff */ 69 #define VIRT_GF_RTC_IRQ_BASE PIC_IRQ(6, 1) /* PIC: #6, IRQ: #1 */ 70 #define VIRT_GF_RTC_NB 2 71 72 /* 1 goldfish-tty */ 73 #define VIRT_GF_TTY_MMIO_BASE 0xff008000 /* MMIO: 0xff008000 - 0xff008fff */ 74 #define VIRT_GF_TTY_IRQ_BASE PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */ 75 76 /* 1 virt-ctrl */ 77 #define VIRT_CTRL_MMIO_BASE 0xff009000 /* MMIO: 0xff009000 - 0xff009fff */ 78 #define VIRT_CTRL_IRQ_BASE PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */ 79 80 /* 81 * virtio-mmio size is 0x200 bytes 82 * we use 4 goldfish-pic to attach them, 83 * we can attach 32 virtio devices / goldfish-pic 84 * -> we can manage 32 * 4 = 128 virtio devices 85 */ 86 #define VIRT_VIRTIO_MMIO_BASE 0xff010000 /* MMIO: 0xff010000 - 0xff01ffff */ 87 #define VIRT_VIRTIO_IRQ_BASE PIC_IRQ(2, 1) /* PIC: 2, 3, 4, 5, IRQ: ALL */ 88 89 static void main_cpu_reset(void *opaque) 90 { 91 M68kCPU *cpu = opaque; 92 CPUState *cs = CPU(cpu); 93 94 cpu_reset(cs); 95 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 96 cpu->env.pc = ldl_phys(cs->as, 4); 97 } 98 99 static void virt_init(MachineState *machine) 100 { 101 M68kCPU *cpu = NULL; 102 int32_t kernel_size; 103 uint64_t elf_entry; 104 ram_addr_t initrd_base; 105 int32_t initrd_size; 106 ram_addr_t ram_size = machine->ram_size; 107 const char *kernel_filename = machine->kernel_filename; 108 const char *initrd_filename = machine->initrd_filename; 109 const char *kernel_cmdline = machine->kernel_cmdline; 110 hwaddr parameters_base; 111 DeviceState *dev; 112 DeviceState *irqc_dev; 113 DeviceState *pic_dev[VIRT_GF_PIC_NB]; 114 SysBusDevice *sysbus; 115 hwaddr io_base; 116 int i; 117 118 if (ram_size > 3399672 * KiB) { 119 /* 120 * The physical memory can be up to 4 GiB - 16 MiB, but linux 121 * kernel crashes after this limit (~ 3.2 GiB) 122 */ 123 error_report("Too much memory for this machine: %" PRId64 " KiB, " 124 "maximum 3399672 KiB", ram_size / KiB); 125 exit(1); 126 } 127 128 /* init CPUs */ 129 cpu = M68K_CPU(cpu_create(machine->cpu_type)); 130 qemu_register_reset(main_cpu_reset, cpu); 131 132 /* RAM */ 133 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 134 135 /* IRQ Controller */ 136 137 irqc_dev = qdev_new(TYPE_M68K_IRQC); 138 sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal); 139 140 /* 141 * 6 goldfish-pic 142 * 143 * map: 0xff000000 - 0xff006fff = 28 KiB 144 * IRQ: #1 (lower priority) -> #6 (higher priority) 145 * 146 */ 147 io_base = VIRT_GF_PIC_MMIO_BASE; 148 for (i = 0; i < VIRT_GF_PIC_NB; i++) { 149 pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC); 150 sysbus = SYS_BUS_DEVICE(pic_dev[i]); 151 qdev_prop_set_uint8(pic_dev[i], "index", i); 152 sysbus_realize_and_unref(sysbus, &error_fatal); 153 154 sysbus_mmio_map(sysbus, 0, io_base); 155 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i)); 156 157 io_base += 0x1000; 158 } 159 160 /* goldfish-rtc */ 161 io_base = VIRT_GF_RTC_MMIO_BASE; 162 for (i = 0; i < VIRT_GF_RTC_NB; i++) { 163 dev = qdev_new(TYPE_GOLDFISH_RTC); 164 sysbus = SYS_BUS_DEVICE(dev); 165 sysbus_realize_and_unref(sysbus, &error_fatal); 166 sysbus_mmio_map(sysbus, 0, io_base); 167 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i)); 168 169 io_base += 0x1000; 170 } 171 172 /* goldfish-tty */ 173 dev = qdev_new(TYPE_GOLDFISH_TTY); 174 sysbus = SYS_BUS_DEVICE(dev); 175 qdev_prop_set_chr(dev, "chardev", serial_hd(0)); 176 sysbus_realize_and_unref(sysbus, &error_fatal); 177 sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE); 178 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE)); 179 180 /* virt controller */ 181 dev = qdev_new(TYPE_VIRT_CTRL); 182 sysbus = SYS_BUS_DEVICE(dev); 183 sysbus_realize_and_unref(sysbus, &error_fatal); 184 sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE); 185 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE)); 186 187 /* virtio-mmio */ 188 io_base = VIRT_VIRTIO_MMIO_BASE; 189 for (i = 0; i < 128; i++) { 190 dev = qdev_new(TYPE_VIRTIO_MMIO); 191 qdev_prop_set_bit(dev, "force-legacy", false); 192 sysbus = SYS_BUS_DEVICE(dev); 193 sysbus_realize_and_unref(sysbus, &error_fatal); 194 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i)); 195 sysbus_mmio_map(sysbus, 0, io_base); 196 io_base += 0x200; 197 } 198 199 if (kernel_filename) { 200 CPUState *cs = CPU(cpu); 201 uint64_t high; 202 203 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 204 &elf_entry, NULL, &high, NULL, 1, 205 EM_68K, 0, 0); 206 if (kernel_size < 0) { 207 error_report("could not load kernel '%s'", kernel_filename); 208 exit(1); 209 } 210 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 211 parameters_base = (high + 1) & ~1; 212 213 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_VIRT); 214 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); 215 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); 216 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); 217 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); 218 219 BOOTINFO1(cs->as, parameters_base, BI_VIRT_QEMU_VERSION, 220 ((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) | 221 (QEMU_VERSION_MICRO << 8))); 222 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_PIC_BASE, 223 VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE); 224 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_RTC_BASE, 225 VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE); 226 BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_TTY_BASE, 227 VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE); 228 BOOTINFO2(cs->as, parameters_base, BI_VIRT_CTRL_BASE, 229 VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE); 230 BOOTINFO2(cs->as, parameters_base, BI_VIRT_VIRTIO_BASE, 231 VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE); 232 233 if (kernel_cmdline) { 234 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, 235 kernel_cmdline); 236 } 237 238 /* load initrd */ 239 if (initrd_filename) { 240 initrd_size = get_image_size(initrd_filename); 241 if (initrd_size < 0) { 242 error_report("could not load initial ram disk '%s'", 243 initrd_filename); 244 exit(1); 245 } 246 247 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 248 load_image_targphys(initrd_filename, initrd_base, 249 ram_size - initrd_base); 250 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, 251 initrd_size); 252 } else { 253 initrd_base = 0; 254 initrd_size = 0; 255 } 256 BOOTINFO0(cs->as, parameters_base, BI_LAST); 257 } 258 } 259 260 static void virt_machine_class_init(ObjectClass *oc, void *data) 261 { 262 MachineClass *mc = MACHINE_CLASS(oc); 263 mc->desc = "QEMU M68K Virtual Machine"; 264 mc->init = virt_init; 265 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 266 mc->max_cpus = 1; 267 mc->no_floppy = 1; 268 mc->no_parallel = 1; 269 mc->default_ram_id = "m68k_virt.ram"; 270 } 271 272 static const TypeInfo virt_machine_info = { 273 .name = MACHINE_TYPE_NAME("virt"), 274 .parent = TYPE_MACHINE, 275 .abstract = true, 276 .class_init = virt_machine_class_init, 277 }; 278 279 static void virt_machine_register_types(void) 280 { 281 type_register_static(&virt_machine_info); 282 } 283 284 type_init(virt_machine_register_types) 285 286 #define DEFINE_VIRT_MACHINE(major, minor, latest) \ 287 static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ 288 void *data) \ 289 { \ 290 MachineClass *mc = MACHINE_CLASS(oc); \ 291 virt_machine_##major##_##minor##_options(mc); \ 292 mc->desc = "QEMU " # major "." # minor " M68K Virtual Machine"; \ 293 if (latest) { \ 294 mc->alias = "virt"; \ 295 } \ 296 } \ 297 static const TypeInfo machvirt_##major##_##minor##_info = { \ 298 .name = MACHINE_TYPE_NAME("virt-" # major "." # minor), \ 299 .parent = MACHINE_TYPE_NAME("virt"), \ 300 .class_init = virt_##major##_##minor##_class_init, \ 301 }; \ 302 static void machvirt_machine_##major##_##minor##_init(void) \ 303 { \ 304 type_register_static(&machvirt_##major##_##minor##_info); \ 305 } \ 306 type_init(machvirt_machine_##major##_##minor##_init); 307 308 static void virt_machine_6_0_options(MachineClass *mc) 309 { 310 } 311 DEFINE_VIRT_MACHINE(6, 0, true) 312