xref: /openbmc/qemu/hw/m68k/virt.c (revision 18bf1c94)
1 /*
2  * SPDX-License-Identifier: GPL-2.0-or-later
3  *
4  * QEMU Vitual M68K Machine
5  *
6  * (c) 2020 Laurent Vivier <laurent@vivier.eu>
7  *
8  */
9 
10 #include "qemu/osdep.h"
11 #include "qemu/units.h"
12 #include "qemu/guest-random.h"
13 #include "sysemu/sysemu.h"
14 #include "cpu.h"
15 #include "hw/boards.h"
16 #include "hw/qdev-properties.h"
17 #include "elf.h"
18 #include "hw/loader.h"
19 #include "ui/console.h"
20 #include "hw/sysbus.h"
21 #include "standard-headers/asm-m68k/bootinfo.h"
22 #include "standard-headers/asm-m68k/bootinfo-virt.h"
23 #include "bootinfo.h"
24 #include "net/net.h"
25 #include "qapi/error.h"
26 #include "sysemu/qtest.h"
27 #include "sysemu/runstate.h"
28 #include "sysemu/reset.h"
29 
30 #include "hw/intc/m68k_irqc.h"
31 #include "hw/misc/virt_ctrl.h"
32 #include "hw/char/goldfish_tty.h"
33 #include "hw/rtc/goldfish_rtc.h"
34 #include "hw/intc/goldfish_pic.h"
35 #include "hw/virtio/virtio-mmio.h"
36 #include "hw/virtio/virtio-blk.h"
37 
38 /*
39  * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
40  * CPU IRQ #1 -> PIC #1
41  *               IRQ #1 to IRQ #31 -> unused
42  *               IRQ #32 -> goldfish-tty
43  * CPU IRQ #2 -> PIC #2
44  *               IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
45  * CPU IRQ #3 -> PIC #3
46  *               IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
47  * CPU IRQ #4 -> PIC #4
48  *               IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96
49  * CPU IRQ #5 -> PIC #5
50  *               IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128
51  * CPU IRQ #6 -> PIC #6
52  *               IRQ #1 -> goldfish-rtc
53  *               IRQ #2 to IRQ #32 -> unused
54  * CPU IRQ #7 -> NMI
55  */
56 
57 #define PIC_IRQ_BASE(num)     (8 + (num - 1) * 32)
58 #define PIC_IRQ(num, irq)     (PIC_IRQ_BASE(num) + irq - 1)
59 #define PIC_GPIO(pic_irq)     (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \
60                                                 (pic_irq - 8) % 32))
61 
62 #define VIRT_GF_PIC_MMIO_BASE 0xff000000     /* MMIO: 0xff000000 - 0xff005fff */
63 #define VIRT_GF_PIC_IRQ_BASE  1              /* IRQ: #1 -> #6 */
64 #define VIRT_GF_PIC_NB        6
65 
66 /* 2 goldfish-rtc (and timer) */
67 #define VIRT_GF_RTC_MMIO_BASE 0xff006000     /* MMIO: 0xff006000 - 0xff007fff */
68 #define VIRT_GF_RTC_IRQ_BASE  PIC_IRQ(6, 1)  /* PIC: #6, IRQ: #1 */
69 #define VIRT_GF_RTC_NB        2
70 
71 /* 1 goldfish-tty */
72 #define VIRT_GF_TTY_MMIO_BASE 0xff008000     /* MMIO: 0xff008000 - 0xff008fff */
73 #define VIRT_GF_TTY_IRQ_BASE  PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */
74 
75 /* 1 virt-ctrl */
76 #define VIRT_CTRL_MMIO_BASE 0xff009000    /* MMIO: 0xff009000 - 0xff009fff */
77 #define VIRT_CTRL_IRQ_BASE  PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */
78 
79 /*
80  * virtio-mmio size is 0x200 bytes
81  * we use 4 goldfish-pic to attach them,
82  * we can attach 32 virtio devices / goldfish-pic
83  * -> we can manage 32 * 4 = 128 virtio devices
84  */
85 #define VIRT_VIRTIO_MMIO_BASE 0xff010000     /* MMIO: 0xff010000 - 0xff01ffff */
86 #define VIRT_VIRTIO_IRQ_BASE  PIC_IRQ(2, 1)  /* PIC: 2, 3, 4, 5, IRQ: ALL */
87 
88 typedef struct {
89     M68kCPU *cpu;
90     hwaddr initial_pc;
91     hwaddr initial_stack;
92     struct bi_record *rng_seed;
93 } ResetInfo;
94 
95 static void main_cpu_reset(void *opaque)
96 {
97     ResetInfo *reset_info = opaque;
98     M68kCPU *cpu = reset_info->cpu;
99     CPUState *cs = CPU(cpu);
100 
101     if (reset_info->rng_seed) {
102         qemu_guest_getrandom_nofail((void *)reset_info->rng_seed->data + 2,
103             be16_to_cpu(*(uint16_t *)reset_info->rng_seed->data));
104     }
105 
106     cpu_reset(cs);
107     cpu->env.aregs[7] = reset_info->initial_stack;
108     cpu->env.pc = reset_info->initial_pc;
109 }
110 
111 static void virt_init(MachineState *machine)
112 {
113     M68kCPU *cpu = NULL;
114     int32_t kernel_size;
115     uint64_t elf_entry;
116     ram_addr_t initrd_base;
117     int32_t initrd_size;
118     ram_addr_t ram_size = machine->ram_size;
119     const char *kernel_filename = machine->kernel_filename;
120     const char *initrd_filename = machine->initrd_filename;
121     const char *kernel_cmdline = machine->kernel_cmdline;
122     hwaddr parameters_base;
123     DeviceState *dev;
124     DeviceState *irqc_dev;
125     DeviceState *pic_dev[VIRT_GF_PIC_NB];
126     SysBusDevice *sysbus;
127     hwaddr io_base;
128     int i;
129     ResetInfo *reset_info;
130     uint8_t rng_seed[32];
131 
132     if (ram_size > 3399672 * KiB) {
133         /*
134          * The physical memory can be up to 4 GiB - 16 MiB, but linux
135          * kernel crashes after this limit (~ 3.2 GiB)
136          */
137         error_report("Too much memory for this machine: %" PRId64 " KiB, "
138                      "maximum 3399672 KiB", ram_size / KiB);
139         exit(1);
140     }
141 
142     reset_info = g_new0(ResetInfo, 1);
143 
144     /* init CPUs */
145     cpu = M68K_CPU(cpu_create(machine->cpu_type));
146 
147     reset_info->cpu = cpu;
148     qemu_register_reset(main_cpu_reset, reset_info);
149 
150     /* RAM */
151     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
152 
153     /* IRQ Controller */
154 
155     irqc_dev = qdev_new(TYPE_M68K_IRQC);
156     sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal);
157 
158     /*
159      * 6 goldfish-pic
160      *
161      * map: 0xff000000 - 0xff006fff = 28 KiB
162      * IRQ: #1 (lower priority) -> #6 (higher priority)
163      *
164      */
165     io_base = VIRT_GF_PIC_MMIO_BASE;
166     for (i = 0; i < VIRT_GF_PIC_NB; i++) {
167         pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC);
168         sysbus = SYS_BUS_DEVICE(pic_dev[i]);
169         qdev_prop_set_uint8(pic_dev[i], "index", i);
170         sysbus_realize_and_unref(sysbus, &error_fatal);
171 
172         sysbus_mmio_map(sysbus, 0, io_base);
173         sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i));
174 
175         io_base += 0x1000;
176     }
177 
178     /* goldfish-rtc */
179     io_base = VIRT_GF_RTC_MMIO_BASE;
180     for (i = 0; i < VIRT_GF_RTC_NB; i++) {
181         dev = qdev_new(TYPE_GOLDFISH_RTC);
182         qdev_prop_set_bit(dev, "big-endian", true);
183         sysbus = SYS_BUS_DEVICE(dev);
184         sysbus_realize_and_unref(sysbus, &error_fatal);
185         sysbus_mmio_map(sysbus, 0, io_base);
186         sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i));
187 
188         io_base += 0x1000;
189     }
190 
191     /* goldfish-tty */
192     dev = qdev_new(TYPE_GOLDFISH_TTY);
193     sysbus = SYS_BUS_DEVICE(dev);
194     qdev_prop_set_chr(dev, "chardev", serial_hd(0));
195     sysbus_realize_and_unref(sysbus, &error_fatal);
196     sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE);
197     sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE));
198 
199     /* virt controller */
200     dev = qdev_new(TYPE_VIRT_CTRL);
201     sysbus = SYS_BUS_DEVICE(dev);
202     sysbus_realize_and_unref(sysbus, &error_fatal);
203     sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE);
204     sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE));
205 
206     /* virtio-mmio */
207     io_base = VIRT_VIRTIO_MMIO_BASE;
208     for (i = 0; i < 128; i++) {
209         dev = qdev_new(TYPE_VIRTIO_MMIO);
210         qdev_prop_set_bit(dev, "force-legacy", false);
211         sysbus = SYS_BUS_DEVICE(dev);
212         sysbus_realize_and_unref(sysbus, &error_fatal);
213         sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i));
214         sysbus_mmio_map(sysbus, 0, io_base);
215         io_base += 0x200;
216     }
217 
218     if (kernel_filename) {
219         CPUState *cs = CPU(cpu);
220         uint64_t high;
221         void *param_blob, *param_ptr, *param_rng_seed;
222 
223         if (kernel_cmdline) {
224             param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
225         } else {
226             param_blob = g_malloc(1024);
227         }
228 
229         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
230                                &elf_entry, NULL, &high, NULL, 1,
231                                EM_68K, 0, 0);
232         if (kernel_size < 0) {
233             error_report("could not load kernel '%s'", kernel_filename);
234             exit(1);
235         }
236         reset_info->initial_pc = elf_entry;
237         parameters_base = (high + 1) & ~1;
238         param_ptr = param_blob;
239 
240         BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_VIRT);
241         BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
242         BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
243         BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
244         BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
245 
246         BOOTINFO1(param_ptr, BI_VIRT_QEMU_VERSION,
247                   ((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) |
248                    (QEMU_VERSION_MICRO << 8)));
249         BOOTINFO2(param_ptr, BI_VIRT_GF_PIC_BASE,
250                   VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE);
251         BOOTINFO2(param_ptr, BI_VIRT_GF_RTC_BASE,
252                   VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE);
253         BOOTINFO2(param_ptr, BI_VIRT_GF_TTY_BASE,
254                   VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE);
255         BOOTINFO2(param_ptr, BI_VIRT_CTRL_BASE,
256                   VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE);
257         BOOTINFO2(param_ptr, BI_VIRT_VIRTIO_BASE,
258                   VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE);
259 
260         if (kernel_cmdline) {
261             BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
262                         kernel_cmdline);
263         }
264 
265         /* Pass seed to RNG. */
266         param_rng_seed = param_ptr;
267         qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
268         BOOTINFODATA(param_ptr, BI_RNG_SEED,
269                      rng_seed, sizeof(rng_seed));
270 
271         /* load initrd */
272         if (initrd_filename) {
273             initrd_size = get_image_size(initrd_filename);
274             if (initrd_size < 0) {
275                 error_report("could not load initial ram disk '%s'",
276                              initrd_filename);
277                 exit(1);
278             }
279 
280             initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
281             load_image_targphys(initrd_filename, initrd_base,
282                                 ram_size - initrd_base);
283             BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
284                       initrd_size);
285         } else {
286             initrd_base = 0;
287             initrd_size = 0;
288         }
289         BOOTINFO0(param_ptr, BI_LAST);
290         rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
291                               parameters_base, cs->as);
292         reset_info->rng_seed = rom_ptr_for_as(cs->as, parameters_base,
293                                               param_ptr - param_blob) +
294                                (param_rng_seed - param_blob);
295         g_free(param_blob);
296     }
297 }
298 
299 static void virt_machine_class_init(ObjectClass *oc, void *data)
300 {
301     MachineClass *mc = MACHINE_CLASS(oc);
302     mc->desc = "QEMU M68K Virtual Machine";
303     mc->init = virt_init;
304     mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
305     mc->max_cpus = 1;
306     mc->no_floppy = 1;
307     mc->no_parallel = 1;
308     mc->default_ram_id = "m68k_virt.ram";
309 }
310 
311 static const TypeInfo virt_machine_info = {
312     .name       = MACHINE_TYPE_NAME("virt"),
313     .parent     = TYPE_MACHINE,
314     .abstract   = true,
315     .class_init = virt_machine_class_init,
316 };
317 
318 static void virt_machine_register_types(void)
319 {
320     type_register_static(&virt_machine_info);
321 }
322 
323 type_init(virt_machine_register_types)
324 
325 #define DEFINE_VIRT_MACHINE(major, minor, latest) \
326     static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
327                                                     void *data) \
328     { \
329         MachineClass *mc = MACHINE_CLASS(oc); \
330         virt_machine_##major##_##minor##_options(mc); \
331         mc->desc = "QEMU " # major "." # minor " M68K Virtual Machine"; \
332         if (latest) { \
333             mc->alias = "virt"; \
334         } \
335     } \
336     static const TypeInfo machvirt_##major##_##minor##_info = { \
337         .name = MACHINE_TYPE_NAME("virt-" # major "." # minor), \
338         .parent = MACHINE_TYPE_NAME("virt"), \
339         .class_init = virt_##major##_##minor##_class_init, \
340     }; \
341     static void machvirt_machine_##major##_##minor##_init(void) \
342     { \
343         type_register_static(&machvirt_##major##_##minor##_info); \
344     } \
345     type_init(machvirt_machine_##major##_##minor##_init);
346 
347 static void virt_machine_7_2_options(MachineClass *mc)
348 {
349 }
350 DEFINE_VIRT_MACHINE(7, 2, true)
351 
352 static void virt_machine_7_1_options(MachineClass *mc)
353 {
354     virt_machine_7_2_options(mc);
355     compat_props_add(mc->compat_props, hw_compat_7_1, hw_compat_7_1_len);
356 }
357 DEFINE_VIRT_MACHINE(7, 1, false)
358 
359 static void virt_machine_7_0_options(MachineClass *mc)
360 {
361     virt_machine_7_1_options(mc);
362     compat_props_add(mc->compat_props, hw_compat_7_0, hw_compat_7_0_len);
363 }
364 DEFINE_VIRT_MACHINE(7, 0, false)
365 
366 static void virt_machine_6_2_options(MachineClass *mc)
367 {
368     virt_machine_7_0_options(mc);
369     compat_props_add(mc->compat_props, hw_compat_6_2, hw_compat_6_2_len);
370 }
371 DEFINE_VIRT_MACHINE(6, 2, false)
372 
373 static void virt_machine_6_1_options(MachineClass *mc)
374 {
375     virt_machine_6_2_options(mc);
376     compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len);
377 }
378 DEFINE_VIRT_MACHINE(6, 1, false)
379 
380 static void virt_machine_6_0_options(MachineClass *mc)
381 {
382     virt_machine_6_1_options(mc);
383     compat_props_add(mc->compat_props, hw_compat_6_0, hw_compat_6_0_len);
384 }
385 DEFINE_VIRT_MACHINE(6, 0, false)
386