1 /* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qemu/units.h" 25 #include "qemu/datadir.h" 26 #include "qemu/guest-random.h" 27 #include "sysemu/sysemu.h" 28 #include "cpu.h" 29 #include "hw/boards.h" 30 #include "hw/or-irq.h" 31 #include "elf.h" 32 #include "hw/loader.h" 33 #include "ui/console.h" 34 #include "hw/char/escc.h" 35 #include "hw/sysbus.h" 36 #include "hw/scsi/esp.h" 37 #include "standard-headers/asm-m68k/bootinfo.h" 38 #include "standard-headers/asm-m68k/bootinfo-mac.h" 39 #include "bootinfo.h" 40 #include "hw/m68k/q800.h" 41 #include "hw/m68k/q800-glue.h" 42 #include "hw/misc/mac_via.h" 43 #include "hw/misc/djmemc.h" 44 #include "hw/input/adb.h" 45 #include "hw/nubus/mac-nubus-bridge.h" 46 #include "hw/display/macfb.h" 47 #include "hw/block/swim.h" 48 #include "net/net.h" 49 #include "qapi/error.h" 50 #include "qemu/error-report.h" 51 #include "sysemu/qtest.h" 52 #include "sysemu/runstate.h" 53 #include "sysemu/reset.h" 54 #include "migration/vmstate.h" 55 56 #define MACROM_ADDR 0x40800000 57 #define MACROM_SIZE 0x00100000 58 59 #define MACROM_FILENAME "MacROM.bin" 60 61 #define IO_BASE 0x50000000 62 #define IO_SLICE 0x00040000 63 #define IO_SLICE_MASK (IO_SLICE - 1) 64 #define IO_SIZE 0x04000000 65 66 #define VIA_BASE (IO_BASE + 0x00000) 67 #define SONIC_PROM_BASE (IO_BASE + 0x08000) 68 #define SONIC_BASE (IO_BASE + 0x0a000) 69 #define SCC_BASE (IO_BASE + 0x0c020) 70 #define DJMEMC_BASE (IO_BASE + 0x0e000) 71 #define ESP_BASE (IO_BASE + 0x10000) 72 #define ESP_PDMA (IO_BASE + 0x10100) 73 #define ASC_BASE (IO_BASE + 0x14000) 74 #define SWIM_BASE (IO_BASE + 0x1E000) 75 76 #define SONIC_PROM_SIZE 0x1000 77 78 /* 79 * the video base, whereas it a Nubus address, 80 * is needed by the kernel to have early display and 81 * thus provided by the bootloader 82 */ 83 #define VIDEO_BASE 0xf9000000 84 85 #define MAC_CLOCK 3686418 86 87 /* 88 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only 89 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800 90 */ 91 #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \ 92 BIT(0xe)) 93 94 /* Quadra 800 machine ID */ 95 #define Q800_MACHINE_ID 0xa55a2bad 96 97 98 static void main_cpu_reset(void *opaque) 99 { 100 M68kCPU *cpu = opaque; 101 CPUState *cs = CPU(cpu); 102 103 cpu_reset(cs); 104 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 105 cpu->env.pc = ldl_phys(cs->as, 4); 106 } 107 108 static void rerandomize_rng_seed(void *opaque) 109 { 110 struct bi_record *rng_seed = opaque; 111 qemu_guest_getrandom_nofail((void *)rng_seed->data + 2, 112 be16_to_cpu(*(uint16_t *)rng_seed->data)); 113 } 114 115 static uint8_t fake_mac_rom[] = { 116 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 117 118 /* offset: 0xa - mac_reset */ 119 120 /* via2[vDirB] |= VIA2B_vPower */ 121 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 122 0x10, 0x10, /* moveb %a0@,%d0 */ 123 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 124 0x10, 0x80, /* moveb %d0,%a0@ */ 125 126 /* via2[vBufB] &= ~VIA2B_vPower */ 127 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 128 0x10, 0x10, /* moveb %a0@,%d0 */ 129 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 130 0x10, 0x80, /* moveb %d0,%a0@ */ 131 132 /* while (true) ; */ 133 0x60, 0xFE /* bras [self] */ 134 }; 135 136 static MemTxResult macio_alias_read(void *opaque, hwaddr addr, uint64_t *data, 137 unsigned size, MemTxAttrs attrs) 138 { 139 MemTxResult r; 140 uint32_t val; 141 142 addr &= IO_SLICE_MASK; 143 addr |= IO_BASE; 144 145 switch (size) { 146 case 4: 147 val = address_space_ldl_be(&address_space_memory, addr, attrs, &r); 148 break; 149 case 2: 150 val = address_space_lduw_be(&address_space_memory, addr, attrs, &r); 151 break; 152 case 1: 153 val = address_space_ldub(&address_space_memory, addr, attrs, &r); 154 break; 155 default: 156 g_assert_not_reached(); 157 } 158 159 *data = val; 160 return r; 161 } 162 163 static MemTxResult macio_alias_write(void *opaque, hwaddr addr, uint64_t value, 164 unsigned size, MemTxAttrs attrs) 165 { 166 MemTxResult r; 167 168 addr &= IO_SLICE_MASK; 169 addr |= IO_BASE; 170 171 switch (size) { 172 case 4: 173 address_space_stl_be(&address_space_memory, addr, value, attrs, &r); 174 break; 175 case 2: 176 address_space_stw_be(&address_space_memory, addr, value, attrs, &r); 177 break; 178 case 1: 179 address_space_stb(&address_space_memory, addr, value, attrs, &r); 180 break; 181 default: 182 g_assert_not_reached(); 183 } 184 185 return r; 186 } 187 188 static const MemoryRegionOps macio_alias_ops = { 189 .read_with_attrs = macio_alias_read, 190 .write_with_attrs = macio_alias_write, 191 .endianness = DEVICE_BIG_ENDIAN, 192 .valid = { 193 .min_access_size = 1, 194 .max_access_size = 4, 195 }, 196 }; 197 198 static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size) 199 { 200 return Q800_MACHINE_ID; 201 } 202 203 static void machine_id_write(void *opaque, hwaddr addr, uint64_t val, 204 unsigned size) 205 { 206 return; 207 } 208 209 static const MemoryRegionOps machine_id_ops = { 210 .read = machine_id_read, 211 .write = machine_id_write, 212 .endianness = DEVICE_BIG_ENDIAN, 213 .valid = { 214 .min_access_size = 4, 215 .max_access_size = 4, 216 }, 217 }; 218 219 static void q800_machine_init(MachineState *machine) 220 { 221 Q800MachineState *m = Q800_MACHINE(machine); 222 int linux_boot; 223 int32_t kernel_size; 224 uint64_t elf_entry; 225 char *filename; 226 int bios_size; 227 ram_addr_t initrd_base; 228 int32_t initrd_size; 229 MemoryRegion *dp8393x_prom = g_new(MemoryRegion, 1); 230 uint8_t *prom; 231 int i, checksum; 232 MacFbMode *macfb_mode; 233 ram_addr_t ram_size = machine->ram_size; 234 const char *kernel_filename = machine->kernel_filename; 235 const char *initrd_filename = machine->initrd_filename; 236 const char *kernel_cmdline = machine->kernel_cmdline; 237 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 238 hwaddr parameters_base; 239 CPUState *cs; 240 DeviceState *dev; 241 SysBusESPState *sysbus_esp; 242 ESPState *esp; 243 SysBusDevice *sysbus; 244 BusState *adb_bus; 245 NubusBus *nubus; 246 DriveInfo *dinfo; 247 uint8_t rng_seed[32]; 248 249 linux_boot = (kernel_filename != NULL); 250 251 if (ram_size > 1 * GiB) { 252 error_report("Too much memory for this machine: %" PRId64 " MiB, " 253 "maximum 1024 MiB", ram_size / MiB); 254 exit(1); 255 } 256 257 /* init CPUs */ 258 object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type); 259 qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal); 260 qemu_register_reset(main_cpu_reset, &m->cpu); 261 262 /* RAM */ 263 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 264 265 /* 266 * Create container for all IO devices 267 */ 268 memory_region_init(&m->macio, OBJECT(machine), "mac-io", IO_SLICE); 269 memory_region_add_subregion(get_system_memory(), IO_BASE, &m->macio); 270 271 /* 272 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 273 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 274 */ 275 memory_region_init_io(&m->macio_alias, OBJECT(machine), &macio_alias_ops, 276 &m->macio, "mac-io.alias", IO_SIZE - IO_SLICE); 277 memory_region_add_subregion(get_system_memory(), IO_BASE + IO_SLICE, 278 &m->macio_alias); 279 280 memory_region_init_io(&m->machine_id, NULL, &machine_id_ops, NULL, 281 "Machine ID", 4); 282 memory_region_add_subregion(get_system_memory(), 0x5ffffffc, 283 &m->machine_id); 284 285 /* IRQ Glue */ 286 object_initialize_child(OBJECT(machine), "glue", &m->glue, TYPE_GLUE); 287 object_property_set_link(OBJECT(&m->glue), "cpu", OBJECT(&m->cpu), 288 &error_abort); 289 sysbus_realize(SYS_BUS_DEVICE(&m->glue), &error_fatal); 290 291 /* djMEMC memory controller */ 292 object_initialize_child(OBJECT(machine), "djmemc", &m->djmemc, 293 TYPE_DJMEMC); 294 sysbus = SYS_BUS_DEVICE(&m->djmemc); 295 sysbus_realize_and_unref(sysbus, &error_fatal); 296 memory_region_add_subregion(&m->macio, DJMEMC_BASE - IO_BASE, 297 sysbus_mmio_get_region(sysbus, 0)); 298 299 /* VIA 1 */ 300 object_initialize_child(OBJECT(machine), "via1", &m->via1, 301 TYPE_MOS6522_Q800_VIA1); 302 dinfo = drive_get(IF_MTD, 0, 0); 303 if (dinfo) { 304 qdev_prop_set_drive(DEVICE(&m->via1), "drive", 305 blk_by_legacy_dinfo(dinfo)); 306 } 307 sysbus = SYS_BUS_DEVICE(&m->via1); 308 sysbus_realize(sysbus, &error_fatal); 309 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE, 310 sysbus_mmio_get_region(sysbus, 1)); 311 sysbus_connect_irq(sysbus, 0, 312 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA1)); 313 /* A/UX mode */ 314 qdev_connect_gpio_out(DEVICE(&m->via1), 0, 315 qdev_get_gpio_in_named(DEVICE(&m->glue), 316 "auxmode", 0)); 317 318 adb_bus = qdev_get_child_bus(DEVICE(&m->via1), "adb.0"); 319 dev = qdev_new(TYPE_ADB_KEYBOARD); 320 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 321 dev = qdev_new(TYPE_ADB_MOUSE); 322 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 323 324 /* VIA 2 */ 325 object_initialize_child(OBJECT(machine), "via2", &m->via2, 326 TYPE_MOS6522_Q800_VIA2); 327 sysbus = SYS_BUS_DEVICE(&m->via2); 328 sysbus_realize(sysbus, &error_fatal); 329 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE + VIA_SIZE, 330 sysbus_mmio_get_region(sysbus, 1)); 331 sysbus_connect_irq(sysbus, 0, 332 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA2)); 333 334 /* MACSONIC */ 335 336 if (nb_nics > 1) { 337 error_report("q800 can only have one ethernet interface"); 338 exit(1); 339 } 340 341 qemu_check_nic_model(&nd_table[0], "dp83932"); 342 343 /* 344 * MacSonic driver needs an Apple MAC address 345 * Valid prefix are: 346 * 00:05:02 Apple 347 * 00:80:19 Dayna Communications, Inc. 348 * 00:A0:40 Apple 349 * 08:00:07 Apple 350 * (Q800 use the last one) 351 */ 352 nd_table[0].macaddr.a[0] = 0x08; 353 nd_table[0].macaddr.a[1] = 0x00; 354 nd_table[0].macaddr.a[2] = 0x07; 355 356 object_initialize_child(OBJECT(machine), "dp8393x", &m->dp8393x, 357 TYPE_DP8393X); 358 dev = DEVICE(&m->dp8393x); 359 qdev_set_nic_properties(dev, &nd_table[0]); 360 qdev_prop_set_uint8(dev, "it_shift", 2); 361 qdev_prop_set_bit(dev, "big_endian", true); 362 object_property_set_link(OBJECT(dev), "dma_mr", 363 OBJECT(get_system_memory()), &error_abort); 364 sysbus = SYS_BUS_DEVICE(dev); 365 sysbus_realize(sysbus, &error_fatal); 366 memory_region_add_subregion(&m->macio, SONIC_BASE - IO_BASE, 367 sysbus_mmio_get_region(sysbus, 0)); 368 sysbus_connect_irq(sysbus, 0, 369 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_SONIC)); 370 371 memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom", 372 SONIC_PROM_SIZE, &error_fatal); 373 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE, 374 dp8393x_prom); 375 376 /* Add MAC address with valid checksum to PROM */ 377 prom = memory_region_get_ram_ptr(dp8393x_prom); 378 checksum = 0; 379 for (i = 0; i < 6; i++) { 380 prom[i] = revbit8(nd_table[0].macaddr.a[i]); 381 checksum ^= prom[i]; 382 } 383 prom[7] = 0xff - checksum; 384 385 /* SCC */ 386 387 object_initialize_child(OBJECT(machine), "escc", &m->escc, 388 TYPE_ESCC); 389 dev = DEVICE(&m->escc); 390 qdev_prop_set_uint32(dev, "disabled", 0); 391 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 392 qdev_prop_set_uint32(dev, "it_shift", 1); 393 qdev_prop_set_bit(dev, "bit_swap", true); 394 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 395 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 396 qdev_prop_set_uint32(dev, "chnBtype", 0); 397 qdev_prop_set_uint32(dev, "chnAtype", 0); 398 sysbus = SYS_BUS_DEVICE(dev); 399 sysbus_realize(sysbus, &error_fatal); 400 401 /* Logically OR both its IRQs together */ 402 object_initialize_child(OBJECT(machine), "escc_orgate", &m->escc_orgate, 403 TYPE_OR_IRQ); 404 object_property_set_int(OBJECT(&m->escc_orgate), "num-lines", 2, 405 &error_fatal); 406 dev = DEVICE(&m->escc_orgate); 407 qdev_realize(dev, NULL, &error_fatal); 408 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(dev, 0)); 409 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(dev, 1)); 410 qdev_connect_gpio_out(dev, 0, 411 qdev_get_gpio_in(DEVICE(&m->glue), 412 GLUE_IRQ_IN_ESCC)); 413 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE, 414 sysbus_mmio_get_region(sysbus, 0)); 415 416 /* SCSI */ 417 418 object_initialize_child(OBJECT(machine), "esp", &m->esp, 419 TYPE_SYSBUS_ESP); 420 sysbus_esp = SYSBUS_ESP(&m->esp); 421 esp = &sysbus_esp->esp; 422 esp->dma_memory_read = NULL; 423 esp->dma_memory_write = NULL; 424 esp->dma_opaque = NULL; 425 sysbus_esp->it_shift = 4; 426 esp->dma_enabled = 1; 427 428 sysbus = SYS_BUS_DEVICE(&m->esp); 429 sysbus_realize(sysbus, &error_fatal); 430 /* SCSI and SCSI data IRQs are negative edge triggered */ 431 sysbus_connect_irq(sysbus, 0, 432 qemu_irq_invert( 433 qdev_get_gpio_in(DEVICE(&m->via2), 434 VIA2_IRQ_SCSI_BIT))); 435 sysbus_connect_irq(sysbus, 1, 436 qemu_irq_invert( 437 qdev_get_gpio_in(DEVICE(&m->via2), 438 VIA2_IRQ_SCSI_DATA_BIT))); 439 memory_region_add_subregion(&m->macio, ESP_BASE - IO_BASE, 440 sysbus_mmio_get_region(sysbus, 0)); 441 memory_region_add_subregion(&m->macio, ESP_PDMA - IO_BASE, 442 sysbus_mmio_get_region(sysbus, 1)); 443 444 scsi_bus_legacy_handle_cmdline(&esp->bus); 445 446 /* SWIM floppy controller */ 447 448 object_initialize_child(OBJECT(machine), "swim", &m->swim, 449 TYPE_SWIM); 450 sysbus = SYS_BUS_DEVICE(&m->swim); 451 sysbus_realize(sysbus, &error_fatal); 452 memory_region_add_subregion(&m->macio, SWIM_BASE - IO_BASE, 453 sysbus_mmio_get_region(sysbus, 0)); 454 455 /* NuBus */ 456 457 object_initialize_child(OBJECT(machine), "mac-nubus-bridge", 458 &m->mac_nubus_bridge, 459 TYPE_MAC_NUBUS_BRIDGE); 460 sysbus = SYS_BUS_DEVICE(&m->mac_nubus_bridge); 461 dev = DEVICE(&m->mac_nubus_bridge); 462 qdev_prop_set_uint32(DEVICE(&m->mac_nubus_bridge), "slot-available-mask", 463 Q800_NUBUS_SLOTS_AVAILABLE); 464 sysbus_realize(sysbus, &error_fatal); 465 memory_region_add_subregion(get_system_memory(), 466 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE, 467 sysbus_mmio_get_region(sysbus, 0)); 468 memory_region_add_subregion(get_system_memory(), 469 NUBUS_SLOT_BASE + 470 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE, 471 sysbus_mmio_get_region(sysbus, 1)); 472 qdev_connect_gpio_out(dev, 9, 473 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq", 474 VIA2_NUBUS_IRQ_INTVIDEO)); 475 for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) { 476 qdev_connect_gpio_out(dev, 9 + i, 477 qdev_get_gpio_in_named(DEVICE(&m->via2), 478 "nubus-irq", 479 VIA2_NUBUS_IRQ_9 + i)); 480 } 481 482 /* 483 * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused 484 * IRQ via GLUE for use by SONIC Ethernet in classic mode 485 */ 486 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_NUBUS_9, 487 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq", 488 VIA2_NUBUS_IRQ_9)); 489 490 nubus = NUBUS_BUS(qdev_get_child_bus(dev, "nubus-bus.0")); 491 492 /* framebuffer in nubus slot #9 */ 493 494 object_initialize_child(OBJECT(machine), "macfb", &m->macfb, 495 TYPE_NUBUS_MACFB); 496 dev = DEVICE(&m->macfb); 497 qdev_prop_set_uint32(dev, "slot", 9); 498 qdev_prop_set_uint32(dev, "width", graphic_width); 499 qdev_prop_set_uint32(dev, "height", graphic_height); 500 qdev_prop_set_uint8(dev, "depth", graphic_depth); 501 if (graphic_width == 1152 && graphic_height == 870) { 502 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR); 503 } else { 504 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA); 505 } 506 qdev_realize(dev, BUS(nubus), &error_fatal); 507 508 macfb_mode = (NUBUS_MACFB(dev)->macfb).mode; 509 510 cs = CPU(&m->cpu); 511 if (linux_boot) { 512 uint64_t high; 513 void *param_blob, *param_ptr, *param_rng_seed; 514 515 if (kernel_cmdline) { 516 param_blob = g_malloc(strlen(kernel_cmdline) + 1024); 517 } else { 518 param_blob = g_malloc(1024); 519 } 520 521 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 522 &elf_entry, NULL, &high, NULL, 1, 523 EM_68K, 0, 0); 524 if (kernel_size < 0) { 525 error_report("could not load kernel '%s'", kernel_filename); 526 exit(1); 527 } 528 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 529 parameters_base = (high + 1) & ~1; 530 param_ptr = param_blob; 531 532 BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC); 533 BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040); 534 BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040); 535 BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040); 536 BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040); 537 BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800); 538 BOOTINFO1(param_ptr, 539 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 540 BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size); 541 BOOTINFO1(param_ptr, BI_MAC_VADDR, 542 VIDEO_BASE + macfb_mode->offset); 543 BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth); 544 BOOTINFO1(param_ptr, BI_MAC_VDIM, 545 (graphic_height << 16) | graphic_width); 546 BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride); 547 BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE); 548 549 memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom", 550 sizeof(fake_mac_rom), fake_mac_rom); 551 memory_region_set_readonly(&m->rom, true); 552 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom); 553 554 if (kernel_cmdline) { 555 BOOTINFOSTR(param_ptr, BI_COMMAND_LINE, 556 kernel_cmdline); 557 } 558 559 /* Pass seed to RNG. */ 560 param_rng_seed = param_ptr; 561 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed)); 562 BOOTINFODATA(param_ptr, BI_RNG_SEED, 563 rng_seed, sizeof(rng_seed)); 564 565 /* load initrd */ 566 if (initrd_filename) { 567 initrd_size = get_image_size(initrd_filename); 568 if (initrd_size < 0) { 569 error_report("could not load initial ram disk '%s'", 570 initrd_filename); 571 exit(1); 572 } 573 574 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 575 load_image_targphys(initrd_filename, initrd_base, 576 ram_size - initrd_base); 577 BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base, 578 initrd_size); 579 } else { 580 initrd_base = 0; 581 initrd_size = 0; 582 } 583 BOOTINFO0(param_ptr, BI_LAST); 584 rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob, 585 parameters_base, cs->as); 586 qemu_register_reset_nosnapshotload(rerandomize_rng_seed, 587 rom_ptr_for_as(cs->as, parameters_base, 588 param_ptr - param_blob) + 589 (param_rng_seed - param_blob)); 590 g_free(param_blob); 591 } else { 592 uint8_t *ptr; 593 /* allocate and load BIOS */ 594 memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE, 595 &error_abort); 596 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 597 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom); 598 599 /* Load MacROM binary */ 600 if (filename) { 601 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 602 g_free(filename); 603 } else { 604 bios_size = -1; 605 } 606 607 /* Remove qtest_enabled() check once firmware files are in the tree */ 608 if (!qtest_enabled()) { 609 if (bios_size <= 0 || bios_size > MACROM_SIZE) { 610 error_report("could not load MacROM '%s'", bios_name); 611 exit(1); 612 } 613 614 ptr = rom_ptr(MACROM_ADDR, bios_size); 615 assert(ptr != NULL); 616 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ 617 stl_phys(cs->as, 4, 618 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ 619 } 620 } 621 } 622 623 static GlobalProperty hw_compat_q800[] = { 624 { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" }, 625 { "scsi-hd", "vendor", " SEAGATE" }, 626 { "scsi-hd", "product", " ST225N" }, 627 { "scsi-hd", "ver", "1.0 " }, 628 { "scsi-cd", "quirk_mode_page_apple_vendor", "on" }, 629 { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" }, 630 { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" }, 631 { "scsi-cd", "quirk_mode_page_truncated", "on" }, 632 { "scsi-cd", "vendor", "MATSHITA" }, 633 { "scsi-cd", "product", "CD-ROM CR-8005" }, 634 { "scsi-cd", "ver", "1.0k" }, 635 }; 636 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800); 637 638 static const char *q800_machine_valid_cpu_types[] = { 639 M68K_CPU_TYPE_NAME("m68040"), 640 NULL 641 }; 642 643 static void q800_machine_class_init(ObjectClass *oc, void *data) 644 { 645 MachineClass *mc = MACHINE_CLASS(oc); 646 647 mc->desc = "Macintosh Quadra 800"; 648 mc->init = q800_machine_init; 649 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 650 mc->valid_cpu_types = q800_machine_valid_cpu_types; 651 mc->max_cpus = 1; 652 mc->block_default_type = IF_SCSI; 653 mc->default_ram_id = "m68k_mac.ram"; 654 compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len); 655 } 656 657 static const TypeInfo q800_machine_typeinfo = { 658 .name = MACHINE_TYPE_NAME("q800"), 659 .parent = TYPE_MACHINE, 660 .instance_size = sizeof(Q800MachineState), 661 .class_init = q800_machine_class_init, 662 }; 663 664 static void q800_machine_register_types(void) 665 { 666 type_register_static(&q800_machine_typeinfo); 667 } 668 669 type_init(q800_machine_register_types) 670