1 /* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qemu/units.h" 25 #include "qemu/datadir.h" 26 #include "qemu/guest-random.h" 27 #include "sysemu/sysemu.h" 28 #include "cpu.h" 29 #include "hw/boards.h" 30 #include "hw/or-irq.h" 31 #include "elf.h" 32 #include "hw/loader.h" 33 #include "ui/console.h" 34 #include "hw/char/escc.h" 35 #include "hw/sysbus.h" 36 #include "hw/scsi/esp.h" 37 #include "standard-headers/asm-m68k/bootinfo.h" 38 #include "standard-headers/asm-m68k/bootinfo-mac.h" 39 #include "bootinfo.h" 40 #include "hw/m68k/q800.h" 41 #include "hw/m68k/q800-glue.h" 42 #include "hw/misc/mac_via.h" 43 #include "hw/misc/djmemc.h" 44 #include "hw/misc/iosb.h" 45 #include "hw/input/adb.h" 46 #include "hw/audio/asc.h" 47 #include "hw/nubus/mac-nubus-bridge.h" 48 #include "hw/display/macfb.h" 49 #include "hw/block/swim.h" 50 #include "net/net.h" 51 #include "qapi/error.h" 52 #include "qemu/error-report.h" 53 #include "sysemu/qtest.h" 54 #include "sysemu/runstate.h" 55 #include "sysemu/reset.h" 56 #include "migration/vmstate.h" 57 58 #define MACROM_ADDR 0x40800000 59 #define MACROM_SIZE 0x00100000 60 61 #define MACROM_FILENAME "MacROM.bin" 62 63 #define IO_BASE 0x50000000 64 #define IO_SLICE 0x00040000 65 #define IO_SLICE_MASK (IO_SLICE - 1) 66 #define IO_SIZE 0x04000000 67 68 #define VIA_BASE (IO_BASE + 0x00000) 69 #define SONIC_PROM_BASE (IO_BASE + 0x08000) 70 #define SONIC_BASE (IO_BASE + 0x0a000) 71 #define SCC_BASE (IO_BASE + 0x0c020) 72 #define DJMEMC_BASE (IO_BASE + 0x0e000) 73 #define ESP_BASE (IO_BASE + 0x10000) 74 #define ESP_PDMA (IO_BASE + 0x10100) 75 #define ASC_BASE (IO_BASE + 0x14000) 76 #define IOSB_BASE (IO_BASE + 0x18000) 77 #define SWIM_BASE (IO_BASE + 0x1E000) 78 79 #define SONIC_PROM_SIZE 0x1000 80 81 /* 82 * the video base, whereas it a Nubus address, 83 * is needed by the kernel to have early display and 84 * thus provided by the bootloader 85 */ 86 #define VIDEO_BASE 0xf9000000 87 88 #define MAC_CLOCK 3686418 89 90 /* Size of whole RAM area */ 91 #define RAM_SIZE 0x40000000 92 93 /* 94 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only 95 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800 96 */ 97 #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \ 98 BIT(0xe)) 99 100 /* Quadra 800 machine ID */ 101 #define Q800_MACHINE_ID 0xa55a2bad 102 103 104 static void main_cpu_reset(void *opaque) 105 { 106 M68kCPU *cpu = opaque; 107 CPUState *cs = CPU(cpu); 108 109 cpu_reset(cs); 110 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 111 cpu->env.pc = ldl_phys(cs->as, 4); 112 } 113 114 static void rerandomize_rng_seed(void *opaque) 115 { 116 struct bi_record *rng_seed = opaque; 117 qemu_guest_getrandom_nofail((void *)rng_seed->data + 2, 118 be16_to_cpu(*(uint16_t *)rng_seed->data)); 119 } 120 121 static uint8_t fake_mac_rom[] = { 122 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 123 124 /* offset: 0xa - mac_reset */ 125 126 /* via2[vDirB] |= VIA2B_vPower */ 127 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 128 0x10, 0x10, /* moveb %a0@,%d0 */ 129 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 130 0x10, 0x80, /* moveb %d0,%a0@ */ 131 132 /* via2[vBufB] &= ~VIA2B_vPower */ 133 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 134 0x10, 0x10, /* moveb %a0@,%d0 */ 135 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 136 0x10, 0x80, /* moveb %d0,%a0@ */ 137 138 /* while (true) ; */ 139 0x60, 0xFE /* bras [self] */ 140 }; 141 142 static MemTxResult macio_alias_read(void *opaque, hwaddr addr, uint64_t *data, 143 unsigned size, MemTxAttrs attrs) 144 { 145 MemTxResult r; 146 uint32_t val; 147 148 addr &= IO_SLICE_MASK; 149 addr |= IO_BASE; 150 151 switch (size) { 152 case 4: 153 val = address_space_ldl_be(&address_space_memory, addr, attrs, &r); 154 break; 155 case 2: 156 val = address_space_lduw_be(&address_space_memory, addr, attrs, &r); 157 break; 158 case 1: 159 val = address_space_ldub(&address_space_memory, addr, attrs, &r); 160 break; 161 default: 162 g_assert_not_reached(); 163 } 164 165 *data = val; 166 return r; 167 } 168 169 static MemTxResult macio_alias_write(void *opaque, hwaddr addr, uint64_t value, 170 unsigned size, MemTxAttrs attrs) 171 { 172 MemTxResult r; 173 174 addr &= IO_SLICE_MASK; 175 addr |= IO_BASE; 176 177 switch (size) { 178 case 4: 179 address_space_stl_be(&address_space_memory, addr, value, attrs, &r); 180 break; 181 case 2: 182 address_space_stw_be(&address_space_memory, addr, value, attrs, &r); 183 break; 184 case 1: 185 address_space_stb(&address_space_memory, addr, value, attrs, &r); 186 break; 187 default: 188 g_assert_not_reached(); 189 } 190 191 return r; 192 } 193 194 static const MemoryRegionOps macio_alias_ops = { 195 .read_with_attrs = macio_alias_read, 196 .write_with_attrs = macio_alias_write, 197 .endianness = DEVICE_BIG_ENDIAN, 198 .valid = { 199 .min_access_size = 1, 200 .max_access_size = 4, 201 }, 202 }; 203 204 static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size) 205 { 206 return Q800_MACHINE_ID; 207 } 208 209 static void machine_id_write(void *opaque, hwaddr addr, uint64_t val, 210 unsigned size) 211 { 212 return; 213 } 214 215 static const MemoryRegionOps machine_id_ops = { 216 .read = machine_id_read, 217 .write = machine_id_write, 218 .endianness = DEVICE_BIG_ENDIAN, 219 .valid = { 220 .min_access_size = 4, 221 .max_access_size = 4, 222 }, 223 }; 224 225 static uint64_t ramio_read(void *opaque, hwaddr addr, unsigned size) 226 { 227 return 0x0; 228 } 229 230 static void ramio_write(void *opaque, hwaddr addr, uint64_t val, 231 unsigned size) 232 { 233 return; 234 } 235 236 static const MemoryRegionOps ramio_ops = { 237 .read = ramio_read, 238 .write = ramio_write, 239 .endianness = DEVICE_BIG_ENDIAN, 240 .valid = { 241 .min_access_size = 1, 242 .max_access_size = 4, 243 }, 244 }; 245 246 static void q800_machine_init(MachineState *machine) 247 { 248 Q800MachineState *m = Q800_MACHINE(machine); 249 int linux_boot; 250 int32_t kernel_size; 251 uint64_t elf_entry; 252 char *filename; 253 int bios_size; 254 ram_addr_t initrd_base; 255 int32_t initrd_size; 256 MemoryRegion *dp8393x_prom = g_new(MemoryRegion, 1); 257 uint8_t *prom; 258 int i, checksum; 259 MacFbMode *macfb_mode; 260 ram_addr_t ram_size = machine->ram_size; 261 const char *kernel_filename = machine->kernel_filename; 262 const char *initrd_filename = machine->initrd_filename; 263 const char *kernel_cmdline = machine->kernel_cmdline; 264 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 265 hwaddr parameters_base; 266 CPUState *cs; 267 DeviceState *dev; 268 SysBusESPState *sysbus_esp; 269 ESPState *esp; 270 SysBusDevice *sysbus; 271 BusState *adb_bus; 272 NubusBus *nubus; 273 DriveInfo *dinfo; 274 uint8_t rng_seed[32]; 275 276 linux_boot = (kernel_filename != NULL); 277 278 if (ram_size > 1 * GiB) { 279 error_report("Too much memory for this machine: %" PRId64 " MiB, " 280 "maximum 1024 MiB", ram_size / MiB); 281 exit(1); 282 } 283 284 /* init CPUs */ 285 object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type); 286 qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal); 287 qemu_register_reset(main_cpu_reset, &m->cpu); 288 289 /* RAM */ 290 memory_region_init_io(&m->ramio, OBJECT(machine), &ramio_ops, &m->ramio, 291 "ram", RAM_SIZE); 292 memory_region_add_subregion(get_system_memory(), 0x0, &m->ramio); 293 294 memory_region_add_subregion(&m->ramio, 0, machine->ram); 295 296 /* 297 * Create container for all IO devices 298 */ 299 memory_region_init(&m->macio, OBJECT(machine), "mac-io", IO_SLICE); 300 memory_region_add_subregion(get_system_memory(), IO_BASE, &m->macio); 301 302 /* 303 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 304 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 305 */ 306 memory_region_init_io(&m->macio_alias, OBJECT(machine), &macio_alias_ops, 307 &m->macio, "mac-io.alias", IO_SIZE - IO_SLICE); 308 memory_region_add_subregion(get_system_memory(), IO_BASE + IO_SLICE, 309 &m->macio_alias); 310 311 memory_region_init_io(&m->machine_id, NULL, &machine_id_ops, NULL, 312 "Machine ID", 4); 313 memory_region_add_subregion(get_system_memory(), 0x5ffffffc, 314 &m->machine_id); 315 316 /* IRQ Glue */ 317 object_initialize_child(OBJECT(machine), "glue", &m->glue, TYPE_GLUE); 318 object_property_set_link(OBJECT(&m->glue), "cpu", OBJECT(&m->cpu), 319 &error_abort); 320 sysbus_realize(SYS_BUS_DEVICE(&m->glue), &error_fatal); 321 322 /* djMEMC memory controller */ 323 object_initialize_child(OBJECT(machine), "djmemc", &m->djmemc, 324 TYPE_DJMEMC); 325 sysbus = SYS_BUS_DEVICE(&m->djmemc); 326 sysbus_realize_and_unref(sysbus, &error_fatal); 327 memory_region_add_subregion(&m->macio, DJMEMC_BASE - IO_BASE, 328 sysbus_mmio_get_region(sysbus, 0)); 329 330 /* IOSB subsystem */ 331 object_initialize_child(OBJECT(machine), "iosb", &m->iosb, TYPE_IOSB); 332 sysbus = SYS_BUS_DEVICE(&m->iosb); 333 sysbus_realize_and_unref(sysbus, &error_fatal); 334 memory_region_add_subregion(&m->macio, IOSB_BASE - IO_BASE, 335 sysbus_mmio_get_region(sysbus, 0)); 336 337 /* VIA 1 */ 338 object_initialize_child(OBJECT(machine), "via1", &m->via1, 339 TYPE_MOS6522_Q800_VIA1); 340 dinfo = drive_get(IF_MTD, 0, 0); 341 if (dinfo) { 342 qdev_prop_set_drive(DEVICE(&m->via1), "drive", 343 blk_by_legacy_dinfo(dinfo)); 344 } 345 sysbus = SYS_BUS_DEVICE(&m->via1); 346 sysbus_realize(sysbus, &error_fatal); 347 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE, 348 sysbus_mmio_get_region(sysbus, 1)); 349 sysbus_connect_irq(sysbus, 0, 350 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA1)); 351 /* A/UX mode */ 352 qdev_connect_gpio_out(DEVICE(&m->via1), 0, 353 qdev_get_gpio_in_named(DEVICE(&m->glue), 354 "auxmode", 0)); 355 356 adb_bus = qdev_get_child_bus(DEVICE(&m->via1), "adb.0"); 357 dev = qdev_new(TYPE_ADB_KEYBOARD); 358 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 359 dev = qdev_new(TYPE_ADB_MOUSE); 360 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 361 362 /* VIA 2 */ 363 object_initialize_child(OBJECT(machine), "via2", &m->via2, 364 TYPE_MOS6522_Q800_VIA2); 365 sysbus = SYS_BUS_DEVICE(&m->via2); 366 sysbus_realize(sysbus, &error_fatal); 367 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE + VIA_SIZE, 368 sysbus_mmio_get_region(sysbus, 1)); 369 sysbus_connect_irq(sysbus, 0, 370 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA2)); 371 372 /* MACSONIC */ 373 374 if (nb_nics > 1) { 375 error_report("q800 can only have one ethernet interface"); 376 exit(1); 377 } 378 379 qemu_check_nic_model(&nd_table[0], "dp83932"); 380 381 /* 382 * MacSonic driver needs an Apple MAC address 383 * Valid prefix are: 384 * 00:05:02 Apple 385 * 00:80:19 Dayna Communications, Inc. 386 * 00:A0:40 Apple 387 * 08:00:07 Apple 388 * (Q800 use the last one) 389 */ 390 nd_table[0].macaddr.a[0] = 0x08; 391 nd_table[0].macaddr.a[1] = 0x00; 392 nd_table[0].macaddr.a[2] = 0x07; 393 394 object_initialize_child(OBJECT(machine), "dp8393x", &m->dp8393x, 395 TYPE_DP8393X); 396 dev = DEVICE(&m->dp8393x); 397 qdev_set_nic_properties(dev, &nd_table[0]); 398 qdev_prop_set_uint8(dev, "it_shift", 2); 399 qdev_prop_set_bit(dev, "big_endian", true); 400 object_property_set_link(OBJECT(dev), "dma_mr", 401 OBJECT(get_system_memory()), &error_abort); 402 sysbus = SYS_BUS_DEVICE(dev); 403 sysbus_realize(sysbus, &error_fatal); 404 memory_region_add_subregion(&m->macio, SONIC_BASE - IO_BASE, 405 sysbus_mmio_get_region(sysbus, 0)); 406 sysbus_connect_irq(sysbus, 0, 407 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_SONIC)); 408 409 memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom", 410 SONIC_PROM_SIZE, &error_fatal); 411 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE, 412 dp8393x_prom); 413 414 /* Add MAC address with valid checksum to PROM */ 415 prom = memory_region_get_ram_ptr(dp8393x_prom); 416 checksum = 0; 417 for (i = 0; i < 6; i++) { 418 prom[i] = revbit8(nd_table[0].macaddr.a[i]); 419 checksum ^= prom[i]; 420 } 421 prom[7] = 0xff - checksum; 422 423 /* SCC */ 424 425 object_initialize_child(OBJECT(machine), "escc", &m->escc, 426 TYPE_ESCC); 427 dev = DEVICE(&m->escc); 428 qdev_prop_set_uint32(dev, "disabled", 0); 429 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 430 qdev_prop_set_uint32(dev, "it_shift", 1); 431 qdev_prop_set_bit(dev, "bit_swap", true); 432 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 433 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 434 qdev_prop_set_uint32(dev, "chnBtype", 0); 435 qdev_prop_set_uint32(dev, "chnAtype", 0); 436 sysbus = SYS_BUS_DEVICE(dev); 437 sysbus_realize(sysbus, &error_fatal); 438 439 /* Logically OR both its IRQs together */ 440 object_initialize_child(OBJECT(machine), "escc_orgate", &m->escc_orgate, 441 TYPE_OR_IRQ); 442 object_property_set_int(OBJECT(&m->escc_orgate), "num-lines", 2, 443 &error_fatal); 444 dev = DEVICE(&m->escc_orgate); 445 qdev_realize(dev, NULL, &error_fatal); 446 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(dev, 0)); 447 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(dev, 1)); 448 qdev_connect_gpio_out(dev, 0, 449 qdev_get_gpio_in(DEVICE(&m->glue), 450 GLUE_IRQ_IN_ESCC)); 451 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE, 452 sysbus_mmio_get_region(sysbus, 0)); 453 454 /* Create alias for NetBSD */ 455 memory_region_init_alias(&m->escc_alias, OBJECT(machine), "escc-alias", 456 sysbus_mmio_get_region(sysbus, 0), 0, 0x8); 457 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE - 0x20, 458 &m->escc_alias); 459 460 /* SCSI */ 461 462 object_initialize_child(OBJECT(machine), "esp", &m->esp, 463 TYPE_SYSBUS_ESP); 464 sysbus_esp = SYSBUS_ESP(&m->esp); 465 esp = &sysbus_esp->esp; 466 esp->dma_memory_read = NULL; 467 esp->dma_memory_write = NULL; 468 esp->dma_opaque = NULL; 469 sysbus_esp->it_shift = 4; 470 esp->dma_enabled = 1; 471 472 sysbus = SYS_BUS_DEVICE(&m->esp); 473 sysbus_realize(sysbus, &error_fatal); 474 /* SCSI and SCSI data IRQs are negative edge triggered */ 475 sysbus_connect_irq(sysbus, 0, 476 qemu_irq_invert( 477 qdev_get_gpio_in(DEVICE(&m->via2), 478 VIA2_IRQ_SCSI_BIT))); 479 sysbus_connect_irq(sysbus, 1, 480 qemu_irq_invert( 481 qdev_get_gpio_in(DEVICE(&m->via2), 482 VIA2_IRQ_SCSI_DATA_BIT))); 483 memory_region_add_subregion(&m->macio, ESP_BASE - IO_BASE, 484 sysbus_mmio_get_region(sysbus, 0)); 485 memory_region_add_subregion(&m->macio, ESP_PDMA - IO_BASE, 486 sysbus_mmio_get_region(sysbus, 1)); 487 488 scsi_bus_legacy_handle_cmdline(&esp->bus); 489 490 /* Apple Sound Chip */ 491 492 object_initialize_child(OBJECT(machine), "asc", &m->asc, TYPE_ASC); 493 qdev_prop_set_uint8(DEVICE(&m->asc), "asctype", m->easc ? ASC_TYPE_EASC 494 : ASC_TYPE_ASC); 495 if (machine->audiodev) { 496 qdev_prop_set_string(DEVICE(&m->asc), "audiodev", machine->audiodev); 497 } 498 sysbus = SYS_BUS_DEVICE(&m->asc); 499 sysbus_realize_and_unref(sysbus, &error_fatal); 500 memory_region_add_subregion(&m->macio, ASC_BASE - IO_BASE, 501 sysbus_mmio_get_region(sysbus, 0)); 502 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(DEVICE(&m->glue), 503 GLUE_IRQ_IN_ASC)); 504 505 /* Wire ASC IRQ via GLUE for use in classic mode */ 506 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_ASC, 507 qdev_get_gpio_in(DEVICE(&m->via2), 508 VIA2_IRQ_ASC_BIT)); 509 510 /* SWIM floppy controller */ 511 512 object_initialize_child(OBJECT(machine), "swim", &m->swim, 513 TYPE_SWIM); 514 sysbus = SYS_BUS_DEVICE(&m->swim); 515 sysbus_realize(sysbus, &error_fatal); 516 memory_region_add_subregion(&m->macio, SWIM_BASE - IO_BASE, 517 sysbus_mmio_get_region(sysbus, 0)); 518 519 /* NuBus */ 520 521 object_initialize_child(OBJECT(machine), "mac-nubus-bridge", 522 &m->mac_nubus_bridge, 523 TYPE_MAC_NUBUS_BRIDGE); 524 sysbus = SYS_BUS_DEVICE(&m->mac_nubus_bridge); 525 dev = DEVICE(&m->mac_nubus_bridge); 526 qdev_prop_set_uint32(DEVICE(&m->mac_nubus_bridge), "slot-available-mask", 527 Q800_NUBUS_SLOTS_AVAILABLE); 528 sysbus_realize(sysbus, &error_fatal); 529 memory_region_add_subregion(get_system_memory(), 530 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE, 531 sysbus_mmio_get_region(sysbus, 0)); 532 memory_region_add_subregion(get_system_memory(), 533 NUBUS_SLOT_BASE + 534 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE, 535 sysbus_mmio_get_region(sysbus, 1)); 536 qdev_connect_gpio_out(dev, 9, 537 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq", 538 VIA2_NUBUS_IRQ_INTVIDEO)); 539 for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) { 540 qdev_connect_gpio_out(dev, 9 + i, 541 qdev_get_gpio_in_named(DEVICE(&m->via2), 542 "nubus-irq", 543 VIA2_NUBUS_IRQ_9 + i)); 544 } 545 546 /* 547 * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused 548 * IRQ via GLUE for use by SONIC Ethernet in classic mode 549 */ 550 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_NUBUS_9, 551 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq", 552 VIA2_NUBUS_IRQ_9)); 553 554 nubus = NUBUS_BUS(qdev_get_child_bus(dev, "nubus-bus.0")); 555 556 /* framebuffer in nubus slot #9 */ 557 558 object_initialize_child(OBJECT(machine), "macfb", &m->macfb, 559 TYPE_NUBUS_MACFB); 560 dev = DEVICE(&m->macfb); 561 qdev_prop_set_uint32(dev, "slot", 9); 562 qdev_prop_set_uint32(dev, "width", graphic_width); 563 qdev_prop_set_uint32(dev, "height", graphic_height); 564 qdev_prop_set_uint8(dev, "depth", graphic_depth); 565 if (graphic_width == 1152 && graphic_height == 870) { 566 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR); 567 } else { 568 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA); 569 } 570 qdev_realize(dev, BUS(nubus), &error_fatal); 571 572 macfb_mode = (NUBUS_MACFB(dev)->macfb).mode; 573 574 cs = CPU(&m->cpu); 575 if (linux_boot) { 576 uint64_t high; 577 void *param_blob, *param_ptr, *param_rng_seed; 578 579 if (kernel_cmdline) { 580 param_blob = g_malloc(strlen(kernel_cmdline) + 1024); 581 } else { 582 param_blob = g_malloc(1024); 583 } 584 585 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 586 &elf_entry, NULL, &high, NULL, 1, 587 EM_68K, 0, 0); 588 if (kernel_size < 0) { 589 error_report("could not load kernel '%s'", kernel_filename); 590 exit(1); 591 } 592 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 593 parameters_base = (high + 1) & ~1; 594 param_ptr = param_blob; 595 596 BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC); 597 BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040); 598 BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040); 599 BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040); 600 BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040); 601 BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800); 602 BOOTINFO1(param_ptr, 603 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 604 BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size); 605 BOOTINFO1(param_ptr, BI_MAC_VADDR, 606 VIDEO_BASE + macfb_mode->offset); 607 BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth); 608 BOOTINFO1(param_ptr, BI_MAC_VDIM, 609 (graphic_height << 16) | graphic_width); 610 BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride); 611 BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE); 612 613 memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom", 614 sizeof(fake_mac_rom), fake_mac_rom); 615 memory_region_set_readonly(&m->rom, true); 616 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom); 617 618 if (kernel_cmdline) { 619 BOOTINFOSTR(param_ptr, BI_COMMAND_LINE, 620 kernel_cmdline); 621 } 622 623 /* Pass seed to RNG. */ 624 param_rng_seed = param_ptr; 625 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed)); 626 BOOTINFODATA(param_ptr, BI_RNG_SEED, 627 rng_seed, sizeof(rng_seed)); 628 629 /* load initrd */ 630 if (initrd_filename) { 631 initrd_size = get_image_size(initrd_filename); 632 if (initrd_size < 0) { 633 error_report("could not load initial ram disk '%s'", 634 initrd_filename); 635 exit(1); 636 } 637 638 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 639 load_image_targphys(initrd_filename, initrd_base, 640 ram_size - initrd_base); 641 BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base, 642 initrd_size); 643 } else { 644 initrd_base = 0; 645 initrd_size = 0; 646 } 647 BOOTINFO0(param_ptr, BI_LAST); 648 rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob, 649 parameters_base, cs->as); 650 qemu_register_reset_nosnapshotload(rerandomize_rng_seed, 651 rom_ptr_for_as(cs->as, parameters_base, 652 param_ptr - param_blob) + 653 (param_rng_seed - param_blob)); 654 g_free(param_blob); 655 } else { 656 uint8_t *ptr; 657 /* allocate and load BIOS */ 658 memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE, 659 &error_abort); 660 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 661 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom); 662 663 memory_region_init_alias(&m->rom_alias, NULL, "m68k_mac.rom-alias", 664 &m->rom, 0, MACROM_SIZE); 665 memory_region_add_subregion(get_system_memory(), 0x40000000, 666 &m->rom_alias); 667 668 /* Load MacROM binary */ 669 if (filename) { 670 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 671 g_free(filename); 672 } else { 673 bios_size = -1; 674 } 675 676 /* Remove qtest_enabled() check once firmware files are in the tree */ 677 if (!qtest_enabled()) { 678 if (bios_size <= 0 || bios_size > MACROM_SIZE) { 679 error_report("could not load MacROM '%s'", bios_name); 680 exit(1); 681 } 682 683 ptr = rom_ptr(MACROM_ADDR, bios_size); 684 assert(ptr != NULL); 685 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ 686 stl_phys(cs->as, 4, 687 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ 688 } 689 } 690 } 691 692 static bool q800_get_easc(Object *obj, Error **errp) 693 { 694 Q800MachineState *ms = Q800_MACHINE(obj); 695 696 return ms->easc; 697 } 698 699 static void q800_set_easc(Object *obj, bool value, Error **errp) 700 { 701 Q800MachineState *ms = Q800_MACHINE(obj); 702 703 ms->easc = value; 704 } 705 706 static void q800_init(Object *obj) 707 { 708 Q800MachineState *ms = Q800_MACHINE(obj); 709 710 /* Default to EASC */ 711 ms->easc = true; 712 } 713 714 static GlobalProperty hw_compat_q800[] = { 715 { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" }, 716 { "scsi-hd", "vendor", " SEAGATE" }, 717 { "scsi-hd", "product", " ST225N" }, 718 { "scsi-hd", "ver", "1.0 " }, 719 { "scsi-cd", "quirk_mode_page_apple_vendor", "on" }, 720 { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" }, 721 { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" }, 722 { "scsi-cd", "quirk_mode_page_truncated", "on" }, 723 { "scsi-cd", "vendor", "MATSHITA" }, 724 { "scsi-cd", "product", "CD-ROM CR-8005" }, 725 { "scsi-cd", "ver", "1.0k" }, 726 }; 727 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800); 728 729 static const char *q800_machine_valid_cpu_types[] = { 730 M68K_CPU_TYPE_NAME("m68040"), 731 NULL 732 }; 733 734 static void q800_machine_class_init(ObjectClass *oc, void *data) 735 { 736 MachineClass *mc = MACHINE_CLASS(oc); 737 738 mc->desc = "Macintosh Quadra 800"; 739 mc->init = q800_machine_init; 740 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 741 mc->valid_cpu_types = q800_machine_valid_cpu_types; 742 mc->max_cpus = 1; 743 mc->block_default_type = IF_SCSI; 744 mc->default_ram_id = "m68k_mac.ram"; 745 machine_add_audiodev_property(mc); 746 compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len); 747 748 object_class_property_add_bool(oc, "easc", q800_get_easc, q800_set_easc); 749 object_class_property_set_description(oc, "easc", 750 "Set to off to use ASC rather than EASC"); 751 } 752 753 static const TypeInfo q800_machine_typeinfo = { 754 .name = MACHINE_TYPE_NAME("q800"), 755 .parent = TYPE_MACHINE, 756 .instance_init = q800_init, 757 .instance_size = sizeof(Q800MachineState), 758 .class_init = q800_machine_class_init, 759 }; 760 761 static void q800_machine_register_types(void) 762 { 763 type_register_static(&q800_machine_typeinfo); 764 } 765 766 type_init(q800_machine_register_types) 767