1 /* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qemu/units.h" 25 #include "qemu-common.h" 26 #include "qemu/datadir.h" 27 #include "sysemu/sysemu.h" 28 #include "cpu.h" 29 #include "hw/hw.h" 30 #include "hw/boards.h" 31 #include "hw/irq.h" 32 #include "hw/or-irq.h" 33 #include "elf.h" 34 #include "hw/loader.h" 35 #include "ui/console.h" 36 #include "exec/address-spaces.h" 37 #include "hw/char/escc.h" 38 #include "hw/sysbus.h" 39 #include "hw/scsi/esp.h" 40 #include "bootinfo.h" 41 #include "hw/misc/mac_via.h" 42 #include "hw/input/adb.h" 43 #include "hw/nubus/mac-nubus-bridge.h" 44 #include "hw/display/macfb.h" 45 #include "hw/block/swim.h" 46 #include "net/net.h" 47 #include "qapi/error.h" 48 #include "sysemu/qtest.h" 49 #include "sysemu/runstate.h" 50 #include "sysemu/reset.h" 51 #include "migration/vmstate.h" 52 53 #define MACROM_ADDR 0x40800000 54 #define MACROM_SIZE 0x00100000 55 56 #define MACROM_FILENAME "MacROM.bin" 57 58 #define Q800_MACHINE_ID 35 59 #define Q800_CPU_ID (1 << 2) 60 #define Q800_FPU_ID (1 << 2) 61 #define Q800_MMU_ID (1 << 2) 62 63 #define MACH_MAC 3 64 #define Q800_MAC_CPU_ID 2 65 66 #define IO_BASE 0x50000000 67 #define IO_SLICE 0x00040000 68 #define IO_SIZE 0x04000000 69 70 #define VIA_BASE (IO_BASE + 0x00000) 71 #define SONIC_PROM_BASE (IO_BASE + 0x08000) 72 #define SONIC_BASE (IO_BASE + 0x0a000) 73 #define SCC_BASE (IO_BASE + 0x0c020) 74 #define ESP_BASE (IO_BASE + 0x10000) 75 #define ESP_PDMA (IO_BASE + 0x10100) 76 #define ASC_BASE (IO_BASE + 0x14000) 77 #define SWIM_BASE (IO_BASE + 0x1E000) 78 79 #define NUBUS_SUPER_SLOT_BASE 0x60000000 80 #define NUBUS_SLOT_BASE 0xf0000000 81 82 /* 83 * the video base, whereas it a Nubus address, 84 * is needed by the kernel to have early display and 85 * thus provided by the bootloader 86 */ 87 #define VIDEO_BASE 0xf9001000 88 89 #define MAC_CLOCK 3686418 90 91 /* 92 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip 93 * that performs a variety of functions (RAM management, clock generation, ...). 94 * The GLUE chip receives interrupt requests from various devices, 95 * assign priority to each, and asserts one or more interrupt line to the 96 * CPU. 97 */ 98 99 #define TYPE_GLUE "q800-glue" 100 OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE) 101 102 struct GLUEState { 103 SysBusDevice parent_obj; 104 M68kCPU *cpu; 105 uint8_t ipr; 106 }; 107 108 static void GLUE_set_irq(void *opaque, int irq, int level) 109 { 110 GLUEState *s = opaque; 111 int i; 112 113 if (level) { 114 s->ipr |= 1 << irq; 115 } else { 116 s->ipr &= ~(1 << irq); 117 } 118 119 for (i = 7; i >= 0; i--) { 120 if ((s->ipr >> i) & 1) { 121 m68k_set_irq_level(s->cpu, i + 1, i + 25); 122 return; 123 } 124 } 125 m68k_set_irq_level(s->cpu, 0, 0); 126 } 127 128 static void glue_reset(DeviceState *dev) 129 { 130 GLUEState *s = GLUE(dev); 131 132 s->ipr = 0; 133 } 134 135 static const VMStateDescription vmstate_glue = { 136 .name = "q800-glue", 137 .version_id = 0, 138 .minimum_version_id = 0, 139 .fields = (VMStateField[]) { 140 VMSTATE_UINT8(ipr, GLUEState), 141 VMSTATE_END_OF_LIST(), 142 }, 143 }; 144 145 /* 146 * If the m68k CPU implemented its inbound irq lines as GPIO lines 147 * rather than via the m68k_set_irq_level() function we would not need 148 * this cpu link property and could instead provide outbound IRQ lines 149 * that the board could wire up to the CPU. 150 */ 151 static Property glue_properties[] = { 152 DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), 153 DEFINE_PROP_END_OF_LIST(), 154 }; 155 156 static void glue_init(Object *obj) 157 { 158 DeviceState *dev = DEVICE(obj); 159 160 qdev_init_gpio_in(dev, GLUE_set_irq, 8); 161 } 162 163 static void glue_class_init(ObjectClass *klass, void *data) 164 { 165 DeviceClass *dc = DEVICE_CLASS(klass); 166 167 dc->vmsd = &vmstate_glue; 168 dc->reset = glue_reset; 169 device_class_set_props(dc, glue_properties); 170 } 171 172 static const TypeInfo glue_info = { 173 .name = TYPE_GLUE, 174 .parent = TYPE_SYS_BUS_DEVICE, 175 .instance_size = sizeof(GLUEState), 176 .instance_init = glue_init, 177 .class_init = glue_class_init, 178 }; 179 180 static void main_cpu_reset(void *opaque) 181 { 182 M68kCPU *cpu = opaque; 183 CPUState *cs = CPU(cpu); 184 185 cpu_reset(cs); 186 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 187 cpu->env.pc = ldl_phys(cs->as, 4); 188 } 189 190 static uint8_t fake_mac_rom[] = { 191 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 192 193 /* offset: 0xa - mac_reset */ 194 195 /* via2[vDirB] |= VIA2B_vPower */ 196 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 197 0x10, 0x10, /* moveb %a0@,%d0 */ 198 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 199 0x10, 0x80, /* moveb %d0,%a0@ */ 200 201 /* via2[vBufB] &= ~VIA2B_vPower */ 202 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 203 0x10, 0x10, /* moveb %a0@,%d0 */ 204 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 205 0x10, 0x80, /* moveb %d0,%a0@ */ 206 207 /* while (true) ; */ 208 0x60, 0xFE /* bras [self] */ 209 }; 210 211 static void q800_init(MachineState *machine) 212 { 213 M68kCPU *cpu = NULL; 214 int linux_boot; 215 int32_t kernel_size; 216 uint64_t elf_entry; 217 char *filename; 218 int bios_size; 219 ram_addr_t initrd_base; 220 int32_t initrd_size; 221 MemoryRegion *rom; 222 MemoryRegion *io; 223 const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1; 224 int i; 225 ram_addr_t ram_size = machine->ram_size; 226 const char *kernel_filename = machine->kernel_filename; 227 const char *initrd_filename = machine->initrd_filename; 228 const char *kernel_cmdline = machine->kernel_cmdline; 229 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 230 hwaddr parameters_base; 231 CPUState *cs; 232 DeviceState *dev; 233 DeviceState *via_dev; 234 DeviceState *escc_orgate; 235 SysBusESPState *sysbus_esp; 236 ESPState *esp; 237 SysBusDevice *sysbus; 238 BusState *adb_bus; 239 NubusBus *nubus; 240 DeviceState *glue; 241 DriveInfo *dinfo; 242 243 linux_boot = (kernel_filename != NULL); 244 245 if (ram_size > 1 * GiB) { 246 error_report("Too much memory for this machine: %" PRId64 " MiB, " 247 "maximum 1024 MiB", ram_size / MiB); 248 exit(1); 249 } 250 251 /* init CPUs */ 252 cpu = M68K_CPU(cpu_create(machine->cpu_type)); 253 qemu_register_reset(main_cpu_reset, cpu); 254 255 /* RAM */ 256 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 257 258 /* 259 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 260 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 261 */ 262 io = g_new(MemoryRegion, io_slice_nb); 263 for (i = 0; i < io_slice_nb; i++) { 264 char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1); 265 266 memory_region_init_alias(&io[i], NULL, name, get_system_memory(), 267 IO_BASE, IO_SLICE); 268 memory_region_add_subregion(get_system_memory(), 269 IO_BASE + (i + 1) * IO_SLICE, &io[i]); 270 g_free(name); 271 } 272 273 /* IRQ Glue */ 274 glue = qdev_new(TYPE_GLUE); 275 object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort); 276 sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal); 277 278 /* VIA */ 279 280 via_dev = qdev_new(TYPE_MAC_VIA); 281 dinfo = drive_get(IF_MTD, 0, 0); 282 if (dinfo) { 283 qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo)); 284 } 285 sysbus = SYS_BUS_DEVICE(via_dev); 286 sysbus_realize_and_unref(sysbus, &error_fatal); 287 sysbus_mmio_map(sysbus, 0, VIA_BASE); 288 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, 289 qdev_get_gpio_in(glue, 0)); 290 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, 291 qdev_get_gpio_in(glue, 1)); 292 293 294 adb_bus = qdev_get_child_bus(via_dev, "adb.0"); 295 dev = qdev_new(TYPE_ADB_KEYBOARD); 296 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 297 dev = qdev_new(TYPE_ADB_MOUSE); 298 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 299 300 /* MACSONIC */ 301 302 if (nb_nics > 1) { 303 error_report("q800 can only have one ethernet interface"); 304 exit(1); 305 } 306 307 qemu_check_nic_model(&nd_table[0], "dp83932"); 308 309 /* 310 * MacSonic driver needs an Apple MAC address 311 * Valid prefix are: 312 * 00:05:02 Apple 313 * 00:80:19 Dayna Communications, Inc. 314 * 00:A0:40 Apple 315 * 08:00:07 Apple 316 * (Q800 use the last one) 317 */ 318 nd_table[0].macaddr.a[0] = 0x08; 319 nd_table[0].macaddr.a[1] = 0x00; 320 nd_table[0].macaddr.a[2] = 0x07; 321 322 dev = qdev_new("dp8393x"); 323 qdev_set_nic_properties(dev, &nd_table[0]); 324 qdev_prop_set_uint8(dev, "it_shift", 2); 325 qdev_prop_set_bit(dev, "big_endian", true); 326 object_property_set_link(OBJECT(dev), "dma_mr", 327 OBJECT(get_system_memory()), &error_abort); 328 sysbus = SYS_BUS_DEVICE(dev); 329 sysbus_realize_and_unref(sysbus, &error_fatal); 330 sysbus_mmio_map(sysbus, 0, SONIC_BASE); 331 sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); 332 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); 333 334 /* SCC */ 335 336 dev = qdev_new(TYPE_ESCC); 337 qdev_prop_set_uint32(dev, "disabled", 0); 338 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 339 qdev_prop_set_uint32(dev, "it_shift", 1); 340 qdev_prop_set_bit(dev, "bit_swap", true); 341 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 342 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 343 qdev_prop_set_uint32(dev, "chnBtype", 0); 344 qdev_prop_set_uint32(dev, "chnAtype", 0); 345 sysbus = SYS_BUS_DEVICE(dev); 346 sysbus_realize_and_unref(sysbus, &error_fatal); 347 348 /* Logically OR both its IRQs together */ 349 escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); 350 object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); 351 qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); 352 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); 353 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); 354 qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3)); 355 sysbus_mmio_map(sysbus, 0, SCC_BASE); 356 357 /* SCSI */ 358 359 dev = qdev_new(TYPE_ESP); 360 sysbus_esp = ESP(dev); 361 esp = &sysbus_esp->esp; 362 esp->dma_memory_read = NULL; 363 esp->dma_memory_write = NULL; 364 esp->dma_opaque = NULL; 365 sysbus_esp->it_shift = 4; 366 esp->dma_enabled = 1; 367 368 sysbus = SYS_BUS_DEVICE(dev); 369 sysbus_realize_and_unref(sysbus, &error_fatal); 370 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev, 371 "via2-irq", 372 VIA2_IRQ_SCSI_BIT)); 373 sysbus_connect_irq(sysbus, 1, 374 qdev_get_gpio_in_named(via_dev, "via2-irq", 375 VIA2_IRQ_SCSI_DATA_BIT)); 376 sysbus_mmio_map(sysbus, 0, ESP_BASE); 377 sysbus_mmio_map(sysbus, 1, ESP_PDMA); 378 379 scsi_bus_legacy_handle_cmdline(&esp->bus); 380 381 /* SWIM floppy controller */ 382 383 dev = qdev_new(TYPE_SWIM); 384 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 385 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); 386 387 /* NuBus */ 388 389 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); 390 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 391 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE); 392 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE); 393 394 nubus = MAC_NUBUS_BRIDGE(dev)->bus; 395 396 /* framebuffer in nubus slot #9 */ 397 398 dev = qdev_new(TYPE_NUBUS_MACFB); 399 qdev_prop_set_uint32(dev, "width", graphic_width); 400 qdev_prop_set_uint32(dev, "height", graphic_height); 401 qdev_prop_set_uint8(dev, "depth", graphic_depth); 402 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); 403 404 cs = CPU(cpu); 405 if (linux_boot) { 406 uint64_t high; 407 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 408 &elf_entry, NULL, &high, NULL, 1, 409 EM_68K, 0, 0); 410 if (kernel_size < 0) { 411 error_report("could not load kernel '%s'", kernel_filename); 412 exit(1); 413 } 414 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 415 parameters_base = (high + 1) & ~1; 416 417 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC); 418 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, Q800_FPU_ID); 419 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, Q800_MMU_ID); 420 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, Q800_CPU_ID); 421 BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, Q800_MAC_CPU_ID); 422 BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, Q800_MACHINE_ID); 423 BOOTINFO1(cs->as, parameters_base, 424 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 425 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); 426 BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE); 427 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth); 428 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM, 429 (graphic_height << 16) | graphic_width); 430 BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW, 431 (graphic_width * graphic_depth + 7) / 8); 432 BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE); 433 434 rom = g_malloc(sizeof(*rom)); 435 memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", 436 sizeof(fake_mac_rom), fake_mac_rom); 437 memory_region_set_readonly(rom, true); 438 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 439 440 if (kernel_cmdline) { 441 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, 442 kernel_cmdline); 443 } 444 445 /* load initrd */ 446 if (initrd_filename) { 447 initrd_size = get_image_size(initrd_filename); 448 if (initrd_size < 0) { 449 error_report("could not load initial ram disk '%s'", 450 initrd_filename); 451 exit(1); 452 } 453 454 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 455 load_image_targphys(initrd_filename, initrd_base, 456 ram_size - initrd_base); 457 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, 458 initrd_size); 459 } else { 460 initrd_base = 0; 461 initrd_size = 0; 462 } 463 BOOTINFO0(cs->as, parameters_base, BI_LAST); 464 } else { 465 uint8_t *ptr; 466 /* allocate and load BIOS */ 467 rom = g_malloc(sizeof(*rom)); 468 memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE, 469 &error_abort); 470 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 471 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 472 473 /* Load MacROM binary */ 474 if (filename) { 475 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 476 g_free(filename); 477 } else { 478 bios_size = -1; 479 } 480 481 /* Remove qtest_enabled() check once firmware files are in the tree */ 482 if (!qtest_enabled()) { 483 if (bios_size < 0 || bios_size > MACROM_SIZE) { 484 error_report("could not load MacROM '%s'", bios_name); 485 exit(1); 486 } 487 488 ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE); 489 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ 490 stl_phys(cs->as, 4, 491 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ 492 } 493 } 494 } 495 496 static void q800_machine_class_init(ObjectClass *oc, void *data) 497 { 498 MachineClass *mc = MACHINE_CLASS(oc); 499 mc->desc = "Macintosh Quadra 800"; 500 mc->init = q800_init; 501 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 502 mc->max_cpus = 1; 503 mc->block_default_type = IF_SCSI; 504 mc->default_ram_id = "m68k_mac.ram"; 505 } 506 507 static const TypeInfo q800_machine_typeinfo = { 508 .name = MACHINE_TYPE_NAME("q800"), 509 .parent = TYPE_MACHINE, 510 .class_init = q800_machine_class_init, 511 }; 512 513 static void q800_machine_register_types(void) 514 { 515 type_register_static(&q800_machine_typeinfo); 516 type_register_static(&glue_info); 517 } 518 519 type_init(q800_machine_register_types) 520