xref: /openbmc/qemu/hw/m68k/q800.c (revision bad5cfcd)
1 /*
2  * QEMU Motorla 680x0 Macintosh hardware System Emulator
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20  * THE SOFTWARE.
21  */
22 
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu/datadir.h"
26 #include "qemu/guest-random.h"
27 #include "sysemu/sysemu.h"
28 #include "cpu.h"
29 #include "hw/boards.h"
30 #include "hw/or-irq.h"
31 #include "elf.h"
32 #include "hw/loader.h"
33 #include "ui/console.h"
34 #include "hw/char/escc.h"
35 #include "hw/sysbus.h"
36 #include "hw/scsi/esp.h"
37 #include "standard-headers/asm-m68k/bootinfo.h"
38 #include "standard-headers/asm-m68k/bootinfo-mac.h"
39 #include "bootinfo.h"
40 #include "hw/m68k/q800.h"
41 #include "hw/m68k/q800-glue.h"
42 #include "hw/misc/mac_via.h"
43 #include "hw/input/adb.h"
44 #include "hw/nubus/mac-nubus-bridge.h"
45 #include "hw/display/macfb.h"
46 #include "hw/block/swim.h"
47 #include "net/net.h"
48 #include "qapi/error.h"
49 #include "qemu/error-report.h"
50 #include "sysemu/qtest.h"
51 #include "sysemu/runstate.h"
52 #include "sysemu/reset.h"
53 #include "migration/vmstate.h"
54 
55 #define MACROM_ADDR     0x40800000
56 #define MACROM_SIZE     0x00100000
57 
58 #define MACROM_FILENAME "MacROM.bin"
59 
60 #define IO_BASE               0x50000000
61 #define IO_SLICE              0x00040000
62 #define IO_SLICE_MASK         (IO_SLICE - 1)
63 #define IO_SIZE               0x04000000
64 
65 #define VIA_BASE              (IO_BASE + 0x00000)
66 #define SONIC_PROM_BASE       (IO_BASE + 0x08000)
67 #define SONIC_BASE            (IO_BASE + 0x0a000)
68 #define SCC_BASE              (IO_BASE + 0x0c020)
69 #define ESP_BASE              (IO_BASE + 0x10000)
70 #define ESP_PDMA              (IO_BASE + 0x10100)
71 #define ASC_BASE              (IO_BASE + 0x14000)
72 #define SWIM_BASE             (IO_BASE + 0x1E000)
73 
74 #define SONIC_PROM_SIZE       0x1000
75 
76 /*
77  * the video base, whereas it a Nubus address,
78  * is needed by the kernel to have early display and
79  * thus provided by the bootloader
80  */
81 #define VIDEO_BASE            0xf9000000
82 
83 #define MAC_CLOCK  3686418
84 
85 /*
86  * Slot 0x9 is reserved for use by the in-built framebuffer whilst only
87  * slots 0xc, 0xd and 0xe physically exist on the Quadra 800
88  */
89 #define Q800_NUBUS_SLOTS_AVAILABLE    (BIT(0x9) | BIT(0xc) | BIT(0xd) | \
90                                        BIT(0xe))
91 
92 
93 static void main_cpu_reset(void *opaque)
94 {
95     M68kCPU *cpu = opaque;
96     CPUState *cs = CPU(cpu);
97 
98     cpu_reset(cs);
99     cpu->env.aregs[7] = ldl_phys(cs->as, 0);
100     cpu->env.pc = ldl_phys(cs->as, 4);
101 }
102 
103 static void rerandomize_rng_seed(void *opaque)
104 {
105     struct bi_record *rng_seed = opaque;
106     qemu_guest_getrandom_nofail((void *)rng_seed->data + 2,
107                                 be16_to_cpu(*(uint16_t *)rng_seed->data));
108 }
109 
110 static uint8_t fake_mac_rom[] = {
111     0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
112 
113     /* offset: 0xa - mac_reset */
114 
115     /* via2[vDirB] |= VIA2B_vPower */
116     0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
117     0x10, 0x10,                         /* moveb %a0@,%d0 */
118     0x00, 0x00, 0x00, 0x04,             /* orib #4,%d0 */
119     0x10, 0x80,                         /* moveb %d0,%a0@ */
120 
121     /* via2[vBufB] &= ~VIA2B_vPower */
122     0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
123     0x10, 0x10,                         /* moveb %a0@,%d0 */
124     0x02, 0x00, 0xFF, 0xFB,             /* andib #-5,%d0 */
125     0x10, 0x80,                         /* moveb %d0,%a0@ */
126 
127     /* while (true) ; */
128     0x60, 0xFE                          /* bras [self] */
129 };
130 
131 static MemTxResult macio_alias_read(void *opaque, hwaddr addr, uint64_t *data,
132                                     unsigned size, MemTxAttrs attrs)
133 {
134     MemTxResult r;
135     uint32_t val;
136 
137     addr &= IO_SLICE_MASK;
138     addr |= IO_BASE;
139 
140     switch (size) {
141     case 4:
142         val = address_space_ldl_be(&address_space_memory, addr, attrs, &r);
143         break;
144     case 2:
145         val = address_space_lduw_be(&address_space_memory, addr, attrs, &r);
146         break;
147     case 1:
148         val = address_space_ldub(&address_space_memory, addr, attrs, &r);
149         break;
150     default:
151         g_assert_not_reached();
152     }
153 
154     *data = val;
155     return r;
156 }
157 
158 static MemTxResult macio_alias_write(void *opaque, hwaddr addr, uint64_t value,
159                                      unsigned size, MemTxAttrs attrs)
160 {
161     MemTxResult r;
162 
163     addr &= IO_SLICE_MASK;
164     addr |= IO_BASE;
165 
166     switch (size) {
167     case 4:
168         address_space_stl_be(&address_space_memory, addr, value, attrs, &r);
169         break;
170     case 2:
171         address_space_stw_be(&address_space_memory, addr, value, attrs, &r);
172         break;
173     case 1:
174         address_space_stb(&address_space_memory, addr, value, attrs, &r);
175         break;
176     default:
177         g_assert_not_reached();
178     }
179 
180     return r;
181 }
182 
183 static const MemoryRegionOps macio_alias_ops = {
184     .read_with_attrs = macio_alias_read,
185     .write_with_attrs = macio_alias_write,
186     .endianness = DEVICE_BIG_ENDIAN,
187     .valid = {
188         .min_access_size = 1,
189         .max_access_size = 4,
190     },
191 };
192 
193 static void q800_machine_init(MachineState *machine)
194 {
195     Q800MachineState *m = Q800_MACHINE(machine);
196     int linux_boot;
197     int32_t kernel_size;
198     uint64_t elf_entry;
199     char *filename;
200     int bios_size;
201     ram_addr_t initrd_base;
202     int32_t initrd_size;
203     MemoryRegion *dp8393x_prom = g_new(MemoryRegion, 1);
204     uint8_t *prom;
205     int i, checksum;
206     MacFbMode *macfb_mode;
207     ram_addr_t ram_size = machine->ram_size;
208     const char *kernel_filename = machine->kernel_filename;
209     const char *initrd_filename = machine->initrd_filename;
210     const char *kernel_cmdline = machine->kernel_cmdline;
211     const char *bios_name = machine->firmware ?: MACROM_FILENAME;
212     hwaddr parameters_base;
213     CPUState *cs;
214     DeviceState *dev;
215     SysBusESPState *sysbus_esp;
216     ESPState *esp;
217     SysBusDevice *sysbus;
218     BusState *adb_bus;
219     NubusBus *nubus;
220     DriveInfo *dinfo;
221     uint8_t rng_seed[32];
222 
223     linux_boot = (kernel_filename != NULL);
224 
225     if (ram_size > 1 * GiB) {
226         error_report("Too much memory for this machine: %" PRId64 " MiB, "
227                      "maximum 1024 MiB", ram_size / MiB);
228         exit(1);
229     }
230 
231     /* init CPUs */
232     object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type);
233     qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal);
234     qemu_register_reset(main_cpu_reset, &m->cpu);
235 
236     /* RAM */
237     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
238 
239     /*
240      * Create container for all IO devices
241      */
242     memory_region_init(&m->macio, OBJECT(machine), "mac-io", IO_SLICE);
243     memory_region_add_subregion(get_system_memory(), IO_BASE, &m->macio);
244 
245     /*
246      * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
247      * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
248      */
249     memory_region_init_io(&m->macio_alias, OBJECT(machine), &macio_alias_ops,
250                           &m->macio, "mac-io.alias", IO_SIZE - IO_SLICE);
251     memory_region_add_subregion(get_system_memory(), IO_BASE + IO_SLICE,
252                                 &m->macio_alias);
253 
254     /* IRQ Glue */
255     object_initialize_child(OBJECT(machine), "glue", &m->glue, TYPE_GLUE);
256     object_property_set_link(OBJECT(&m->glue), "cpu", OBJECT(&m->cpu),
257                              &error_abort);
258     sysbus_realize(SYS_BUS_DEVICE(&m->glue), &error_fatal);
259 
260     /* VIA 1 */
261     object_initialize_child(OBJECT(machine), "via1", &m->via1,
262                             TYPE_MOS6522_Q800_VIA1);
263     dinfo = drive_get(IF_MTD, 0, 0);
264     if (dinfo) {
265         qdev_prop_set_drive(DEVICE(&m->via1), "drive",
266                             blk_by_legacy_dinfo(dinfo));
267     }
268     sysbus = SYS_BUS_DEVICE(&m->via1);
269     sysbus_realize(sysbus, &error_fatal);
270     memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE,
271                                 sysbus_mmio_get_region(sysbus, 1));
272     sysbus_connect_irq(sysbus, 0,
273                        qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA1));
274     /* A/UX mode */
275     qdev_connect_gpio_out(DEVICE(&m->via1), 0,
276                           qdev_get_gpio_in_named(DEVICE(&m->glue),
277                                                  "auxmode", 0));
278 
279     adb_bus = qdev_get_child_bus(DEVICE(&m->via1), "adb.0");
280     dev = qdev_new(TYPE_ADB_KEYBOARD);
281     qdev_realize_and_unref(dev, adb_bus, &error_fatal);
282     dev = qdev_new(TYPE_ADB_MOUSE);
283     qdev_realize_and_unref(dev, adb_bus, &error_fatal);
284 
285     /* VIA 2 */
286     object_initialize_child(OBJECT(machine), "via2", &m->via2,
287                             TYPE_MOS6522_Q800_VIA2);
288     sysbus = SYS_BUS_DEVICE(&m->via2);
289     sysbus_realize(sysbus, &error_fatal);
290     memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE + VIA_SIZE,
291                                 sysbus_mmio_get_region(sysbus, 1));
292     sysbus_connect_irq(sysbus, 0,
293                        qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA2));
294 
295     /* MACSONIC */
296 
297     if (nb_nics > 1) {
298         error_report("q800 can only have one ethernet interface");
299         exit(1);
300     }
301 
302     qemu_check_nic_model(&nd_table[0], "dp83932");
303 
304     /*
305      * MacSonic driver needs an Apple MAC address
306      * Valid prefix are:
307      * 00:05:02 Apple
308      * 00:80:19 Dayna Communications, Inc.
309      * 00:A0:40 Apple
310      * 08:00:07 Apple
311      * (Q800 use the last one)
312      */
313     nd_table[0].macaddr.a[0] = 0x08;
314     nd_table[0].macaddr.a[1] = 0x00;
315     nd_table[0].macaddr.a[2] = 0x07;
316 
317     object_initialize_child(OBJECT(machine), "dp8393x", &m->dp8393x,
318                             TYPE_DP8393X);
319     dev = DEVICE(&m->dp8393x);
320     qdev_set_nic_properties(dev, &nd_table[0]);
321     qdev_prop_set_uint8(dev, "it_shift", 2);
322     qdev_prop_set_bit(dev, "big_endian", true);
323     object_property_set_link(OBJECT(dev), "dma_mr",
324                              OBJECT(get_system_memory()), &error_abort);
325     sysbus = SYS_BUS_DEVICE(dev);
326     sysbus_realize(sysbus, &error_fatal);
327     memory_region_add_subregion(&m->macio, SONIC_BASE - IO_BASE,
328                                 sysbus_mmio_get_region(sysbus, 0));
329     sysbus_connect_irq(sysbus, 0,
330                        qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_SONIC));
331 
332     memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom",
333                            SONIC_PROM_SIZE, &error_fatal);
334     memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE,
335                                 dp8393x_prom);
336 
337     /* Add MAC address with valid checksum to PROM */
338     prom = memory_region_get_ram_ptr(dp8393x_prom);
339     checksum = 0;
340     for (i = 0; i < 6; i++) {
341         prom[i] = revbit8(nd_table[0].macaddr.a[i]);
342         checksum ^= prom[i];
343     }
344     prom[7] = 0xff - checksum;
345 
346     /* SCC */
347 
348     object_initialize_child(OBJECT(machine), "escc", &m->escc,
349                             TYPE_ESCC);
350     dev = DEVICE(&m->escc);
351     qdev_prop_set_uint32(dev, "disabled", 0);
352     qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
353     qdev_prop_set_uint32(dev, "it_shift", 1);
354     qdev_prop_set_bit(dev, "bit_swap", true);
355     qdev_prop_set_chr(dev, "chrA", serial_hd(0));
356     qdev_prop_set_chr(dev, "chrB", serial_hd(1));
357     qdev_prop_set_uint32(dev, "chnBtype", 0);
358     qdev_prop_set_uint32(dev, "chnAtype", 0);
359     sysbus = SYS_BUS_DEVICE(dev);
360     sysbus_realize(sysbus, &error_fatal);
361 
362     /* Logically OR both its IRQs together */
363     object_initialize_child(OBJECT(machine), "escc_orgate", &m->escc_orgate,
364                             TYPE_OR_IRQ);
365     object_property_set_int(OBJECT(&m->escc_orgate), "num-lines", 2,
366                             &error_fatal);
367     dev = DEVICE(&m->escc_orgate);
368     qdev_realize(dev, NULL, &error_fatal);
369     sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(dev, 0));
370     sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(dev, 1));
371     qdev_connect_gpio_out(dev, 0,
372                           qdev_get_gpio_in(DEVICE(&m->glue),
373                                            GLUE_IRQ_IN_ESCC));
374     memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE,
375                                 sysbus_mmio_get_region(sysbus, 0));
376 
377     /* SCSI */
378 
379     object_initialize_child(OBJECT(machine), "esp", &m->esp,
380                             TYPE_SYSBUS_ESP);
381     sysbus_esp = SYSBUS_ESP(&m->esp);
382     esp = &sysbus_esp->esp;
383     esp->dma_memory_read = NULL;
384     esp->dma_memory_write = NULL;
385     esp->dma_opaque = NULL;
386     sysbus_esp->it_shift = 4;
387     esp->dma_enabled = 1;
388 
389     sysbus = SYS_BUS_DEVICE(&m->esp);
390     sysbus_realize(sysbus, &error_fatal);
391     /* SCSI and SCSI data IRQs are negative edge triggered */
392     sysbus_connect_irq(sysbus, 0,
393                        qemu_irq_invert(
394                            qdev_get_gpio_in(DEVICE(&m->via2),
395                                                    VIA2_IRQ_SCSI_BIT)));
396     sysbus_connect_irq(sysbus, 1,
397                        qemu_irq_invert(
398                            qdev_get_gpio_in(DEVICE(&m->via2),
399                                                    VIA2_IRQ_SCSI_DATA_BIT)));
400     memory_region_add_subregion(&m->macio, ESP_BASE - IO_BASE,
401                                 sysbus_mmio_get_region(sysbus, 0));
402     memory_region_add_subregion(&m->macio, ESP_PDMA - IO_BASE,
403                                 sysbus_mmio_get_region(sysbus, 1));
404 
405     scsi_bus_legacy_handle_cmdline(&esp->bus);
406 
407     /* SWIM floppy controller */
408 
409     object_initialize_child(OBJECT(machine), "swim", &m->swim,
410                             TYPE_SWIM);
411     sysbus = SYS_BUS_DEVICE(&m->swim);
412     sysbus_realize(sysbus, &error_fatal);
413     memory_region_add_subregion(&m->macio, SWIM_BASE - IO_BASE,
414                                 sysbus_mmio_get_region(sysbus, 0));
415 
416     /* NuBus */
417 
418     object_initialize_child(OBJECT(machine), "mac-nubus-bridge",
419                             &m->mac_nubus_bridge,
420                             TYPE_MAC_NUBUS_BRIDGE);
421     sysbus = SYS_BUS_DEVICE(&m->mac_nubus_bridge);
422     dev = DEVICE(&m->mac_nubus_bridge);
423     qdev_prop_set_uint32(DEVICE(&m->mac_nubus_bridge), "slot-available-mask",
424                          Q800_NUBUS_SLOTS_AVAILABLE);
425     sysbus_realize(sysbus, &error_fatal);
426     memory_region_add_subregion(get_system_memory(),
427                                 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE,
428                                 sysbus_mmio_get_region(sysbus, 0));
429     memory_region_add_subregion(get_system_memory(),
430                                 NUBUS_SLOT_BASE +
431                                 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE,
432                                 sysbus_mmio_get_region(sysbus, 1));
433     qdev_connect_gpio_out(dev, 9,
434                           qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq",
435                           VIA2_NUBUS_IRQ_INTVIDEO));
436     for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) {
437         qdev_connect_gpio_out(dev, 9 + i,
438                               qdev_get_gpio_in_named(DEVICE(&m->via2),
439                                                      "nubus-irq",
440                                                      VIA2_NUBUS_IRQ_9 + i));
441     }
442 
443     /*
444      * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused
445      * IRQ via GLUE for use by SONIC Ethernet in classic mode
446      */
447     qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_NUBUS_9,
448                           qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq",
449                                                  VIA2_NUBUS_IRQ_9));
450 
451     nubus = NUBUS_BUS(qdev_get_child_bus(dev, "nubus-bus.0"));
452 
453     /* framebuffer in nubus slot #9 */
454 
455     object_initialize_child(OBJECT(machine), "macfb", &m->macfb,
456                             TYPE_NUBUS_MACFB);
457     dev = DEVICE(&m->macfb);
458     qdev_prop_set_uint32(dev, "slot", 9);
459     qdev_prop_set_uint32(dev, "width", graphic_width);
460     qdev_prop_set_uint32(dev, "height", graphic_height);
461     qdev_prop_set_uint8(dev, "depth", graphic_depth);
462     if (graphic_width == 1152 && graphic_height == 870) {
463         qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR);
464     } else {
465         qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA);
466     }
467     qdev_realize(dev, BUS(nubus), &error_fatal);
468 
469     macfb_mode = (NUBUS_MACFB(dev)->macfb).mode;
470 
471     cs = CPU(&m->cpu);
472     if (linux_boot) {
473         uint64_t high;
474         void *param_blob, *param_ptr, *param_rng_seed;
475 
476         if (kernel_cmdline) {
477             param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
478         } else {
479             param_blob = g_malloc(1024);
480         }
481 
482         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
483                                &elf_entry, NULL, &high, NULL, 1,
484                                EM_68K, 0, 0);
485         if (kernel_size < 0) {
486             error_report("could not load kernel '%s'", kernel_filename);
487             exit(1);
488         }
489         stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
490         parameters_base = (high + 1) & ~1;
491         param_ptr = param_blob;
492 
493         BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC);
494         BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
495         BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
496         BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
497         BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040);
498         BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800);
499         BOOTINFO1(param_ptr,
500                   BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
501         BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
502         BOOTINFO1(param_ptr, BI_MAC_VADDR,
503                   VIDEO_BASE + macfb_mode->offset);
504         BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth);
505         BOOTINFO1(param_ptr, BI_MAC_VDIM,
506                   (graphic_height << 16) | graphic_width);
507         BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride);
508         BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE);
509 
510         memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom",
511                                    sizeof(fake_mac_rom), fake_mac_rom);
512         memory_region_set_readonly(&m->rom, true);
513         memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
514 
515         if (kernel_cmdline) {
516             BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
517                         kernel_cmdline);
518         }
519 
520         /* Pass seed to RNG. */
521         param_rng_seed = param_ptr;
522         qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
523         BOOTINFODATA(param_ptr, BI_RNG_SEED,
524                      rng_seed, sizeof(rng_seed));
525 
526         /* load initrd */
527         if (initrd_filename) {
528             initrd_size = get_image_size(initrd_filename);
529             if (initrd_size < 0) {
530                 error_report("could not load initial ram disk '%s'",
531                              initrd_filename);
532                 exit(1);
533             }
534 
535             initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
536             load_image_targphys(initrd_filename, initrd_base,
537                                 ram_size - initrd_base);
538             BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
539                       initrd_size);
540         } else {
541             initrd_base = 0;
542             initrd_size = 0;
543         }
544         BOOTINFO0(param_ptr, BI_LAST);
545         rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
546                               parameters_base, cs->as);
547         qemu_register_reset_nosnapshotload(rerandomize_rng_seed,
548                             rom_ptr_for_as(cs->as, parameters_base,
549                                            param_ptr - param_blob) +
550                             (param_rng_seed - param_blob));
551         g_free(param_blob);
552     } else {
553         uint8_t *ptr;
554         /* allocate and load BIOS */
555         memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE,
556                                &error_abort);
557         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
558         memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
559 
560         /* Load MacROM binary */
561         if (filename) {
562             bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
563             g_free(filename);
564         } else {
565             bios_size = -1;
566         }
567 
568         /* Remove qtest_enabled() check once firmware files are in the tree */
569         if (!qtest_enabled()) {
570             if (bios_size <= 0 || bios_size > MACROM_SIZE) {
571                 error_report("could not load MacROM '%s'", bios_name);
572                 exit(1);
573             }
574 
575             ptr = rom_ptr(MACROM_ADDR, bios_size);
576             assert(ptr != NULL);
577             stl_phys(cs->as, 0, ldl_p(ptr));    /* reset initial SP */
578             stl_phys(cs->as, 4,
579                      MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */
580         }
581     }
582 }
583 
584 static GlobalProperty hw_compat_q800[] = {
585     { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" },
586     { "scsi-hd", "vendor", " SEAGATE" },
587     { "scsi-hd", "product", "          ST225N" },
588     { "scsi-hd", "ver", "1.0 " },
589     { "scsi-cd", "quirk_mode_page_apple_vendor", "on" },
590     { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" },
591     { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" },
592     { "scsi-cd", "quirk_mode_page_truncated", "on" },
593     { "scsi-cd", "vendor", "MATSHITA" },
594     { "scsi-cd", "product", "CD-ROM CR-8005" },
595     { "scsi-cd", "ver", "1.0k" },
596 };
597 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800);
598 
599 static const char *q800_machine_valid_cpu_types[] = {
600     M68K_CPU_TYPE_NAME("m68040"),
601     NULL
602 };
603 
604 static void q800_machine_class_init(ObjectClass *oc, void *data)
605 {
606     MachineClass *mc = MACHINE_CLASS(oc);
607 
608     mc->desc = "Macintosh Quadra 800";
609     mc->init = q800_machine_init;
610     mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
611     mc->valid_cpu_types = q800_machine_valid_cpu_types;
612     mc->max_cpus = 1;
613     mc->block_default_type = IF_SCSI;
614     mc->default_ram_id = "m68k_mac.ram";
615     compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len);
616 }
617 
618 static const TypeInfo q800_machine_typeinfo = {
619     .name       = MACHINE_TYPE_NAME("q800"),
620     .parent     = TYPE_MACHINE,
621     .instance_size = sizeof(Q800MachineState),
622     .class_init = q800_machine_class_init,
623 };
624 
625 static void q800_machine_register_types(void)
626 {
627     type_register_static(&q800_machine_typeinfo);
628 }
629 
630 type_init(q800_machine_register_types)
631