1 /* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qemu/units.h" 25 #include "qemu/datadir.h" 26 #include "qemu/guest-random.h" 27 #include "exec/target_page.h" 28 #include "system/system.h" 29 #include "cpu.h" 30 #include "hw/boards.h" 31 #include "hw/or-irq.h" 32 #include "elf.h" 33 #include "hw/loader.h" 34 #include "ui/console.h" 35 #include "hw/char/escc.h" 36 #include "hw/sysbus.h" 37 #include "hw/scsi/esp.h" 38 #include "standard-headers/asm-m68k/bootinfo.h" 39 #include "standard-headers/asm-m68k/bootinfo-mac.h" 40 #include "bootinfo.h" 41 #include "hw/m68k/q800.h" 42 #include "hw/m68k/q800-glue.h" 43 #include "hw/misc/mac_via.h" 44 #include "hw/misc/djmemc.h" 45 #include "hw/misc/iosb.h" 46 #include "hw/input/adb.h" 47 #include "hw/audio/asc.h" 48 #include "hw/nubus/mac-nubus-bridge.h" 49 #include "hw/display/macfb.h" 50 #include "hw/block/swim.h" 51 #include "net/net.h" 52 #include "net/util.h" 53 #include "qapi/error.h" 54 #include "qemu/error-report.h" 55 #include "system/qtest.h" 56 #include "system/runstate.h" 57 #include "system/reset.h" 58 #include "migration/vmstate.h" 59 60 #define MACROM_ADDR 0x40800000 61 #define MACROM_SIZE 0x00100000 62 63 #define MACROM_FILENAME "MacROM.bin" 64 65 #define IO_BASE 0x50000000 66 #define IO_SLICE 0x00040000 67 #define IO_SLICE_MASK (IO_SLICE - 1) 68 #define IO_SIZE 0x04000000 69 70 #define VIA_BASE (IO_BASE + 0x00000) 71 #define SONIC_PROM_BASE (IO_BASE + 0x08000) 72 #define SONIC_BASE (IO_BASE + 0x0a000) 73 #define SCC_BASE (IO_BASE + 0x0c020) 74 #define DJMEMC_BASE (IO_BASE + 0x0e000) 75 #define ESP_BASE (IO_BASE + 0x10000) 76 #define ESP_PDMA (IO_BASE + 0x10100) 77 #define ASC_BASE (IO_BASE + 0x14000) 78 #define IOSB_BASE (IO_BASE + 0x18000) 79 #define SWIM_BASE (IO_BASE + 0x1E000) 80 81 #define SONIC_PROM_SIZE 0x1000 82 83 /* 84 * the video base, whereas it a Nubus address, 85 * is needed by the kernel to have early display and 86 * thus provided by the bootloader 87 */ 88 #define VIDEO_BASE 0xf9000000 89 90 #define MAC_CLOCK 3686418 91 92 /* Size of whole RAM area */ 93 #define RAM_SIZE 0x40000000 94 95 /* 96 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only 97 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800 98 */ 99 #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \ 100 BIT(0xe)) 101 102 /* Quadra 800 machine ID */ 103 #define Q800_MACHINE_ID 0xa55a2bad 104 105 106 static void main_cpu_reset(void *opaque) 107 { 108 M68kCPU *cpu = opaque; 109 CPUState *cs = CPU(cpu); 110 111 cpu_reset(cs); 112 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 113 cpu->env.pc = ldl_phys(cs->as, 4); 114 } 115 116 static void rerandomize_rng_seed(void *opaque) 117 { 118 struct bi_record *rng_seed = opaque; 119 qemu_guest_getrandom_nofail((void *)rng_seed->data + 2, 120 be16_to_cpu(*(uint16_t *)rng_seed->data)); 121 } 122 123 static uint8_t fake_mac_rom[] = { 124 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 125 126 /* offset: 0xa - mac_reset */ 127 128 /* via2[vDirB] |= VIA2B_vPower */ 129 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 130 0x10, 0x10, /* moveb %a0@,%d0 */ 131 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 132 0x10, 0x80, /* moveb %d0,%a0@ */ 133 134 /* via2[vBufB] &= ~VIA2B_vPower */ 135 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 136 0x10, 0x10, /* moveb %a0@,%d0 */ 137 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 138 0x10, 0x80, /* moveb %d0,%a0@ */ 139 140 /* while (true) ; */ 141 0x60, 0xFE /* bras [self] */ 142 }; 143 144 static MemTxResult macio_alias_read(void *opaque, hwaddr addr, uint64_t *data, 145 unsigned size, MemTxAttrs attrs) 146 { 147 MemTxResult r; 148 uint32_t val; 149 150 addr &= IO_SLICE_MASK; 151 addr |= IO_BASE; 152 153 switch (size) { 154 case 4: 155 val = address_space_ldl_be(&address_space_memory, addr, attrs, &r); 156 break; 157 case 2: 158 val = address_space_lduw_be(&address_space_memory, addr, attrs, &r); 159 break; 160 case 1: 161 val = address_space_ldub(&address_space_memory, addr, attrs, &r); 162 break; 163 default: 164 g_assert_not_reached(); 165 } 166 167 *data = val; 168 return r; 169 } 170 171 static MemTxResult macio_alias_write(void *opaque, hwaddr addr, uint64_t value, 172 unsigned size, MemTxAttrs attrs) 173 { 174 MemTxResult r; 175 176 addr &= IO_SLICE_MASK; 177 addr |= IO_BASE; 178 179 switch (size) { 180 case 4: 181 address_space_stl_be(&address_space_memory, addr, value, attrs, &r); 182 break; 183 case 2: 184 address_space_stw_be(&address_space_memory, addr, value, attrs, &r); 185 break; 186 case 1: 187 address_space_stb(&address_space_memory, addr, value, attrs, &r); 188 break; 189 default: 190 g_assert_not_reached(); 191 } 192 193 return r; 194 } 195 196 static const MemoryRegionOps macio_alias_ops = { 197 .read_with_attrs = macio_alias_read, 198 .write_with_attrs = macio_alias_write, 199 .endianness = DEVICE_BIG_ENDIAN, 200 .valid = { 201 .min_access_size = 1, 202 .max_access_size = 4, 203 }, 204 }; 205 206 static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size) 207 { 208 return Q800_MACHINE_ID; 209 } 210 211 static void machine_id_write(void *opaque, hwaddr addr, uint64_t val, 212 unsigned size) 213 { 214 return; 215 } 216 217 static const MemoryRegionOps machine_id_ops = { 218 .read = machine_id_read, 219 .write = machine_id_write, 220 .endianness = DEVICE_BIG_ENDIAN, 221 .valid = { 222 .min_access_size = 4, 223 .max_access_size = 4, 224 }, 225 }; 226 227 static uint64_t ramio_read(void *opaque, hwaddr addr, unsigned size) 228 { 229 return 0x0; 230 } 231 232 static void ramio_write(void *opaque, hwaddr addr, uint64_t val, 233 unsigned size) 234 { 235 return; 236 } 237 238 static const MemoryRegionOps ramio_ops = { 239 .read = ramio_read, 240 .write = ramio_write, 241 .endianness = DEVICE_BIG_ENDIAN, 242 .valid = { 243 .min_access_size = 1, 244 .max_access_size = 4, 245 }, 246 }; 247 248 static void q800_machine_init(MachineState *machine) 249 { 250 Q800MachineState *m = Q800_MACHINE(machine); 251 int linux_boot; 252 int32_t kernel_size; 253 uint64_t elf_entry; 254 char *filename; 255 int bios_size; 256 ram_addr_t initrd_base; 257 int32_t initrd_size; 258 uint8_t *prom; 259 int i, checksum; 260 MacFbMode *macfb_mode; 261 ram_addr_t ram_size = machine->ram_size; 262 const char *kernel_filename = machine->kernel_filename; 263 const char *initrd_filename = machine->initrd_filename; 264 const char *kernel_cmdline = machine->kernel_cmdline; 265 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 266 hwaddr parameters_base; 267 CPUState *cs; 268 DeviceState *dev; 269 SysBusESPState *sysbus_esp; 270 ESPState *esp; 271 SysBusDevice *sysbus; 272 BusState *adb_bus; 273 NubusBus *nubus; 274 DriveInfo *dinfo; 275 NICInfo *nd; 276 MACAddr mac; 277 uint8_t rng_seed[32]; 278 279 linux_boot = (kernel_filename != NULL); 280 281 if (ram_size > 1 * GiB) { 282 error_report("Too much memory for this machine: %" PRId64 " MiB, " 283 "maximum 1024 MiB", ram_size / MiB); 284 exit(1); 285 } 286 287 /* init CPUs */ 288 object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type); 289 qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal); 290 qemu_register_reset(main_cpu_reset, &m->cpu); 291 292 /* RAM */ 293 memory_region_init_io(&m->ramio, OBJECT(machine), &ramio_ops, &m->ramio, 294 "ram", RAM_SIZE); 295 memory_region_add_subregion(get_system_memory(), 0x0, &m->ramio); 296 297 memory_region_add_subregion(&m->ramio, 0, machine->ram); 298 299 /* 300 * Create container for all IO devices 301 */ 302 memory_region_init(&m->macio, OBJECT(machine), "mac-io", IO_SLICE); 303 memory_region_add_subregion(get_system_memory(), IO_BASE, &m->macio); 304 305 /* 306 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 307 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 308 */ 309 memory_region_init_io(&m->macio_alias, OBJECT(machine), &macio_alias_ops, 310 &m->macio, "mac-io.alias", IO_SIZE - IO_SLICE); 311 memory_region_add_subregion(get_system_memory(), IO_BASE + IO_SLICE, 312 &m->macio_alias); 313 314 memory_region_init_io(&m->machine_id, NULL, &machine_id_ops, NULL, 315 "Machine ID", 4); 316 memory_region_add_subregion(get_system_memory(), 0x5ffffffc, 317 &m->machine_id); 318 319 /* IRQ Glue */ 320 object_initialize_child(OBJECT(machine), "glue", &m->glue, TYPE_GLUE); 321 object_property_set_link(OBJECT(&m->glue), "cpu", OBJECT(&m->cpu), 322 &error_abort); 323 sysbus_realize(SYS_BUS_DEVICE(&m->glue), &error_fatal); 324 325 /* djMEMC memory controller */ 326 object_initialize_child(OBJECT(machine), "djmemc", &m->djmemc, 327 TYPE_DJMEMC); 328 sysbus = SYS_BUS_DEVICE(&m->djmemc); 329 sysbus_realize_and_unref(sysbus, &error_fatal); 330 memory_region_add_subregion(&m->macio, DJMEMC_BASE - IO_BASE, 331 sysbus_mmio_get_region(sysbus, 0)); 332 333 /* IOSB subsystem */ 334 object_initialize_child(OBJECT(machine), "iosb", &m->iosb, TYPE_IOSB); 335 sysbus = SYS_BUS_DEVICE(&m->iosb); 336 sysbus_realize_and_unref(sysbus, &error_fatal); 337 memory_region_add_subregion(&m->macio, IOSB_BASE - IO_BASE, 338 sysbus_mmio_get_region(sysbus, 0)); 339 340 /* VIA 1 */ 341 object_initialize_child(OBJECT(machine), "via1", &m->via1, 342 TYPE_MOS6522_Q800_VIA1); 343 dinfo = drive_get(IF_MTD, 0, 0); 344 if (dinfo) { 345 qdev_prop_set_drive(DEVICE(&m->via1), "drive", 346 blk_by_legacy_dinfo(dinfo)); 347 } 348 sysbus = SYS_BUS_DEVICE(&m->via1); 349 sysbus_realize(sysbus, &error_fatal); 350 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE, 351 sysbus_mmio_get_region(sysbus, 1)); 352 sysbus_connect_irq(sysbus, 0, 353 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA1)); 354 /* A/UX mode */ 355 qdev_connect_gpio_out(DEVICE(&m->via1), 0, 356 qdev_get_gpio_in_named(DEVICE(&m->glue), 357 "auxmode", 0)); 358 359 adb_bus = qdev_get_child_bus(DEVICE(&m->via1), "adb.0"); 360 dev = qdev_new(TYPE_ADB_KEYBOARD); 361 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 362 dev = qdev_new(TYPE_ADB_MOUSE); 363 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 364 365 /* VIA 2 */ 366 object_initialize_child(OBJECT(machine), "via2", &m->via2, 367 TYPE_MOS6522_Q800_VIA2); 368 sysbus = SYS_BUS_DEVICE(&m->via2); 369 sysbus_realize(sysbus, &error_fatal); 370 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE + VIA_SIZE, 371 sysbus_mmio_get_region(sysbus, 1)); 372 sysbus_connect_irq(sysbus, 0, 373 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA2)); 374 375 /* MACSONIC */ 376 377 /* 378 * MacSonic driver needs an Apple MAC address 379 * Valid prefix are: 380 * 00:05:02 Apple 381 * 00:80:19 Dayna Communications, Inc. 382 * 00:A0:40 Apple 383 * 08:00:07 Apple 384 * (Q800 use the last one) 385 */ 386 object_initialize_child(OBJECT(machine), "dp8393x", &m->dp8393x, 387 TYPE_DP8393X); 388 dev = DEVICE(&m->dp8393x); 389 nd = qemu_find_nic_info(TYPE_DP8393X, true, "dp83932"); 390 if (nd) { 391 qdev_set_nic_properties(dev, nd); 392 memcpy(mac.a, nd->macaddr.a, sizeof(mac.a)); 393 } else { 394 qemu_macaddr_default_if_unset(&mac); 395 } 396 mac.a[0] = 0x08; 397 mac.a[1] = 0x00; 398 mac.a[2] = 0x07; 399 qdev_prop_set_macaddr(dev, "mac", mac.a); 400 401 qdev_prop_set_uint8(dev, "it_shift", 2); 402 qdev_prop_set_bit(dev, "big_endian", true); 403 object_property_set_link(OBJECT(dev), "dma_mr", 404 OBJECT(get_system_memory()), &error_abort); 405 sysbus = SYS_BUS_DEVICE(dev); 406 sysbus_realize(sysbus, &error_fatal); 407 memory_region_add_subregion(&m->macio, SONIC_BASE - IO_BASE, 408 sysbus_mmio_get_region(sysbus, 0)); 409 sysbus_connect_irq(sysbus, 0, 410 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_SONIC)); 411 412 memory_region_init_rom(&m->dp8393x_prom, NULL, "dp8393x-q800.prom", 413 SONIC_PROM_SIZE, &error_fatal); 414 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE, 415 &m->dp8393x_prom); 416 417 /* Add MAC address with valid checksum to PROM */ 418 prom = memory_region_get_ram_ptr(&m->dp8393x_prom); 419 checksum = 0; 420 for (i = 0; i < 6; i++) { 421 prom[i] = revbit8(mac.a[i]); 422 checksum ^= prom[i]; 423 } 424 prom[7] = 0xff - checksum; 425 426 /* SCC */ 427 428 object_initialize_child(OBJECT(machine), "escc", &m->escc, 429 TYPE_ESCC); 430 dev = DEVICE(&m->escc); 431 qdev_prop_set_uint32(dev, "disabled", 0); 432 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 433 qdev_prop_set_uint32(dev, "it_shift", 1); 434 qdev_prop_set_bit(dev, "bit_swap", true); 435 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 436 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 437 qdev_prop_set_uint32(dev, "chnBtype", 0); 438 qdev_prop_set_uint32(dev, "chnAtype", 0); 439 sysbus = SYS_BUS_DEVICE(dev); 440 sysbus_realize(sysbus, &error_fatal); 441 442 /* Logically OR both its IRQs together */ 443 object_initialize_child(OBJECT(machine), "escc_orgate", &m->escc_orgate, 444 TYPE_OR_IRQ); 445 object_property_set_int(OBJECT(&m->escc_orgate), "num-lines", 2, 446 &error_fatal); 447 dev = DEVICE(&m->escc_orgate); 448 qdev_realize(dev, NULL, &error_fatal); 449 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(dev, 0)); 450 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(dev, 1)); 451 qdev_connect_gpio_out(dev, 0, 452 qdev_get_gpio_in(DEVICE(&m->glue), 453 GLUE_IRQ_IN_ESCC)); 454 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE, 455 sysbus_mmio_get_region(sysbus, 0)); 456 457 /* Create alias for NetBSD */ 458 memory_region_init_alias(&m->escc_alias, OBJECT(machine), "escc-alias", 459 sysbus_mmio_get_region(sysbus, 0), 0, 0x8); 460 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE - 0x20, 461 &m->escc_alias); 462 463 /* SCSI */ 464 465 object_initialize_child(OBJECT(machine), "esp", &m->esp, 466 TYPE_SYSBUS_ESP); 467 sysbus_esp = SYSBUS_ESP(&m->esp); 468 esp = &sysbus_esp->esp; 469 esp->dma_memory_read = NULL; 470 esp->dma_memory_write = NULL; 471 esp->dma_opaque = NULL; 472 sysbus_esp->it_shift = 4; 473 esp->dma_enabled = 1; 474 475 sysbus = SYS_BUS_DEVICE(&m->esp); 476 sysbus_realize(sysbus, &error_fatal); 477 /* SCSI and SCSI data IRQs are negative edge triggered */ 478 sysbus_connect_irq(sysbus, 0, 479 qemu_irq_invert( 480 qdev_get_gpio_in(DEVICE(&m->via2), 481 VIA2_IRQ_SCSI_BIT))); 482 sysbus_connect_irq(sysbus, 1, 483 qemu_irq_invert( 484 qdev_get_gpio_in(DEVICE(&m->via2), 485 VIA2_IRQ_SCSI_DATA_BIT))); 486 memory_region_add_subregion(&m->macio, ESP_BASE - IO_BASE, 487 sysbus_mmio_get_region(sysbus, 0)); 488 memory_region_add_subregion(&m->macio, ESP_PDMA - IO_BASE, 489 sysbus_mmio_get_region(sysbus, 1)); 490 491 scsi_bus_legacy_handle_cmdline(&esp->bus); 492 493 /* Apple Sound Chip */ 494 495 object_initialize_child(OBJECT(machine), "asc", &m->asc, TYPE_ASC); 496 qdev_prop_set_uint8(DEVICE(&m->asc), "asctype", m->easc ? ASC_TYPE_EASC 497 : ASC_TYPE_ASC); 498 if (machine->audiodev) { 499 qdev_prop_set_string(DEVICE(&m->asc), "audiodev", machine->audiodev); 500 } 501 sysbus = SYS_BUS_DEVICE(&m->asc); 502 sysbus_realize_and_unref(sysbus, &error_fatal); 503 memory_region_add_subregion(&m->macio, ASC_BASE - IO_BASE, 504 sysbus_mmio_get_region(sysbus, 0)); 505 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(DEVICE(&m->glue), 506 GLUE_IRQ_IN_ASC)); 507 508 /* Wire ASC IRQ via GLUE for use in classic mode */ 509 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_ASC, 510 qdev_get_gpio_in(DEVICE(&m->via2), 511 VIA2_IRQ_ASC_BIT)); 512 513 /* SWIM floppy controller */ 514 515 object_initialize_child(OBJECT(machine), "swim", &m->swim, 516 TYPE_SWIM); 517 sysbus = SYS_BUS_DEVICE(&m->swim); 518 sysbus_realize(sysbus, &error_fatal); 519 memory_region_add_subregion(&m->macio, SWIM_BASE - IO_BASE, 520 sysbus_mmio_get_region(sysbus, 0)); 521 522 /* NuBus */ 523 524 object_initialize_child(OBJECT(machine), "mac-nubus-bridge", 525 &m->mac_nubus_bridge, 526 TYPE_MAC_NUBUS_BRIDGE); 527 sysbus = SYS_BUS_DEVICE(&m->mac_nubus_bridge); 528 dev = DEVICE(&m->mac_nubus_bridge); 529 qdev_prop_set_uint32(DEVICE(&m->mac_nubus_bridge), "slot-available-mask", 530 Q800_NUBUS_SLOTS_AVAILABLE); 531 sysbus_realize(sysbus, &error_fatal); 532 memory_region_add_subregion(get_system_memory(), 533 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE, 534 sysbus_mmio_get_region(sysbus, 0)); 535 memory_region_add_subregion(get_system_memory(), 536 NUBUS_SLOT_BASE + 537 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE, 538 sysbus_mmio_get_region(sysbus, 1)); 539 qdev_connect_gpio_out(dev, 9, 540 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq", 541 VIA2_NUBUS_IRQ_INTVIDEO)); 542 for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) { 543 qdev_connect_gpio_out(dev, 9 + i, 544 qdev_get_gpio_in_named(DEVICE(&m->via2), 545 "nubus-irq", 546 VIA2_NUBUS_IRQ_9 + i)); 547 } 548 549 /* 550 * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused 551 * IRQ via GLUE for use by SONIC Ethernet in classic mode 552 */ 553 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_NUBUS_9, 554 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq", 555 VIA2_NUBUS_IRQ_9)); 556 557 nubus = NUBUS_BUS(qdev_get_child_bus(dev, "nubus-bus.0")); 558 559 /* framebuffer in nubus slot #9 */ 560 561 object_initialize_child(OBJECT(machine), "macfb", &m->macfb, 562 TYPE_NUBUS_MACFB); 563 dev = DEVICE(&m->macfb); 564 qdev_prop_set_uint32(dev, "slot", 9); 565 qdev_prop_set_uint32(dev, "width", graphic_width); 566 qdev_prop_set_uint32(dev, "height", graphic_height); 567 qdev_prop_set_uint8(dev, "depth", graphic_depth); 568 if (graphic_width == 1152 && graphic_height == 870) { 569 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR); 570 } else { 571 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA); 572 } 573 qdev_realize(dev, BUS(nubus), &error_fatal); 574 575 macfb_mode = (NUBUS_MACFB(dev)->macfb).mode; 576 577 cs = CPU(&m->cpu); 578 if (linux_boot) { 579 uint64_t high; 580 void *param_blob, *param_ptr, *param_rng_seed; 581 582 if (kernel_cmdline) { 583 param_blob = g_malloc(strlen(kernel_cmdline) + 1024); 584 } else { 585 param_blob = g_malloc(1024); 586 } 587 588 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 589 &elf_entry, NULL, &high, NULL, ELFDATA2MSB, 590 EM_68K, 0, 0); 591 if (kernel_size < 0) { 592 error_report("could not load kernel '%s'", kernel_filename); 593 exit(1); 594 } 595 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 596 parameters_base = (high + 1) & ~1; 597 param_ptr = param_blob; 598 599 BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC); 600 BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040); 601 BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040); 602 BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040); 603 BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040); 604 BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800); 605 BOOTINFO1(param_ptr, 606 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 607 BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size); 608 BOOTINFO1(param_ptr, BI_MAC_VADDR, 609 VIDEO_BASE + macfb_mode->offset); 610 BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth); 611 BOOTINFO1(param_ptr, BI_MAC_VDIM, 612 (graphic_height << 16) | graphic_width); 613 BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride); 614 BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE); 615 616 memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom", 617 sizeof(fake_mac_rom), fake_mac_rom); 618 memory_region_set_readonly(&m->rom, true); 619 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom); 620 621 if (kernel_cmdline) { 622 BOOTINFOSTR(param_ptr, BI_COMMAND_LINE, 623 kernel_cmdline); 624 } 625 626 /* Pass seed to RNG. */ 627 param_rng_seed = param_ptr; 628 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed)); 629 BOOTINFODATA(param_ptr, BI_RNG_SEED, 630 rng_seed, sizeof(rng_seed)); 631 632 /* load initrd */ 633 if (initrd_filename) { 634 initrd_size = get_image_size(initrd_filename); 635 if (initrd_size < 0) { 636 error_report("could not load initial ram disk '%s'", 637 initrd_filename); 638 exit(1); 639 } 640 641 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 642 load_image_targphys(initrd_filename, initrd_base, 643 ram_size - initrd_base); 644 BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base, 645 initrd_size); 646 } else { 647 initrd_base = 0; 648 initrd_size = 0; 649 } 650 BOOTINFO0(param_ptr, BI_LAST); 651 rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob, 652 parameters_base, cs->as); 653 qemu_register_reset_nosnapshotload(rerandomize_rng_seed, 654 rom_ptr_for_as(cs->as, parameters_base, 655 param_ptr - param_blob) + 656 (param_rng_seed - param_blob)); 657 g_free(param_blob); 658 } else { 659 uint8_t *ptr; 660 /* allocate and load BIOS */ 661 memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE, 662 &error_abort); 663 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 664 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom); 665 666 memory_region_init_alias(&m->rom_alias, NULL, "m68k_mac.rom-alias", 667 &m->rom, 0, MACROM_SIZE); 668 memory_region_add_subregion(get_system_memory(), 0x40000000, 669 &m->rom_alias); 670 671 /* Load MacROM binary */ 672 if (filename) { 673 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 674 g_free(filename); 675 } else { 676 bios_size = -1; 677 } 678 679 /* Remove qtest_enabled() check once firmware files are in the tree */ 680 if (!qtest_enabled()) { 681 if (bios_size <= 0 || bios_size > MACROM_SIZE) { 682 error_report("could not load MacROM '%s'", bios_name); 683 exit(1); 684 } 685 686 ptr = rom_ptr(MACROM_ADDR, bios_size); 687 assert(ptr != NULL); 688 stl_phys(cs->as, 0, ldl_be_p(ptr)); /* reset initial SP */ 689 stl_phys(cs->as, 4, 690 MACROM_ADDR + ldl_be_p(ptr + 4)); /* reset initial PC */ 691 } 692 } 693 } 694 695 static bool q800_get_easc(Object *obj, Error **errp) 696 { 697 Q800MachineState *ms = Q800_MACHINE(obj); 698 699 return ms->easc; 700 } 701 702 static void q800_set_easc(Object *obj, bool value, Error **errp) 703 { 704 Q800MachineState *ms = Q800_MACHINE(obj); 705 706 ms->easc = value; 707 } 708 709 static void q800_init(Object *obj) 710 { 711 Q800MachineState *ms = Q800_MACHINE(obj); 712 713 /* Default to EASC */ 714 ms->easc = true; 715 } 716 717 static GlobalProperty hw_compat_q800[] = { 718 { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" }, 719 { "scsi-hd", "vendor", " SEAGATE" }, 720 { "scsi-hd", "product", " ST225N" }, 721 { "scsi-hd", "ver", "1.0 " }, 722 { "scsi-cd", "quirk_mode_page_apple_vendor", "on" }, 723 { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" }, 724 { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" }, 725 { "scsi-cd", "quirk_mode_page_truncated", "on" }, 726 { "scsi-cd", "vendor", "MATSHITA" }, 727 { "scsi-cd", "product", "CD-ROM CR-8005" }, 728 { "scsi-cd", "ver", "1.0k" }, 729 }; 730 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800); 731 732 static void q800_machine_class_init(ObjectClass *oc, void *data) 733 { 734 static const char * const valid_cpu_types[] = { 735 M68K_CPU_TYPE_NAME("m68040"), 736 NULL 737 }; 738 MachineClass *mc = MACHINE_CLASS(oc); 739 740 mc->desc = "Macintosh Quadra 800"; 741 mc->init = q800_machine_init; 742 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 743 mc->valid_cpu_types = valid_cpu_types; 744 mc->max_cpus = 1; 745 mc->block_default_type = IF_SCSI; 746 mc->default_ram_id = "m68k_mac.ram"; 747 machine_add_audiodev_property(mc); 748 compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len); 749 750 object_class_property_add_bool(oc, "easc", q800_get_easc, q800_set_easc); 751 object_class_property_set_description(oc, "easc", 752 "Set to off to use ASC rather than EASC"); 753 } 754 755 static const TypeInfo q800_machine_typeinfo = { 756 .name = MACHINE_TYPE_NAME("q800"), 757 .parent = TYPE_MACHINE, 758 .instance_init = q800_init, 759 .instance_size = sizeof(Q800MachineState), 760 .class_init = q800_machine_class_init, 761 }; 762 763 static void q800_machine_register_types(void) 764 { 765 type_register_static(&q800_machine_typeinfo); 766 } 767 768 type_init(q800_machine_register_types) 769