xref: /openbmc/qemu/hw/m68k/q800.c (revision 8e093280)
1 /*
2  * QEMU Motorla 680x0 Macintosh hardware System Emulator
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20  * THE SOFTWARE.
21  */
22 
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu/datadir.h"
26 #include "qemu/guest-random.h"
27 #include "sysemu/sysemu.h"
28 #include "cpu.h"
29 #include "hw/boards.h"
30 #include "hw/or-irq.h"
31 #include "elf.h"
32 #include "hw/loader.h"
33 #include "ui/console.h"
34 #include "hw/char/escc.h"
35 #include "hw/sysbus.h"
36 #include "hw/scsi/esp.h"
37 #include "standard-headers/asm-m68k/bootinfo.h"
38 #include "standard-headers/asm-m68k/bootinfo-mac.h"
39 #include "bootinfo.h"
40 #include "hw/m68k/q800.h"
41 #include "hw/m68k/q800-glue.h"
42 #include "hw/misc/mac_via.h"
43 #include "hw/input/adb.h"
44 #include "hw/nubus/mac-nubus-bridge.h"
45 #include "hw/display/macfb.h"
46 #include "hw/block/swim.h"
47 #include "net/net.h"
48 #include "qapi/error.h"
49 #include "qemu/error-report.h"
50 #include "sysemu/qtest.h"
51 #include "sysemu/runstate.h"
52 #include "sysemu/reset.h"
53 #include "migration/vmstate.h"
54 
55 #define MACROM_ADDR     0x40800000
56 #define MACROM_SIZE     0x00100000
57 
58 #define MACROM_FILENAME "MacROM.bin"
59 
60 #define IO_BASE               0x50000000
61 #define IO_SLICE              0x00040000
62 #define IO_SIZE               0x04000000
63 
64 #define VIA_BASE              (IO_BASE + 0x00000)
65 #define SONIC_PROM_BASE       (IO_BASE + 0x08000)
66 #define SONIC_BASE            (IO_BASE + 0x0a000)
67 #define SCC_BASE              (IO_BASE + 0x0c020)
68 #define ESP_BASE              (IO_BASE + 0x10000)
69 #define ESP_PDMA              (IO_BASE + 0x10100)
70 #define ASC_BASE              (IO_BASE + 0x14000)
71 #define SWIM_BASE             (IO_BASE + 0x1E000)
72 
73 #define SONIC_PROM_SIZE       0x1000
74 
75 /*
76  * the video base, whereas it a Nubus address,
77  * is needed by the kernel to have early display and
78  * thus provided by the bootloader
79  */
80 #define VIDEO_BASE            0xf9000000
81 
82 #define MAC_CLOCK  3686418
83 
84 /*
85  * Slot 0x9 is reserved for use by the in-built framebuffer whilst only
86  * slots 0xc, 0xd and 0xe physically exist on the Quadra 800
87  */
88 #define Q800_NUBUS_SLOTS_AVAILABLE    (BIT(0x9) | BIT(0xc) | BIT(0xd) | \
89                                        BIT(0xe))
90 
91 
92 static void main_cpu_reset(void *opaque)
93 {
94     M68kCPU *cpu = opaque;
95     CPUState *cs = CPU(cpu);
96 
97     cpu_reset(cs);
98     cpu->env.aregs[7] = ldl_phys(cs->as, 0);
99     cpu->env.pc = ldl_phys(cs->as, 4);
100 }
101 
102 static void rerandomize_rng_seed(void *opaque)
103 {
104     struct bi_record *rng_seed = opaque;
105     qemu_guest_getrandom_nofail((void *)rng_seed->data + 2,
106                                 be16_to_cpu(*(uint16_t *)rng_seed->data));
107 }
108 
109 static uint8_t fake_mac_rom[] = {
110     0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
111 
112     /* offset: 0xa - mac_reset */
113 
114     /* via2[vDirB] |= VIA2B_vPower */
115     0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
116     0x10, 0x10,                         /* moveb %a0@,%d0 */
117     0x00, 0x00, 0x00, 0x04,             /* orib #4,%d0 */
118     0x10, 0x80,                         /* moveb %d0,%a0@ */
119 
120     /* via2[vBufB] &= ~VIA2B_vPower */
121     0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
122     0x10, 0x10,                         /* moveb %a0@,%d0 */
123     0x02, 0x00, 0xFF, 0xFB,             /* andib #-5,%d0 */
124     0x10, 0x80,                         /* moveb %d0,%a0@ */
125 
126     /* while (true) ; */
127     0x60, 0xFE                          /* bras [self] */
128 };
129 
130 static void q800_machine_init(MachineState *machine)
131 {
132     Q800MachineState *m = Q800_MACHINE(machine);
133     int linux_boot;
134     int32_t kernel_size;
135     uint64_t elf_entry;
136     char *filename;
137     int bios_size;
138     ram_addr_t initrd_base;
139     int32_t initrd_size;
140     MemoryRegion *io;
141     MemoryRegion *dp8393x_prom = g_new(MemoryRegion, 1);
142     uint8_t *prom;
143     const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1;
144     int i, checksum;
145     MacFbMode *macfb_mode;
146     ram_addr_t ram_size = machine->ram_size;
147     const char *kernel_filename = machine->kernel_filename;
148     const char *initrd_filename = machine->initrd_filename;
149     const char *kernel_cmdline = machine->kernel_cmdline;
150     const char *bios_name = machine->firmware ?: MACROM_FILENAME;
151     hwaddr parameters_base;
152     CPUState *cs;
153     DeviceState *dev;
154     DeviceState *via1_dev, *via2_dev;
155     DeviceState *escc_orgate;
156     SysBusESPState *sysbus_esp;
157     ESPState *esp;
158     SysBusDevice *sysbus;
159     BusState *adb_bus;
160     NubusBus *nubus;
161     DeviceState *glue;
162     DriveInfo *dinfo;
163     uint8_t rng_seed[32];
164 
165     linux_boot = (kernel_filename != NULL);
166 
167     if (ram_size > 1 * GiB) {
168         error_report("Too much memory for this machine: %" PRId64 " MiB, "
169                      "maximum 1024 MiB", ram_size / MiB);
170         exit(1);
171     }
172 
173     /* init CPUs */
174     object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type);
175     qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal);
176     qemu_register_reset(main_cpu_reset, &m->cpu);
177 
178     /* RAM */
179     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
180 
181     /*
182      * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
183      * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
184      */
185     io = g_new(MemoryRegion, io_slice_nb);
186     for (i = 0; i < io_slice_nb; i++) {
187         char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1);
188 
189         memory_region_init_alias(&io[i], NULL, name, get_system_memory(),
190                                  IO_BASE, IO_SLICE);
191         memory_region_add_subregion(get_system_memory(),
192                                     IO_BASE + (i + 1) * IO_SLICE, &io[i]);
193         g_free(name);
194     }
195 
196     /* IRQ Glue */
197     glue = qdev_new(TYPE_GLUE);
198     object_property_set_link(OBJECT(glue), "cpu", OBJECT(&m->cpu),
199                              &error_abort);
200     sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal);
201 
202     /* VIA 1 */
203     via1_dev = qdev_new(TYPE_MOS6522_Q800_VIA1);
204     dinfo = drive_get(IF_MTD, 0, 0);
205     if (dinfo) {
206         qdev_prop_set_drive(via1_dev, "drive", blk_by_legacy_dinfo(dinfo));
207     }
208     sysbus = SYS_BUS_DEVICE(via1_dev);
209     sysbus_realize_and_unref(sysbus, &error_fatal);
210     sysbus_mmio_map(sysbus, 1, VIA_BASE);
211     sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_VIA1));
212     /* A/UX mode */
213     qdev_connect_gpio_out(via1_dev, 0,
214                           qdev_get_gpio_in_named(glue, "auxmode", 0));
215 
216     adb_bus = qdev_get_child_bus(via1_dev, "adb.0");
217     dev = qdev_new(TYPE_ADB_KEYBOARD);
218     qdev_realize_and_unref(dev, adb_bus, &error_fatal);
219     dev = qdev_new(TYPE_ADB_MOUSE);
220     qdev_realize_and_unref(dev, adb_bus, &error_fatal);
221 
222     /* VIA 2 */
223     via2_dev = qdev_new(TYPE_MOS6522_Q800_VIA2);
224     sysbus = SYS_BUS_DEVICE(via2_dev);
225     sysbus_realize_and_unref(sysbus, &error_fatal);
226     sysbus_mmio_map(sysbus, 1, VIA_BASE + VIA_SIZE);
227     sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_VIA2));
228 
229     /* MACSONIC */
230 
231     if (nb_nics > 1) {
232         error_report("q800 can only have one ethernet interface");
233         exit(1);
234     }
235 
236     qemu_check_nic_model(&nd_table[0], "dp83932");
237 
238     /*
239      * MacSonic driver needs an Apple MAC address
240      * Valid prefix are:
241      * 00:05:02 Apple
242      * 00:80:19 Dayna Communications, Inc.
243      * 00:A0:40 Apple
244      * 08:00:07 Apple
245      * (Q800 use the last one)
246      */
247     nd_table[0].macaddr.a[0] = 0x08;
248     nd_table[0].macaddr.a[1] = 0x00;
249     nd_table[0].macaddr.a[2] = 0x07;
250 
251     dev = qdev_new("dp8393x");
252     qdev_set_nic_properties(dev, &nd_table[0]);
253     qdev_prop_set_uint8(dev, "it_shift", 2);
254     qdev_prop_set_bit(dev, "big_endian", true);
255     object_property_set_link(OBJECT(dev), "dma_mr",
256                              OBJECT(get_system_memory()), &error_abort);
257     sysbus = SYS_BUS_DEVICE(dev);
258     sysbus_realize_and_unref(sysbus, &error_fatal);
259     sysbus_mmio_map(sysbus, 0, SONIC_BASE);
260     sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_SONIC));
261 
262     memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom",
263                            SONIC_PROM_SIZE, &error_fatal);
264     memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE,
265                                 dp8393x_prom);
266 
267     /* Add MAC address with valid checksum to PROM */
268     prom = memory_region_get_ram_ptr(dp8393x_prom);
269     checksum = 0;
270     for (i = 0; i < 6; i++) {
271         prom[i] = revbit8(nd_table[0].macaddr.a[i]);
272         checksum ^= prom[i];
273     }
274     prom[7] = 0xff - checksum;
275 
276     /* SCC */
277 
278     dev = qdev_new(TYPE_ESCC);
279     qdev_prop_set_uint32(dev, "disabled", 0);
280     qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
281     qdev_prop_set_uint32(dev, "it_shift", 1);
282     qdev_prop_set_bit(dev, "bit_swap", true);
283     qdev_prop_set_chr(dev, "chrA", serial_hd(0));
284     qdev_prop_set_chr(dev, "chrB", serial_hd(1));
285     qdev_prop_set_uint32(dev, "chnBtype", 0);
286     qdev_prop_set_uint32(dev, "chnAtype", 0);
287     sysbus = SYS_BUS_DEVICE(dev);
288     sysbus_realize_and_unref(sysbus, &error_fatal);
289 
290     /* Logically OR both its IRQs together */
291     escc_orgate = DEVICE(object_new(TYPE_OR_IRQ));
292     object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal);
293     qdev_realize_and_unref(escc_orgate, NULL, &error_fatal);
294     sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0));
295     sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1));
296     qdev_connect_gpio_out(escc_orgate, 0,
297                           qdev_get_gpio_in(glue, GLUE_IRQ_IN_ESCC));
298     sysbus_mmio_map(sysbus, 0, SCC_BASE);
299 
300     /* SCSI */
301 
302     dev = qdev_new(TYPE_SYSBUS_ESP);
303     sysbus_esp = SYSBUS_ESP(dev);
304     esp = &sysbus_esp->esp;
305     esp->dma_memory_read = NULL;
306     esp->dma_memory_write = NULL;
307     esp->dma_opaque = NULL;
308     sysbus_esp->it_shift = 4;
309     esp->dma_enabled = 1;
310 
311     sysbus = SYS_BUS_DEVICE(dev);
312     sysbus_realize_and_unref(sysbus, &error_fatal);
313     /* SCSI and SCSI data IRQs are negative edge triggered */
314     sysbus_connect_irq(sysbus, 0, qemu_irq_invert(qdev_get_gpio_in(via2_dev,
315                                                   VIA2_IRQ_SCSI_BIT)));
316     sysbus_connect_irq(sysbus, 1, qemu_irq_invert(qdev_get_gpio_in(via2_dev,
317                                                   VIA2_IRQ_SCSI_DATA_BIT)));
318     sysbus_mmio_map(sysbus, 0, ESP_BASE);
319     sysbus_mmio_map(sysbus, 1, ESP_PDMA);
320 
321     scsi_bus_legacy_handle_cmdline(&esp->bus);
322 
323     /* SWIM floppy controller */
324 
325     dev = qdev_new(TYPE_SWIM);
326     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
327     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE);
328 
329     /* NuBus */
330 
331     dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE);
332     qdev_prop_set_uint32(dev, "slot-available-mask",
333                          Q800_NUBUS_SLOTS_AVAILABLE);
334     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
335     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0,
336                     MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE);
337     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE +
338                     MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE);
339     qdev_connect_gpio_out(dev, 9,
340                           qdev_get_gpio_in_named(via2_dev, "nubus-irq",
341                           VIA2_NUBUS_IRQ_INTVIDEO));
342     for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) {
343         qdev_connect_gpio_out(dev, 9 + i,
344                               qdev_get_gpio_in_named(via2_dev, "nubus-irq",
345                                                      VIA2_NUBUS_IRQ_9 + i));
346     }
347 
348     /*
349      * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused
350      * IRQ via GLUE for use by SONIC Ethernet in classic mode
351      */
352     qdev_connect_gpio_out(glue, GLUE_IRQ_NUBUS_9,
353                           qdev_get_gpio_in_named(via2_dev, "nubus-irq",
354                                                  VIA2_NUBUS_IRQ_9));
355 
356     nubus = &NUBUS_BRIDGE(dev)->bus;
357 
358     /* framebuffer in nubus slot #9 */
359 
360     dev = qdev_new(TYPE_NUBUS_MACFB);
361     qdev_prop_set_uint32(dev, "slot", 9);
362     qdev_prop_set_uint32(dev, "width", graphic_width);
363     qdev_prop_set_uint32(dev, "height", graphic_height);
364     qdev_prop_set_uint8(dev, "depth", graphic_depth);
365     if (graphic_width == 1152 && graphic_height == 870) {
366         qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR);
367     } else {
368         qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA);
369     }
370     qdev_realize_and_unref(dev, BUS(nubus), &error_fatal);
371 
372     macfb_mode = (NUBUS_MACFB(dev)->macfb).mode;
373 
374     cs = CPU(&m->cpu);
375     if (linux_boot) {
376         uint64_t high;
377         void *param_blob, *param_ptr, *param_rng_seed;
378 
379         if (kernel_cmdline) {
380             param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
381         } else {
382             param_blob = g_malloc(1024);
383         }
384 
385         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
386                                &elf_entry, NULL, &high, NULL, 1,
387                                EM_68K, 0, 0);
388         if (kernel_size < 0) {
389             error_report("could not load kernel '%s'", kernel_filename);
390             exit(1);
391         }
392         stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
393         parameters_base = (high + 1) & ~1;
394         param_ptr = param_blob;
395 
396         BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC);
397         BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
398         BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
399         BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
400         BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040);
401         BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800);
402         BOOTINFO1(param_ptr,
403                   BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
404         BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
405         BOOTINFO1(param_ptr, BI_MAC_VADDR,
406                   VIDEO_BASE + macfb_mode->offset);
407         BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth);
408         BOOTINFO1(param_ptr, BI_MAC_VDIM,
409                   (graphic_height << 16) | graphic_width);
410         BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride);
411         BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE);
412 
413         memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom",
414                                    sizeof(fake_mac_rom), fake_mac_rom);
415         memory_region_set_readonly(&m->rom, true);
416         memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
417 
418         if (kernel_cmdline) {
419             BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
420                         kernel_cmdline);
421         }
422 
423         /* Pass seed to RNG. */
424         param_rng_seed = param_ptr;
425         qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
426         BOOTINFODATA(param_ptr, BI_RNG_SEED,
427                      rng_seed, sizeof(rng_seed));
428 
429         /* load initrd */
430         if (initrd_filename) {
431             initrd_size = get_image_size(initrd_filename);
432             if (initrd_size < 0) {
433                 error_report("could not load initial ram disk '%s'",
434                              initrd_filename);
435                 exit(1);
436             }
437 
438             initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
439             load_image_targphys(initrd_filename, initrd_base,
440                                 ram_size - initrd_base);
441             BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
442                       initrd_size);
443         } else {
444             initrd_base = 0;
445             initrd_size = 0;
446         }
447         BOOTINFO0(param_ptr, BI_LAST);
448         rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
449                               parameters_base, cs->as);
450         qemu_register_reset_nosnapshotload(rerandomize_rng_seed,
451                             rom_ptr_for_as(cs->as, parameters_base,
452                                            param_ptr - param_blob) +
453                             (param_rng_seed - param_blob));
454         g_free(param_blob);
455     } else {
456         uint8_t *ptr;
457         /* allocate and load BIOS */
458         memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE,
459                                &error_abort);
460         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
461         memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
462 
463         /* Load MacROM binary */
464         if (filename) {
465             bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
466             g_free(filename);
467         } else {
468             bios_size = -1;
469         }
470 
471         /* Remove qtest_enabled() check once firmware files are in the tree */
472         if (!qtest_enabled()) {
473             if (bios_size <= 0 || bios_size > MACROM_SIZE) {
474                 error_report("could not load MacROM '%s'", bios_name);
475                 exit(1);
476             }
477 
478             ptr = rom_ptr(MACROM_ADDR, bios_size);
479             assert(ptr != NULL);
480             stl_phys(cs->as, 0, ldl_p(ptr));    /* reset initial SP */
481             stl_phys(cs->as, 4,
482                      MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */
483         }
484     }
485 }
486 
487 static GlobalProperty hw_compat_q800[] = {
488     { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" },
489     { "scsi-hd", "vendor", " SEAGATE" },
490     { "scsi-hd", "product", "          ST225N" },
491     { "scsi-hd", "ver", "1.0 " },
492     { "scsi-cd", "quirk_mode_page_apple_vendor", "on" },
493     { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" },
494     { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" },
495     { "scsi-cd", "quirk_mode_page_truncated", "on" },
496     { "scsi-cd", "vendor", "MATSHITA" },
497     { "scsi-cd", "product", "CD-ROM CR-8005" },
498     { "scsi-cd", "ver", "1.0k" },
499 };
500 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800);
501 
502 static const char *q800_machine_valid_cpu_types[] = {
503     M68K_CPU_TYPE_NAME("m68040"),
504     NULL
505 };
506 
507 static void q800_machine_class_init(ObjectClass *oc, void *data)
508 {
509     MachineClass *mc = MACHINE_CLASS(oc);
510 
511     mc->desc = "Macintosh Quadra 800";
512     mc->init = q800_machine_init;
513     mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
514     mc->valid_cpu_types = q800_machine_valid_cpu_types;
515     mc->max_cpus = 1;
516     mc->block_default_type = IF_SCSI;
517     mc->default_ram_id = "m68k_mac.ram";
518     compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len);
519 }
520 
521 static const TypeInfo q800_machine_typeinfo = {
522     .name       = MACHINE_TYPE_NAME("q800"),
523     .parent     = TYPE_MACHINE,
524     .instance_size = sizeof(Q800MachineState),
525     .class_init = q800_machine_class_init,
526 };
527 
528 static void q800_machine_register_types(void)
529 {
530     type_register_static(&q800_machine_typeinfo);
531 }
532 
533 type_init(q800_machine_register_types)
534