1 /* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qemu/units.h" 25 #include "qemu/datadir.h" 26 #include "qemu/guest-random.h" 27 #include "sysemu/sysemu.h" 28 #include "cpu.h" 29 #include "hw/boards.h" 30 #include "hw/or-irq.h" 31 #include "elf.h" 32 #include "hw/loader.h" 33 #include "ui/console.h" 34 #include "hw/char/escc.h" 35 #include "hw/sysbus.h" 36 #include "hw/scsi/esp.h" 37 #include "standard-headers/asm-m68k/bootinfo.h" 38 #include "standard-headers/asm-m68k/bootinfo-mac.h" 39 #include "bootinfo.h" 40 #include "hw/m68k/q800.h" 41 #include "hw/m68k/q800-glue.h" 42 #include "hw/misc/mac_via.h" 43 #include "hw/input/adb.h" 44 #include "hw/nubus/mac-nubus-bridge.h" 45 #include "hw/display/macfb.h" 46 #include "hw/block/swim.h" 47 #include "net/net.h" 48 #include "qapi/error.h" 49 #include "qemu/error-report.h" 50 #include "sysemu/qtest.h" 51 #include "sysemu/runstate.h" 52 #include "sysemu/reset.h" 53 #include "migration/vmstate.h" 54 55 #define MACROM_ADDR 0x40800000 56 #define MACROM_SIZE 0x00100000 57 58 #define MACROM_FILENAME "MacROM.bin" 59 60 #define IO_BASE 0x50000000 61 #define IO_SLICE 0x00040000 62 #define IO_SLICE_MASK (IO_SLICE - 1) 63 #define IO_SIZE 0x04000000 64 65 #define VIA_BASE (IO_BASE + 0x00000) 66 #define SONIC_PROM_BASE (IO_BASE + 0x08000) 67 #define SONIC_BASE (IO_BASE + 0x0a000) 68 #define SCC_BASE (IO_BASE + 0x0c020) 69 #define ESP_BASE (IO_BASE + 0x10000) 70 #define ESP_PDMA (IO_BASE + 0x10100) 71 #define ASC_BASE (IO_BASE + 0x14000) 72 #define SWIM_BASE (IO_BASE + 0x1E000) 73 74 #define SONIC_PROM_SIZE 0x1000 75 76 /* 77 * the video base, whereas it a Nubus address, 78 * is needed by the kernel to have early display and 79 * thus provided by the bootloader 80 */ 81 #define VIDEO_BASE 0xf9000000 82 83 #define MAC_CLOCK 3686418 84 85 /* 86 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only 87 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800 88 */ 89 #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \ 90 BIT(0xe)) 91 92 93 static void main_cpu_reset(void *opaque) 94 { 95 M68kCPU *cpu = opaque; 96 CPUState *cs = CPU(cpu); 97 98 cpu_reset(cs); 99 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 100 cpu->env.pc = ldl_phys(cs->as, 4); 101 } 102 103 static void rerandomize_rng_seed(void *opaque) 104 { 105 struct bi_record *rng_seed = opaque; 106 qemu_guest_getrandom_nofail((void *)rng_seed->data + 2, 107 be16_to_cpu(*(uint16_t *)rng_seed->data)); 108 } 109 110 static uint8_t fake_mac_rom[] = { 111 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 112 113 /* offset: 0xa - mac_reset */ 114 115 /* via2[vDirB] |= VIA2B_vPower */ 116 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 117 0x10, 0x10, /* moveb %a0@,%d0 */ 118 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 119 0x10, 0x80, /* moveb %d0,%a0@ */ 120 121 /* via2[vBufB] &= ~VIA2B_vPower */ 122 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 123 0x10, 0x10, /* moveb %a0@,%d0 */ 124 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 125 0x10, 0x80, /* moveb %d0,%a0@ */ 126 127 /* while (true) ; */ 128 0x60, 0xFE /* bras [self] */ 129 }; 130 131 static MemTxResult macio_alias_read(void *opaque, hwaddr addr, uint64_t *data, 132 unsigned size, MemTxAttrs attrs) 133 { 134 MemTxResult r; 135 uint32_t val; 136 137 addr &= IO_SLICE_MASK; 138 addr |= IO_BASE; 139 140 switch (size) { 141 case 4: 142 val = address_space_ldl_be(&address_space_memory, addr, attrs, &r); 143 break; 144 case 2: 145 val = address_space_lduw_be(&address_space_memory, addr, attrs, &r); 146 break; 147 case 1: 148 val = address_space_ldub(&address_space_memory, addr, attrs, &r); 149 break; 150 default: 151 g_assert_not_reached(); 152 } 153 154 *data = val; 155 return r; 156 } 157 158 static MemTxResult macio_alias_write(void *opaque, hwaddr addr, uint64_t value, 159 unsigned size, MemTxAttrs attrs) 160 { 161 MemTxResult r; 162 163 addr &= IO_SLICE_MASK; 164 addr |= IO_BASE; 165 166 switch (size) { 167 case 4: 168 address_space_stl_be(&address_space_memory, addr, value, attrs, &r); 169 break; 170 case 2: 171 address_space_stw_be(&address_space_memory, addr, value, attrs, &r); 172 break; 173 case 1: 174 address_space_stb(&address_space_memory, addr, value, attrs, &r); 175 break; 176 default: 177 g_assert_not_reached(); 178 } 179 180 return r; 181 } 182 183 static const MemoryRegionOps macio_alias_ops = { 184 .read_with_attrs = macio_alias_read, 185 .write_with_attrs = macio_alias_write, 186 .endianness = DEVICE_BIG_ENDIAN, 187 .valid = { 188 .min_access_size = 1, 189 .max_access_size = 4, 190 }, 191 }; 192 193 static void q800_machine_init(MachineState *machine) 194 { 195 Q800MachineState *m = Q800_MACHINE(machine); 196 int linux_boot; 197 int32_t kernel_size; 198 uint64_t elf_entry; 199 char *filename; 200 int bios_size; 201 ram_addr_t initrd_base; 202 int32_t initrd_size; 203 MemoryRegion *dp8393x_prom = g_new(MemoryRegion, 1); 204 uint8_t *prom; 205 int i, checksum; 206 MacFbMode *macfb_mode; 207 ram_addr_t ram_size = machine->ram_size; 208 const char *kernel_filename = machine->kernel_filename; 209 const char *initrd_filename = machine->initrd_filename; 210 const char *kernel_cmdline = machine->kernel_cmdline; 211 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 212 hwaddr parameters_base; 213 CPUState *cs; 214 DeviceState *dev; 215 DeviceState *escc_orgate; 216 SysBusESPState *sysbus_esp; 217 ESPState *esp; 218 SysBusDevice *sysbus; 219 BusState *adb_bus; 220 NubusBus *nubus; 221 DriveInfo *dinfo; 222 uint8_t rng_seed[32]; 223 224 linux_boot = (kernel_filename != NULL); 225 226 if (ram_size > 1 * GiB) { 227 error_report("Too much memory for this machine: %" PRId64 " MiB, " 228 "maximum 1024 MiB", ram_size / MiB); 229 exit(1); 230 } 231 232 /* init CPUs */ 233 object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type); 234 qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal); 235 qemu_register_reset(main_cpu_reset, &m->cpu); 236 237 /* RAM */ 238 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 239 240 /* 241 * Create container for all IO devices 242 */ 243 memory_region_init(&m->macio, OBJECT(machine), "mac-io", IO_SLICE); 244 memory_region_add_subregion(get_system_memory(), IO_BASE, &m->macio); 245 246 /* 247 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 248 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 249 */ 250 memory_region_init_io(&m->macio_alias, OBJECT(machine), &macio_alias_ops, 251 &m->macio, "mac-io.alias", IO_SIZE - IO_SLICE); 252 memory_region_add_subregion(get_system_memory(), IO_BASE + IO_SLICE, 253 &m->macio_alias); 254 255 /* IRQ Glue */ 256 object_initialize_child(OBJECT(machine), "glue", &m->glue, TYPE_GLUE); 257 object_property_set_link(OBJECT(&m->glue), "cpu", OBJECT(&m->cpu), 258 &error_abort); 259 sysbus_realize(SYS_BUS_DEVICE(&m->glue), &error_fatal); 260 261 /* VIA 1 */ 262 object_initialize_child(OBJECT(machine), "via1", &m->via1, 263 TYPE_MOS6522_Q800_VIA1); 264 dinfo = drive_get(IF_MTD, 0, 0); 265 if (dinfo) { 266 qdev_prop_set_drive(DEVICE(&m->via1), "drive", 267 blk_by_legacy_dinfo(dinfo)); 268 } 269 sysbus = SYS_BUS_DEVICE(&m->via1); 270 sysbus_realize(sysbus, &error_fatal); 271 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE, 272 sysbus_mmio_get_region(sysbus, 1)); 273 sysbus_connect_irq(sysbus, 0, 274 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA1)); 275 /* A/UX mode */ 276 qdev_connect_gpio_out(DEVICE(&m->via1), 0, 277 qdev_get_gpio_in_named(DEVICE(&m->glue), 278 "auxmode", 0)); 279 280 adb_bus = qdev_get_child_bus(DEVICE(&m->via1), "adb.0"); 281 dev = qdev_new(TYPE_ADB_KEYBOARD); 282 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 283 dev = qdev_new(TYPE_ADB_MOUSE); 284 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 285 286 /* VIA 2 */ 287 object_initialize_child(OBJECT(machine), "via2", &m->via2, 288 TYPE_MOS6522_Q800_VIA2); 289 sysbus = SYS_BUS_DEVICE(&m->via2); 290 sysbus_realize(sysbus, &error_fatal); 291 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE + VIA_SIZE, 292 sysbus_mmio_get_region(sysbus, 1)); 293 sysbus_connect_irq(sysbus, 0, 294 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA2)); 295 296 /* MACSONIC */ 297 298 if (nb_nics > 1) { 299 error_report("q800 can only have one ethernet interface"); 300 exit(1); 301 } 302 303 qemu_check_nic_model(&nd_table[0], "dp83932"); 304 305 /* 306 * MacSonic driver needs an Apple MAC address 307 * Valid prefix are: 308 * 00:05:02 Apple 309 * 00:80:19 Dayna Communications, Inc. 310 * 00:A0:40 Apple 311 * 08:00:07 Apple 312 * (Q800 use the last one) 313 */ 314 nd_table[0].macaddr.a[0] = 0x08; 315 nd_table[0].macaddr.a[1] = 0x00; 316 nd_table[0].macaddr.a[2] = 0x07; 317 318 object_initialize_child(OBJECT(machine), "dp8393x", &m->dp8393x, 319 TYPE_DP8393X); 320 dev = DEVICE(&m->dp8393x); 321 qdev_set_nic_properties(dev, &nd_table[0]); 322 qdev_prop_set_uint8(dev, "it_shift", 2); 323 qdev_prop_set_bit(dev, "big_endian", true); 324 object_property_set_link(OBJECT(dev), "dma_mr", 325 OBJECT(get_system_memory()), &error_abort); 326 sysbus = SYS_BUS_DEVICE(dev); 327 sysbus_realize(sysbus, &error_fatal); 328 memory_region_add_subregion(&m->macio, SONIC_BASE - IO_BASE, 329 sysbus_mmio_get_region(sysbus, 0)); 330 sysbus_connect_irq(sysbus, 0, 331 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_SONIC)); 332 333 memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom", 334 SONIC_PROM_SIZE, &error_fatal); 335 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE, 336 dp8393x_prom); 337 338 /* Add MAC address with valid checksum to PROM */ 339 prom = memory_region_get_ram_ptr(dp8393x_prom); 340 checksum = 0; 341 for (i = 0; i < 6; i++) { 342 prom[i] = revbit8(nd_table[0].macaddr.a[i]); 343 checksum ^= prom[i]; 344 } 345 prom[7] = 0xff - checksum; 346 347 /* SCC */ 348 349 dev = qdev_new(TYPE_ESCC); 350 qdev_prop_set_uint32(dev, "disabled", 0); 351 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 352 qdev_prop_set_uint32(dev, "it_shift", 1); 353 qdev_prop_set_bit(dev, "bit_swap", true); 354 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 355 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 356 qdev_prop_set_uint32(dev, "chnBtype", 0); 357 qdev_prop_set_uint32(dev, "chnAtype", 0); 358 sysbus = SYS_BUS_DEVICE(dev); 359 sysbus_realize_and_unref(sysbus, &error_fatal); 360 361 /* Logically OR both its IRQs together */ 362 escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); 363 object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); 364 qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); 365 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); 366 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); 367 qdev_connect_gpio_out(escc_orgate, 0, 368 qdev_get_gpio_in(DEVICE(&m->glue), 369 GLUE_IRQ_IN_ESCC)); 370 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE, 371 sysbus_mmio_get_region(sysbus, 0)); 372 373 /* SCSI */ 374 375 dev = qdev_new(TYPE_SYSBUS_ESP); 376 sysbus_esp = SYSBUS_ESP(dev); 377 esp = &sysbus_esp->esp; 378 esp->dma_memory_read = NULL; 379 esp->dma_memory_write = NULL; 380 esp->dma_opaque = NULL; 381 sysbus_esp->it_shift = 4; 382 esp->dma_enabled = 1; 383 384 sysbus = SYS_BUS_DEVICE(dev); 385 sysbus_realize_and_unref(sysbus, &error_fatal); 386 /* SCSI and SCSI data IRQs are negative edge triggered */ 387 sysbus_connect_irq(sysbus, 0, 388 qemu_irq_invert( 389 qdev_get_gpio_in(DEVICE(&m->via2), 390 VIA2_IRQ_SCSI_BIT))); 391 sysbus_connect_irq(sysbus, 1, 392 qemu_irq_invert( 393 qdev_get_gpio_in(DEVICE(&m->via2), 394 VIA2_IRQ_SCSI_DATA_BIT))); 395 memory_region_add_subregion(&m->macio, ESP_BASE - IO_BASE, 396 sysbus_mmio_get_region(sysbus, 0)); 397 memory_region_add_subregion(&m->macio, ESP_PDMA - IO_BASE, 398 sysbus_mmio_get_region(sysbus, 1)); 399 400 scsi_bus_legacy_handle_cmdline(&esp->bus); 401 402 /* SWIM floppy controller */ 403 404 dev = qdev_new(TYPE_SWIM); 405 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 406 memory_region_add_subregion(&m->macio, SWIM_BASE - IO_BASE, 407 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 408 409 /* NuBus */ 410 411 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); 412 qdev_prop_set_uint32(dev, "slot-available-mask", 413 Q800_NUBUS_SLOTS_AVAILABLE); 414 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 415 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 416 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE); 417 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE + 418 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE); 419 qdev_connect_gpio_out(dev, 9, 420 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq", 421 VIA2_NUBUS_IRQ_INTVIDEO)); 422 for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) { 423 qdev_connect_gpio_out(dev, 9 + i, 424 qdev_get_gpio_in_named(DEVICE(&m->via2), 425 "nubus-irq", 426 VIA2_NUBUS_IRQ_9 + i)); 427 } 428 429 /* 430 * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused 431 * IRQ via GLUE for use by SONIC Ethernet in classic mode 432 */ 433 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_NUBUS_9, 434 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq", 435 VIA2_NUBUS_IRQ_9)); 436 437 nubus = &NUBUS_BRIDGE(dev)->bus; 438 439 /* framebuffer in nubus slot #9 */ 440 441 dev = qdev_new(TYPE_NUBUS_MACFB); 442 qdev_prop_set_uint32(dev, "slot", 9); 443 qdev_prop_set_uint32(dev, "width", graphic_width); 444 qdev_prop_set_uint32(dev, "height", graphic_height); 445 qdev_prop_set_uint8(dev, "depth", graphic_depth); 446 if (graphic_width == 1152 && graphic_height == 870) { 447 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR); 448 } else { 449 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA); 450 } 451 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); 452 453 macfb_mode = (NUBUS_MACFB(dev)->macfb).mode; 454 455 cs = CPU(&m->cpu); 456 if (linux_boot) { 457 uint64_t high; 458 void *param_blob, *param_ptr, *param_rng_seed; 459 460 if (kernel_cmdline) { 461 param_blob = g_malloc(strlen(kernel_cmdline) + 1024); 462 } else { 463 param_blob = g_malloc(1024); 464 } 465 466 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 467 &elf_entry, NULL, &high, NULL, 1, 468 EM_68K, 0, 0); 469 if (kernel_size < 0) { 470 error_report("could not load kernel '%s'", kernel_filename); 471 exit(1); 472 } 473 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 474 parameters_base = (high + 1) & ~1; 475 param_ptr = param_blob; 476 477 BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC); 478 BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040); 479 BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040); 480 BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040); 481 BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040); 482 BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800); 483 BOOTINFO1(param_ptr, 484 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 485 BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size); 486 BOOTINFO1(param_ptr, BI_MAC_VADDR, 487 VIDEO_BASE + macfb_mode->offset); 488 BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth); 489 BOOTINFO1(param_ptr, BI_MAC_VDIM, 490 (graphic_height << 16) | graphic_width); 491 BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride); 492 BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE); 493 494 memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom", 495 sizeof(fake_mac_rom), fake_mac_rom); 496 memory_region_set_readonly(&m->rom, true); 497 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom); 498 499 if (kernel_cmdline) { 500 BOOTINFOSTR(param_ptr, BI_COMMAND_LINE, 501 kernel_cmdline); 502 } 503 504 /* Pass seed to RNG. */ 505 param_rng_seed = param_ptr; 506 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed)); 507 BOOTINFODATA(param_ptr, BI_RNG_SEED, 508 rng_seed, sizeof(rng_seed)); 509 510 /* load initrd */ 511 if (initrd_filename) { 512 initrd_size = get_image_size(initrd_filename); 513 if (initrd_size < 0) { 514 error_report("could not load initial ram disk '%s'", 515 initrd_filename); 516 exit(1); 517 } 518 519 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 520 load_image_targphys(initrd_filename, initrd_base, 521 ram_size - initrd_base); 522 BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base, 523 initrd_size); 524 } else { 525 initrd_base = 0; 526 initrd_size = 0; 527 } 528 BOOTINFO0(param_ptr, BI_LAST); 529 rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob, 530 parameters_base, cs->as); 531 qemu_register_reset_nosnapshotload(rerandomize_rng_seed, 532 rom_ptr_for_as(cs->as, parameters_base, 533 param_ptr - param_blob) + 534 (param_rng_seed - param_blob)); 535 g_free(param_blob); 536 } else { 537 uint8_t *ptr; 538 /* allocate and load BIOS */ 539 memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE, 540 &error_abort); 541 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 542 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom); 543 544 /* Load MacROM binary */ 545 if (filename) { 546 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 547 g_free(filename); 548 } else { 549 bios_size = -1; 550 } 551 552 /* Remove qtest_enabled() check once firmware files are in the tree */ 553 if (!qtest_enabled()) { 554 if (bios_size <= 0 || bios_size > MACROM_SIZE) { 555 error_report("could not load MacROM '%s'", bios_name); 556 exit(1); 557 } 558 559 ptr = rom_ptr(MACROM_ADDR, bios_size); 560 assert(ptr != NULL); 561 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ 562 stl_phys(cs->as, 4, 563 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ 564 } 565 } 566 } 567 568 static GlobalProperty hw_compat_q800[] = { 569 { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" }, 570 { "scsi-hd", "vendor", " SEAGATE" }, 571 { "scsi-hd", "product", " ST225N" }, 572 { "scsi-hd", "ver", "1.0 " }, 573 { "scsi-cd", "quirk_mode_page_apple_vendor", "on" }, 574 { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" }, 575 { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" }, 576 { "scsi-cd", "quirk_mode_page_truncated", "on" }, 577 { "scsi-cd", "vendor", "MATSHITA" }, 578 { "scsi-cd", "product", "CD-ROM CR-8005" }, 579 { "scsi-cd", "ver", "1.0k" }, 580 }; 581 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800); 582 583 static const char *q800_machine_valid_cpu_types[] = { 584 M68K_CPU_TYPE_NAME("m68040"), 585 NULL 586 }; 587 588 static void q800_machine_class_init(ObjectClass *oc, void *data) 589 { 590 MachineClass *mc = MACHINE_CLASS(oc); 591 592 mc->desc = "Macintosh Quadra 800"; 593 mc->init = q800_machine_init; 594 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 595 mc->valid_cpu_types = q800_machine_valid_cpu_types; 596 mc->max_cpus = 1; 597 mc->block_default_type = IF_SCSI; 598 mc->default_ram_id = "m68k_mac.ram"; 599 compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len); 600 } 601 602 static const TypeInfo q800_machine_typeinfo = { 603 .name = MACHINE_TYPE_NAME("q800"), 604 .parent = TYPE_MACHINE, 605 .instance_size = sizeof(Q800MachineState), 606 .class_init = q800_machine_class_init, 607 }; 608 609 static void q800_machine_register_types(void) 610 { 611 type_register_static(&q800_machine_typeinfo); 612 } 613 614 type_init(q800_machine_register_types) 615