1 /* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qemu/units.h" 25 #include "qemu-common.h" 26 #include "qemu/datadir.h" 27 #include "sysemu/sysemu.h" 28 #include "cpu.h" 29 #include "hw/boards.h" 30 #include "hw/or-irq.h" 31 #include "elf.h" 32 #include "hw/loader.h" 33 #include "ui/console.h" 34 #include "hw/char/escc.h" 35 #include "hw/sysbus.h" 36 #include "hw/scsi/esp.h" 37 #include "standard-headers/asm-m68k/bootinfo.h" 38 #include "standard-headers/asm-m68k/bootinfo-mac.h" 39 #include "bootinfo.h" 40 #include "hw/misc/mac_via.h" 41 #include "hw/input/adb.h" 42 #include "hw/nubus/mac-nubus-bridge.h" 43 #include "hw/display/macfb.h" 44 #include "hw/block/swim.h" 45 #include "net/net.h" 46 #include "qapi/error.h" 47 #include "sysemu/qtest.h" 48 #include "sysemu/runstate.h" 49 #include "sysemu/reset.h" 50 #include "migration/vmstate.h" 51 52 #define MACROM_ADDR 0x40800000 53 #define MACROM_SIZE 0x00100000 54 55 #define MACROM_FILENAME "MacROM.bin" 56 57 #define IO_BASE 0x50000000 58 #define IO_SLICE 0x00040000 59 #define IO_SIZE 0x04000000 60 61 #define VIA_BASE (IO_BASE + 0x00000) 62 #define SONIC_PROM_BASE (IO_BASE + 0x08000) 63 #define SONIC_BASE (IO_BASE + 0x0a000) 64 #define SCC_BASE (IO_BASE + 0x0c020) 65 #define ESP_BASE (IO_BASE + 0x10000) 66 #define ESP_PDMA (IO_BASE + 0x10100) 67 #define ASC_BASE (IO_BASE + 0x14000) 68 #define SWIM_BASE (IO_BASE + 0x1E000) 69 70 #define NUBUS_SUPER_SLOT_BASE 0x60000000 71 #define NUBUS_SLOT_BASE 0xf0000000 72 73 /* 74 * the video base, whereas it a Nubus address, 75 * is needed by the kernel to have early display and 76 * thus provided by the bootloader 77 */ 78 #define VIDEO_BASE 0xf9001000 79 80 #define MAC_CLOCK 3686418 81 82 /* 83 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip 84 * that performs a variety of functions (RAM management, clock generation, ...). 85 * The GLUE chip receives interrupt requests from various devices, 86 * assign priority to each, and asserts one or more interrupt line to the 87 * CPU. 88 */ 89 90 #define TYPE_GLUE "q800-glue" 91 OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE) 92 93 struct GLUEState { 94 SysBusDevice parent_obj; 95 M68kCPU *cpu; 96 uint8_t ipr; 97 }; 98 99 static void GLUE_set_irq(void *opaque, int irq, int level) 100 { 101 GLUEState *s = opaque; 102 int i; 103 104 if (level) { 105 s->ipr |= 1 << irq; 106 } else { 107 s->ipr &= ~(1 << irq); 108 } 109 110 for (i = 7; i >= 0; i--) { 111 if ((s->ipr >> i) & 1) { 112 m68k_set_irq_level(s->cpu, i + 1, i + 25); 113 return; 114 } 115 } 116 m68k_set_irq_level(s->cpu, 0, 0); 117 } 118 119 static void glue_reset(DeviceState *dev) 120 { 121 GLUEState *s = GLUE(dev); 122 123 s->ipr = 0; 124 } 125 126 static const VMStateDescription vmstate_glue = { 127 .name = "q800-glue", 128 .version_id = 0, 129 .minimum_version_id = 0, 130 .fields = (VMStateField[]) { 131 VMSTATE_UINT8(ipr, GLUEState), 132 VMSTATE_END_OF_LIST(), 133 }, 134 }; 135 136 /* 137 * If the m68k CPU implemented its inbound irq lines as GPIO lines 138 * rather than via the m68k_set_irq_level() function we would not need 139 * this cpu link property and could instead provide outbound IRQ lines 140 * that the board could wire up to the CPU. 141 */ 142 static Property glue_properties[] = { 143 DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), 144 DEFINE_PROP_END_OF_LIST(), 145 }; 146 147 static void glue_init(Object *obj) 148 { 149 DeviceState *dev = DEVICE(obj); 150 151 qdev_init_gpio_in(dev, GLUE_set_irq, 8); 152 } 153 154 static void glue_class_init(ObjectClass *klass, void *data) 155 { 156 DeviceClass *dc = DEVICE_CLASS(klass); 157 158 dc->vmsd = &vmstate_glue; 159 dc->reset = glue_reset; 160 device_class_set_props(dc, glue_properties); 161 } 162 163 static const TypeInfo glue_info = { 164 .name = TYPE_GLUE, 165 .parent = TYPE_SYS_BUS_DEVICE, 166 .instance_size = sizeof(GLUEState), 167 .instance_init = glue_init, 168 .class_init = glue_class_init, 169 }; 170 171 static void main_cpu_reset(void *opaque) 172 { 173 M68kCPU *cpu = opaque; 174 CPUState *cs = CPU(cpu); 175 176 cpu_reset(cs); 177 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 178 cpu->env.pc = ldl_phys(cs->as, 4); 179 } 180 181 static uint8_t fake_mac_rom[] = { 182 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 183 184 /* offset: 0xa - mac_reset */ 185 186 /* via2[vDirB] |= VIA2B_vPower */ 187 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 188 0x10, 0x10, /* moveb %a0@,%d0 */ 189 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 190 0x10, 0x80, /* moveb %d0,%a0@ */ 191 192 /* via2[vBufB] &= ~VIA2B_vPower */ 193 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 194 0x10, 0x10, /* moveb %a0@,%d0 */ 195 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 196 0x10, 0x80, /* moveb %d0,%a0@ */ 197 198 /* while (true) ; */ 199 0x60, 0xFE /* bras [self] */ 200 }; 201 202 static void q800_init(MachineState *machine) 203 { 204 M68kCPU *cpu = NULL; 205 int linux_boot; 206 int32_t kernel_size; 207 uint64_t elf_entry; 208 char *filename; 209 int bios_size; 210 ram_addr_t initrd_base; 211 int32_t initrd_size; 212 MemoryRegion *rom; 213 MemoryRegion *io; 214 const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1; 215 int i; 216 ram_addr_t ram_size = machine->ram_size; 217 const char *kernel_filename = machine->kernel_filename; 218 const char *initrd_filename = machine->initrd_filename; 219 const char *kernel_cmdline = machine->kernel_cmdline; 220 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 221 hwaddr parameters_base; 222 CPUState *cs; 223 DeviceState *dev; 224 DeviceState *via_dev; 225 DeviceState *escc_orgate; 226 SysBusESPState *sysbus_esp; 227 ESPState *esp; 228 SysBusDevice *sysbus; 229 BusState *adb_bus; 230 NubusBus *nubus; 231 DeviceState *glue; 232 DriveInfo *dinfo; 233 234 linux_boot = (kernel_filename != NULL); 235 236 if (ram_size > 1 * GiB) { 237 error_report("Too much memory for this machine: %" PRId64 " MiB, " 238 "maximum 1024 MiB", ram_size / MiB); 239 exit(1); 240 } 241 242 /* init CPUs */ 243 cpu = M68K_CPU(cpu_create(machine->cpu_type)); 244 qemu_register_reset(main_cpu_reset, cpu); 245 246 /* RAM */ 247 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 248 249 /* 250 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 251 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 252 */ 253 io = g_new(MemoryRegion, io_slice_nb); 254 for (i = 0; i < io_slice_nb; i++) { 255 char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1); 256 257 memory_region_init_alias(&io[i], NULL, name, get_system_memory(), 258 IO_BASE, IO_SLICE); 259 memory_region_add_subregion(get_system_memory(), 260 IO_BASE + (i + 1) * IO_SLICE, &io[i]); 261 g_free(name); 262 } 263 264 /* IRQ Glue */ 265 glue = qdev_new(TYPE_GLUE); 266 object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort); 267 sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal); 268 269 /* VIA */ 270 271 via_dev = qdev_new(TYPE_MAC_VIA); 272 dinfo = drive_get(IF_MTD, 0, 0); 273 if (dinfo) { 274 qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo)); 275 } 276 sysbus = SYS_BUS_DEVICE(via_dev); 277 sysbus_realize_and_unref(sysbus, &error_fatal); 278 sysbus_mmio_map(sysbus, 0, VIA_BASE); 279 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, 280 qdev_get_gpio_in(glue, 0)); 281 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, 282 qdev_get_gpio_in(glue, 1)); 283 284 285 adb_bus = qdev_get_child_bus(via_dev, "adb.0"); 286 dev = qdev_new(TYPE_ADB_KEYBOARD); 287 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 288 dev = qdev_new(TYPE_ADB_MOUSE); 289 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 290 291 /* MACSONIC */ 292 293 if (nb_nics > 1) { 294 error_report("q800 can only have one ethernet interface"); 295 exit(1); 296 } 297 298 qemu_check_nic_model(&nd_table[0], "dp83932"); 299 300 /* 301 * MacSonic driver needs an Apple MAC address 302 * Valid prefix are: 303 * 00:05:02 Apple 304 * 00:80:19 Dayna Communications, Inc. 305 * 00:A0:40 Apple 306 * 08:00:07 Apple 307 * (Q800 use the last one) 308 */ 309 nd_table[0].macaddr.a[0] = 0x08; 310 nd_table[0].macaddr.a[1] = 0x00; 311 nd_table[0].macaddr.a[2] = 0x07; 312 313 dev = qdev_new("dp8393x"); 314 qdev_set_nic_properties(dev, &nd_table[0]); 315 qdev_prop_set_uint8(dev, "it_shift", 2); 316 qdev_prop_set_bit(dev, "big_endian", true); 317 object_property_set_link(OBJECT(dev), "dma_mr", 318 OBJECT(get_system_memory()), &error_abort); 319 sysbus = SYS_BUS_DEVICE(dev); 320 sysbus_realize_and_unref(sysbus, &error_fatal); 321 sysbus_mmio_map(sysbus, 0, SONIC_BASE); 322 sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); 323 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); 324 325 /* SCC */ 326 327 dev = qdev_new(TYPE_ESCC); 328 qdev_prop_set_uint32(dev, "disabled", 0); 329 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 330 qdev_prop_set_uint32(dev, "it_shift", 1); 331 qdev_prop_set_bit(dev, "bit_swap", true); 332 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 333 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 334 qdev_prop_set_uint32(dev, "chnBtype", 0); 335 qdev_prop_set_uint32(dev, "chnAtype", 0); 336 sysbus = SYS_BUS_DEVICE(dev); 337 sysbus_realize_and_unref(sysbus, &error_fatal); 338 339 /* Logically OR both its IRQs together */ 340 escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); 341 object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); 342 qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); 343 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); 344 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); 345 qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3)); 346 sysbus_mmio_map(sysbus, 0, SCC_BASE); 347 348 /* SCSI */ 349 350 dev = qdev_new(TYPE_SYSBUS_ESP); 351 sysbus_esp = SYSBUS_ESP(dev); 352 esp = &sysbus_esp->esp; 353 esp->dma_memory_read = NULL; 354 esp->dma_memory_write = NULL; 355 esp->dma_opaque = NULL; 356 sysbus_esp->it_shift = 4; 357 esp->dma_enabled = 1; 358 359 sysbus = SYS_BUS_DEVICE(dev); 360 sysbus_realize_and_unref(sysbus, &error_fatal); 361 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev, 362 "via2-irq", 363 VIA2_IRQ_SCSI_BIT)); 364 sysbus_connect_irq(sysbus, 1, 365 qdev_get_gpio_in_named(via_dev, "via2-irq", 366 VIA2_IRQ_SCSI_DATA_BIT)); 367 sysbus_mmio_map(sysbus, 0, ESP_BASE); 368 sysbus_mmio_map(sysbus, 1, ESP_PDMA); 369 370 scsi_bus_legacy_handle_cmdline(&esp->bus); 371 372 /* SWIM floppy controller */ 373 374 dev = qdev_new(TYPE_SWIM); 375 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 376 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); 377 378 /* NuBus */ 379 380 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); 381 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 382 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE); 383 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE); 384 385 nubus = MAC_NUBUS_BRIDGE(dev)->bus; 386 387 /* framebuffer in nubus slot #9 */ 388 389 dev = qdev_new(TYPE_NUBUS_MACFB); 390 qdev_prop_set_uint32(dev, "width", graphic_width); 391 qdev_prop_set_uint32(dev, "height", graphic_height); 392 qdev_prop_set_uint8(dev, "depth", graphic_depth); 393 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); 394 395 cs = CPU(cpu); 396 if (linux_boot) { 397 uint64_t high; 398 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 399 &elf_entry, NULL, &high, NULL, 1, 400 EM_68K, 0, 0); 401 if (kernel_size < 0) { 402 error_report("could not load kernel '%s'", kernel_filename); 403 exit(1); 404 } 405 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 406 parameters_base = (high + 1) & ~1; 407 408 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC); 409 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); 410 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); 411 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); 412 BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, CPUB_68040); 413 BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, MAC_MODEL_Q800); 414 BOOTINFO1(cs->as, parameters_base, 415 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 416 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); 417 BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE); 418 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth); 419 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM, 420 (graphic_height << 16) | graphic_width); 421 BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW, 422 (graphic_width * graphic_depth + 7) / 8); 423 BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE); 424 425 rom = g_malloc(sizeof(*rom)); 426 memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", 427 sizeof(fake_mac_rom), fake_mac_rom); 428 memory_region_set_readonly(rom, true); 429 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 430 431 if (kernel_cmdline) { 432 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, 433 kernel_cmdline); 434 } 435 436 /* load initrd */ 437 if (initrd_filename) { 438 initrd_size = get_image_size(initrd_filename); 439 if (initrd_size < 0) { 440 error_report("could not load initial ram disk '%s'", 441 initrd_filename); 442 exit(1); 443 } 444 445 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 446 load_image_targphys(initrd_filename, initrd_base, 447 ram_size - initrd_base); 448 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, 449 initrd_size); 450 } else { 451 initrd_base = 0; 452 initrd_size = 0; 453 } 454 BOOTINFO0(cs->as, parameters_base, BI_LAST); 455 } else { 456 uint8_t *ptr; 457 /* allocate and load BIOS */ 458 rom = g_malloc(sizeof(*rom)); 459 memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE, 460 &error_abort); 461 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 462 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 463 464 /* Load MacROM binary */ 465 if (filename) { 466 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 467 g_free(filename); 468 } else { 469 bios_size = -1; 470 } 471 472 /* Remove qtest_enabled() check once firmware files are in the tree */ 473 if (!qtest_enabled()) { 474 if (bios_size < 0 || bios_size > MACROM_SIZE) { 475 error_report("could not load MacROM '%s'", bios_name); 476 exit(1); 477 } 478 479 ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE); 480 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ 481 stl_phys(cs->as, 4, 482 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ 483 } 484 } 485 } 486 487 static void q800_machine_class_init(ObjectClass *oc, void *data) 488 { 489 MachineClass *mc = MACHINE_CLASS(oc); 490 mc->desc = "Macintosh Quadra 800"; 491 mc->init = q800_init; 492 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 493 mc->max_cpus = 1; 494 mc->block_default_type = IF_SCSI; 495 mc->default_ram_id = "m68k_mac.ram"; 496 } 497 498 static const TypeInfo q800_machine_typeinfo = { 499 .name = MACHINE_TYPE_NAME("q800"), 500 .parent = TYPE_MACHINE, 501 .class_init = q800_machine_class_init, 502 }; 503 504 static void q800_machine_register_types(void) 505 { 506 type_register_static(&q800_machine_typeinfo); 507 type_register_static(&glue_info); 508 } 509 510 type_init(q800_machine_register_types) 511