1 /* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qemu/units.h" 25 #include "qemu-common.h" 26 #include "qemu/datadir.h" 27 #include "sysemu/sysemu.h" 28 #include "cpu.h" 29 #include "hw/boards.h" 30 #include "hw/or-irq.h" 31 #include "elf.h" 32 #include "hw/loader.h" 33 #include "ui/console.h" 34 #include "exec/address-spaces.h" 35 #include "hw/char/escc.h" 36 #include "hw/sysbus.h" 37 #include "hw/scsi/esp.h" 38 #include "standard-headers/asm-m68k/bootinfo.h" 39 #include "standard-headers/asm-m68k/bootinfo-mac.h" 40 #include "bootinfo.h" 41 #include "hw/misc/mac_via.h" 42 #include "hw/input/adb.h" 43 #include "hw/nubus/mac-nubus-bridge.h" 44 #include "hw/display/macfb.h" 45 #include "hw/block/swim.h" 46 #include "net/net.h" 47 #include "qapi/error.h" 48 #include "sysemu/qtest.h" 49 #include "sysemu/runstate.h" 50 #include "sysemu/reset.h" 51 #include "migration/vmstate.h" 52 53 #define MACROM_ADDR 0x40800000 54 #define MACROM_SIZE 0x00100000 55 56 #define MACROM_FILENAME "MacROM.bin" 57 58 #define IO_BASE 0x50000000 59 #define IO_SLICE 0x00040000 60 #define IO_SIZE 0x04000000 61 62 #define VIA_BASE (IO_BASE + 0x00000) 63 #define SONIC_PROM_BASE (IO_BASE + 0x08000) 64 #define SONIC_BASE (IO_BASE + 0x0a000) 65 #define SCC_BASE (IO_BASE + 0x0c020) 66 #define ESP_BASE (IO_BASE + 0x10000) 67 #define ESP_PDMA (IO_BASE + 0x10100) 68 #define ASC_BASE (IO_BASE + 0x14000) 69 #define SWIM_BASE (IO_BASE + 0x1E000) 70 71 #define NUBUS_SUPER_SLOT_BASE 0x60000000 72 #define NUBUS_SLOT_BASE 0xf0000000 73 74 /* 75 * the video base, whereas it a Nubus address, 76 * is needed by the kernel to have early display and 77 * thus provided by the bootloader 78 */ 79 #define VIDEO_BASE 0xf9001000 80 81 #define MAC_CLOCK 3686418 82 83 /* 84 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip 85 * that performs a variety of functions (RAM management, clock generation, ...). 86 * The GLUE chip receives interrupt requests from various devices, 87 * assign priority to each, and asserts one or more interrupt line to the 88 * CPU. 89 */ 90 91 #define TYPE_GLUE "q800-glue" 92 OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE) 93 94 struct GLUEState { 95 SysBusDevice parent_obj; 96 M68kCPU *cpu; 97 uint8_t ipr; 98 }; 99 100 static void GLUE_set_irq(void *opaque, int irq, int level) 101 { 102 GLUEState *s = opaque; 103 int i; 104 105 if (level) { 106 s->ipr |= 1 << irq; 107 } else { 108 s->ipr &= ~(1 << irq); 109 } 110 111 for (i = 7; i >= 0; i--) { 112 if ((s->ipr >> i) & 1) { 113 m68k_set_irq_level(s->cpu, i + 1, i + 25); 114 return; 115 } 116 } 117 m68k_set_irq_level(s->cpu, 0, 0); 118 } 119 120 static void glue_reset(DeviceState *dev) 121 { 122 GLUEState *s = GLUE(dev); 123 124 s->ipr = 0; 125 } 126 127 static const VMStateDescription vmstate_glue = { 128 .name = "q800-glue", 129 .version_id = 0, 130 .minimum_version_id = 0, 131 .fields = (VMStateField[]) { 132 VMSTATE_UINT8(ipr, GLUEState), 133 VMSTATE_END_OF_LIST(), 134 }, 135 }; 136 137 /* 138 * If the m68k CPU implemented its inbound irq lines as GPIO lines 139 * rather than via the m68k_set_irq_level() function we would not need 140 * this cpu link property and could instead provide outbound IRQ lines 141 * that the board could wire up to the CPU. 142 */ 143 static Property glue_properties[] = { 144 DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), 145 DEFINE_PROP_END_OF_LIST(), 146 }; 147 148 static void glue_init(Object *obj) 149 { 150 DeviceState *dev = DEVICE(obj); 151 152 qdev_init_gpio_in(dev, GLUE_set_irq, 8); 153 } 154 155 static void glue_class_init(ObjectClass *klass, void *data) 156 { 157 DeviceClass *dc = DEVICE_CLASS(klass); 158 159 dc->vmsd = &vmstate_glue; 160 dc->reset = glue_reset; 161 device_class_set_props(dc, glue_properties); 162 } 163 164 static const TypeInfo glue_info = { 165 .name = TYPE_GLUE, 166 .parent = TYPE_SYS_BUS_DEVICE, 167 .instance_size = sizeof(GLUEState), 168 .instance_init = glue_init, 169 .class_init = glue_class_init, 170 }; 171 172 static void main_cpu_reset(void *opaque) 173 { 174 M68kCPU *cpu = opaque; 175 CPUState *cs = CPU(cpu); 176 177 cpu_reset(cs); 178 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 179 cpu->env.pc = ldl_phys(cs->as, 4); 180 } 181 182 static uint8_t fake_mac_rom[] = { 183 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 184 185 /* offset: 0xa - mac_reset */ 186 187 /* via2[vDirB] |= VIA2B_vPower */ 188 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 189 0x10, 0x10, /* moveb %a0@,%d0 */ 190 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 191 0x10, 0x80, /* moveb %d0,%a0@ */ 192 193 /* via2[vBufB] &= ~VIA2B_vPower */ 194 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 195 0x10, 0x10, /* moveb %a0@,%d0 */ 196 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 197 0x10, 0x80, /* moveb %d0,%a0@ */ 198 199 /* while (true) ; */ 200 0x60, 0xFE /* bras [self] */ 201 }; 202 203 static void q800_init(MachineState *machine) 204 { 205 M68kCPU *cpu = NULL; 206 int linux_boot; 207 int32_t kernel_size; 208 uint64_t elf_entry; 209 char *filename; 210 int bios_size; 211 ram_addr_t initrd_base; 212 int32_t initrd_size; 213 MemoryRegion *rom; 214 MemoryRegion *io; 215 const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1; 216 int i; 217 ram_addr_t ram_size = machine->ram_size; 218 const char *kernel_filename = machine->kernel_filename; 219 const char *initrd_filename = machine->initrd_filename; 220 const char *kernel_cmdline = machine->kernel_cmdline; 221 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 222 hwaddr parameters_base; 223 CPUState *cs; 224 DeviceState *dev; 225 DeviceState *via_dev; 226 DeviceState *escc_orgate; 227 SysBusESPState *sysbus_esp; 228 ESPState *esp; 229 SysBusDevice *sysbus; 230 BusState *adb_bus; 231 NubusBus *nubus; 232 DeviceState *glue; 233 DriveInfo *dinfo; 234 235 linux_boot = (kernel_filename != NULL); 236 237 if (ram_size > 1 * GiB) { 238 error_report("Too much memory for this machine: %" PRId64 " MiB, " 239 "maximum 1024 MiB", ram_size / MiB); 240 exit(1); 241 } 242 243 /* init CPUs */ 244 cpu = M68K_CPU(cpu_create(machine->cpu_type)); 245 qemu_register_reset(main_cpu_reset, cpu); 246 247 /* RAM */ 248 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 249 250 /* 251 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 252 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 253 */ 254 io = g_new(MemoryRegion, io_slice_nb); 255 for (i = 0; i < io_slice_nb; i++) { 256 char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1); 257 258 memory_region_init_alias(&io[i], NULL, name, get_system_memory(), 259 IO_BASE, IO_SLICE); 260 memory_region_add_subregion(get_system_memory(), 261 IO_BASE + (i + 1) * IO_SLICE, &io[i]); 262 g_free(name); 263 } 264 265 /* IRQ Glue */ 266 glue = qdev_new(TYPE_GLUE); 267 object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort); 268 sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal); 269 270 /* VIA */ 271 272 via_dev = qdev_new(TYPE_MAC_VIA); 273 dinfo = drive_get(IF_MTD, 0, 0); 274 if (dinfo) { 275 qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo)); 276 } 277 sysbus = SYS_BUS_DEVICE(via_dev); 278 sysbus_realize_and_unref(sysbus, &error_fatal); 279 sysbus_mmio_map(sysbus, 0, VIA_BASE); 280 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, 281 qdev_get_gpio_in(glue, 0)); 282 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, 283 qdev_get_gpio_in(glue, 1)); 284 285 286 adb_bus = qdev_get_child_bus(via_dev, "adb.0"); 287 dev = qdev_new(TYPE_ADB_KEYBOARD); 288 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 289 dev = qdev_new(TYPE_ADB_MOUSE); 290 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 291 292 /* MACSONIC */ 293 294 if (nb_nics > 1) { 295 error_report("q800 can only have one ethernet interface"); 296 exit(1); 297 } 298 299 qemu_check_nic_model(&nd_table[0], "dp83932"); 300 301 /* 302 * MacSonic driver needs an Apple MAC address 303 * Valid prefix are: 304 * 00:05:02 Apple 305 * 00:80:19 Dayna Communications, Inc. 306 * 00:A0:40 Apple 307 * 08:00:07 Apple 308 * (Q800 use the last one) 309 */ 310 nd_table[0].macaddr.a[0] = 0x08; 311 nd_table[0].macaddr.a[1] = 0x00; 312 nd_table[0].macaddr.a[2] = 0x07; 313 314 dev = qdev_new("dp8393x"); 315 qdev_set_nic_properties(dev, &nd_table[0]); 316 qdev_prop_set_uint8(dev, "it_shift", 2); 317 qdev_prop_set_bit(dev, "big_endian", true); 318 object_property_set_link(OBJECT(dev), "dma_mr", 319 OBJECT(get_system_memory()), &error_abort); 320 sysbus = SYS_BUS_DEVICE(dev); 321 sysbus_realize_and_unref(sysbus, &error_fatal); 322 sysbus_mmio_map(sysbus, 0, SONIC_BASE); 323 sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); 324 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); 325 326 /* SCC */ 327 328 dev = qdev_new(TYPE_ESCC); 329 qdev_prop_set_uint32(dev, "disabled", 0); 330 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 331 qdev_prop_set_uint32(dev, "it_shift", 1); 332 qdev_prop_set_bit(dev, "bit_swap", true); 333 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 334 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 335 qdev_prop_set_uint32(dev, "chnBtype", 0); 336 qdev_prop_set_uint32(dev, "chnAtype", 0); 337 sysbus = SYS_BUS_DEVICE(dev); 338 sysbus_realize_and_unref(sysbus, &error_fatal); 339 340 /* Logically OR both its IRQs together */ 341 escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); 342 object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); 343 qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); 344 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); 345 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); 346 qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3)); 347 sysbus_mmio_map(sysbus, 0, SCC_BASE); 348 349 /* SCSI */ 350 351 dev = qdev_new(TYPE_SYSBUS_ESP); 352 sysbus_esp = SYSBUS_ESP(dev); 353 esp = &sysbus_esp->esp; 354 esp->dma_memory_read = NULL; 355 esp->dma_memory_write = NULL; 356 esp->dma_opaque = NULL; 357 sysbus_esp->it_shift = 4; 358 esp->dma_enabled = 1; 359 360 sysbus = SYS_BUS_DEVICE(dev); 361 sysbus_realize_and_unref(sysbus, &error_fatal); 362 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev, 363 "via2-irq", 364 VIA2_IRQ_SCSI_BIT)); 365 sysbus_connect_irq(sysbus, 1, 366 qdev_get_gpio_in_named(via_dev, "via2-irq", 367 VIA2_IRQ_SCSI_DATA_BIT)); 368 sysbus_mmio_map(sysbus, 0, ESP_BASE); 369 sysbus_mmio_map(sysbus, 1, ESP_PDMA); 370 371 scsi_bus_legacy_handle_cmdline(&esp->bus); 372 373 /* SWIM floppy controller */ 374 375 dev = qdev_new(TYPE_SWIM); 376 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 377 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); 378 379 /* NuBus */ 380 381 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); 382 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 383 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE); 384 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE); 385 386 nubus = MAC_NUBUS_BRIDGE(dev)->bus; 387 388 /* framebuffer in nubus slot #9 */ 389 390 dev = qdev_new(TYPE_NUBUS_MACFB); 391 qdev_prop_set_uint32(dev, "width", graphic_width); 392 qdev_prop_set_uint32(dev, "height", graphic_height); 393 qdev_prop_set_uint8(dev, "depth", graphic_depth); 394 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); 395 396 cs = CPU(cpu); 397 if (linux_boot) { 398 uint64_t high; 399 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 400 &elf_entry, NULL, &high, NULL, 1, 401 EM_68K, 0, 0); 402 if (kernel_size < 0) { 403 error_report("could not load kernel '%s'", kernel_filename); 404 exit(1); 405 } 406 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 407 parameters_base = (high + 1) & ~1; 408 409 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC); 410 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); 411 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); 412 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); 413 BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, CPUB_68040); 414 BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, MAC_MODEL_Q800); 415 BOOTINFO1(cs->as, parameters_base, 416 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 417 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); 418 BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE); 419 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth); 420 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM, 421 (graphic_height << 16) | graphic_width); 422 BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW, 423 (graphic_width * graphic_depth + 7) / 8); 424 BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE); 425 426 rom = g_malloc(sizeof(*rom)); 427 memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", 428 sizeof(fake_mac_rom), fake_mac_rom); 429 memory_region_set_readonly(rom, true); 430 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 431 432 if (kernel_cmdline) { 433 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, 434 kernel_cmdline); 435 } 436 437 /* load initrd */ 438 if (initrd_filename) { 439 initrd_size = get_image_size(initrd_filename); 440 if (initrd_size < 0) { 441 error_report("could not load initial ram disk '%s'", 442 initrd_filename); 443 exit(1); 444 } 445 446 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 447 load_image_targphys(initrd_filename, initrd_base, 448 ram_size - initrd_base); 449 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, 450 initrd_size); 451 } else { 452 initrd_base = 0; 453 initrd_size = 0; 454 } 455 BOOTINFO0(cs->as, parameters_base, BI_LAST); 456 } else { 457 uint8_t *ptr; 458 /* allocate and load BIOS */ 459 rom = g_malloc(sizeof(*rom)); 460 memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE, 461 &error_abort); 462 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 463 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 464 465 /* Load MacROM binary */ 466 if (filename) { 467 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 468 g_free(filename); 469 } else { 470 bios_size = -1; 471 } 472 473 /* Remove qtest_enabled() check once firmware files are in the tree */ 474 if (!qtest_enabled()) { 475 if (bios_size < 0 || bios_size > MACROM_SIZE) { 476 error_report("could not load MacROM '%s'", bios_name); 477 exit(1); 478 } 479 480 ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE); 481 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ 482 stl_phys(cs->as, 4, 483 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ 484 } 485 } 486 } 487 488 static void q800_machine_class_init(ObjectClass *oc, void *data) 489 { 490 MachineClass *mc = MACHINE_CLASS(oc); 491 mc->desc = "Macintosh Quadra 800"; 492 mc->init = q800_init; 493 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 494 mc->max_cpus = 1; 495 mc->block_default_type = IF_SCSI; 496 mc->default_ram_id = "m68k_mac.ram"; 497 } 498 499 static const TypeInfo q800_machine_typeinfo = { 500 .name = MACHINE_TYPE_NAME("q800"), 501 .parent = TYPE_MACHINE, 502 .class_init = q800_machine_class_init, 503 }; 504 505 static void q800_machine_register_types(void) 506 { 507 type_register_static(&q800_machine_typeinfo); 508 type_register_static(&glue_info); 509 } 510 511 type_init(q800_machine_register_types) 512