1 /* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qemu/units.h" 25 #include "qemu-common.h" 26 #include "qemu/datadir.h" 27 #include "sysemu/sysemu.h" 28 #include "cpu.h" 29 #include "hw/hw.h" 30 #include "hw/boards.h" 31 #include "hw/irq.h" 32 #include "hw/or-irq.h" 33 #include "elf.h" 34 #include "hw/loader.h" 35 #include "ui/console.h" 36 #include "exec/address-spaces.h" 37 #include "hw/char/escc.h" 38 #include "hw/sysbus.h" 39 #include "hw/scsi/esp.h" 40 #include "standard-headers/asm-m68k/bootinfo.h" 41 #include "standard-headers/asm-m68k/bootinfo-mac.h" 42 #include "bootinfo.h" 43 #include "hw/misc/mac_via.h" 44 #include "hw/input/adb.h" 45 #include "hw/nubus/mac-nubus-bridge.h" 46 #include "hw/display/macfb.h" 47 #include "hw/block/swim.h" 48 #include "net/net.h" 49 #include "qapi/error.h" 50 #include "sysemu/qtest.h" 51 #include "sysemu/runstate.h" 52 #include "sysemu/reset.h" 53 #include "migration/vmstate.h" 54 55 #define MACROM_ADDR 0x40800000 56 #define MACROM_SIZE 0x00100000 57 58 #define MACROM_FILENAME "MacROM.bin" 59 60 #define IO_BASE 0x50000000 61 #define IO_SLICE 0x00040000 62 #define IO_SIZE 0x04000000 63 64 #define VIA_BASE (IO_BASE + 0x00000) 65 #define SONIC_PROM_BASE (IO_BASE + 0x08000) 66 #define SONIC_BASE (IO_BASE + 0x0a000) 67 #define SCC_BASE (IO_BASE + 0x0c020) 68 #define ESP_BASE (IO_BASE + 0x10000) 69 #define ESP_PDMA (IO_BASE + 0x10100) 70 #define ASC_BASE (IO_BASE + 0x14000) 71 #define SWIM_BASE (IO_BASE + 0x1E000) 72 73 #define NUBUS_SUPER_SLOT_BASE 0x60000000 74 #define NUBUS_SLOT_BASE 0xf0000000 75 76 /* 77 * the video base, whereas it a Nubus address, 78 * is needed by the kernel to have early display and 79 * thus provided by the bootloader 80 */ 81 #define VIDEO_BASE 0xf9001000 82 83 #define MAC_CLOCK 3686418 84 85 /* 86 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip 87 * that performs a variety of functions (RAM management, clock generation, ...). 88 * The GLUE chip receives interrupt requests from various devices, 89 * assign priority to each, and asserts one or more interrupt line to the 90 * CPU. 91 */ 92 93 #define TYPE_GLUE "q800-glue" 94 OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE) 95 96 struct GLUEState { 97 SysBusDevice parent_obj; 98 M68kCPU *cpu; 99 uint8_t ipr; 100 }; 101 102 static void GLUE_set_irq(void *opaque, int irq, int level) 103 { 104 GLUEState *s = opaque; 105 int i; 106 107 if (level) { 108 s->ipr |= 1 << irq; 109 } else { 110 s->ipr &= ~(1 << irq); 111 } 112 113 for (i = 7; i >= 0; i--) { 114 if ((s->ipr >> i) & 1) { 115 m68k_set_irq_level(s->cpu, i + 1, i + 25); 116 return; 117 } 118 } 119 m68k_set_irq_level(s->cpu, 0, 0); 120 } 121 122 static void glue_reset(DeviceState *dev) 123 { 124 GLUEState *s = GLUE(dev); 125 126 s->ipr = 0; 127 } 128 129 static const VMStateDescription vmstate_glue = { 130 .name = "q800-glue", 131 .version_id = 0, 132 .minimum_version_id = 0, 133 .fields = (VMStateField[]) { 134 VMSTATE_UINT8(ipr, GLUEState), 135 VMSTATE_END_OF_LIST(), 136 }, 137 }; 138 139 /* 140 * If the m68k CPU implemented its inbound irq lines as GPIO lines 141 * rather than via the m68k_set_irq_level() function we would not need 142 * this cpu link property and could instead provide outbound IRQ lines 143 * that the board could wire up to the CPU. 144 */ 145 static Property glue_properties[] = { 146 DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), 147 DEFINE_PROP_END_OF_LIST(), 148 }; 149 150 static void glue_init(Object *obj) 151 { 152 DeviceState *dev = DEVICE(obj); 153 154 qdev_init_gpio_in(dev, GLUE_set_irq, 8); 155 } 156 157 static void glue_class_init(ObjectClass *klass, void *data) 158 { 159 DeviceClass *dc = DEVICE_CLASS(klass); 160 161 dc->vmsd = &vmstate_glue; 162 dc->reset = glue_reset; 163 device_class_set_props(dc, glue_properties); 164 } 165 166 static const TypeInfo glue_info = { 167 .name = TYPE_GLUE, 168 .parent = TYPE_SYS_BUS_DEVICE, 169 .instance_size = sizeof(GLUEState), 170 .instance_init = glue_init, 171 .class_init = glue_class_init, 172 }; 173 174 static void main_cpu_reset(void *opaque) 175 { 176 M68kCPU *cpu = opaque; 177 CPUState *cs = CPU(cpu); 178 179 cpu_reset(cs); 180 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 181 cpu->env.pc = ldl_phys(cs->as, 4); 182 } 183 184 static uint8_t fake_mac_rom[] = { 185 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 186 187 /* offset: 0xa - mac_reset */ 188 189 /* via2[vDirB] |= VIA2B_vPower */ 190 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 191 0x10, 0x10, /* moveb %a0@,%d0 */ 192 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 193 0x10, 0x80, /* moveb %d0,%a0@ */ 194 195 /* via2[vBufB] &= ~VIA2B_vPower */ 196 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 197 0x10, 0x10, /* moveb %a0@,%d0 */ 198 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 199 0x10, 0x80, /* moveb %d0,%a0@ */ 200 201 /* while (true) ; */ 202 0x60, 0xFE /* bras [self] */ 203 }; 204 205 static void q800_init(MachineState *machine) 206 { 207 M68kCPU *cpu = NULL; 208 int linux_boot; 209 int32_t kernel_size; 210 uint64_t elf_entry; 211 char *filename; 212 int bios_size; 213 ram_addr_t initrd_base; 214 int32_t initrd_size; 215 MemoryRegion *rom; 216 MemoryRegion *io; 217 const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1; 218 int i; 219 ram_addr_t ram_size = machine->ram_size; 220 const char *kernel_filename = machine->kernel_filename; 221 const char *initrd_filename = machine->initrd_filename; 222 const char *kernel_cmdline = machine->kernel_cmdline; 223 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 224 hwaddr parameters_base; 225 CPUState *cs; 226 DeviceState *dev; 227 DeviceState *via_dev; 228 DeviceState *escc_orgate; 229 SysBusESPState *sysbus_esp; 230 ESPState *esp; 231 SysBusDevice *sysbus; 232 BusState *adb_bus; 233 NubusBus *nubus; 234 DeviceState *glue; 235 DriveInfo *dinfo; 236 237 linux_boot = (kernel_filename != NULL); 238 239 if (ram_size > 1 * GiB) { 240 error_report("Too much memory for this machine: %" PRId64 " MiB, " 241 "maximum 1024 MiB", ram_size / MiB); 242 exit(1); 243 } 244 245 /* init CPUs */ 246 cpu = M68K_CPU(cpu_create(machine->cpu_type)); 247 qemu_register_reset(main_cpu_reset, cpu); 248 249 /* RAM */ 250 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 251 252 /* 253 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 254 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 255 */ 256 io = g_new(MemoryRegion, io_slice_nb); 257 for (i = 0; i < io_slice_nb; i++) { 258 char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1); 259 260 memory_region_init_alias(&io[i], NULL, name, get_system_memory(), 261 IO_BASE, IO_SLICE); 262 memory_region_add_subregion(get_system_memory(), 263 IO_BASE + (i + 1) * IO_SLICE, &io[i]); 264 g_free(name); 265 } 266 267 /* IRQ Glue */ 268 glue = qdev_new(TYPE_GLUE); 269 object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort); 270 sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal); 271 272 /* VIA */ 273 274 via_dev = qdev_new(TYPE_MAC_VIA); 275 dinfo = drive_get(IF_MTD, 0, 0); 276 if (dinfo) { 277 qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo)); 278 } 279 sysbus = SYS_BUS_DEVICE(via_dev); 280 sysbus_realize_and_unref(sysbus, &error_fatal); 281 sysbus_mmio_map(sysbus, 0, VIA_BASE); 282 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, 283 qdev_get_gpio_in(glue, 0)); 284 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, 285 qdev_get_gpio_in(glue, 1)); 286 287 288 adb_bus = qdev_get_child_bus(via_dev, "adb.0"); 289 dev = qdev_new(TYPE_ADB_KEYBOARD); 290 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 291 dev = qdev_new(TYPE_ADB_MOUSE); 292 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 293 294 /* MACSONIC */ 295 296 if (nb_nics > 1) { 297 error_report("q800 can only have one ethernet interface"); 298 exit(1); 299 } 300 301 qemu_check_nic_model(&nd_table[0], "dp83932"); 302 303 /* 304 * MacSonic driver needs an Apple MAC address 305 * Valid prefix are: 306 * 00:05:02 Apple 307 * 00:80:19 Dayna Communications, Inc. 308 * 00:A0:40 Apple 309 * 08:00:07 Apple 310 * (Q800 use the last one) 311 */ 312 nd_table[0].macaddr.a[0] = 0x08; 313 nd_table[0].macaddr.a[1] = 0x00; 314 nd_table[0].macaddr.a[2] = 0x07; 315 316 dev = qdev_new("dp8393x"); 317 qdev_set_nic_properties(dev, &nd_table[0]); 318 qdev_prop_set_uint8(dev, "it_shift", 2); 319 qdev_prop_set_bit(dev, "big_endian", true); 320 object_property_set_link(OBJECT(dev), "dma_mr", 321 OBJECT(get_system_memory()), &error_abort); 322 sysbus = SYS_BUS_DEVICE(dev); 323 sysbus_realize_and_unref(sysbus, &error_fatal); 324 sysbus_mmio_map(sysbus, 0, SONIC_BASE); 325 sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); 326 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); 327 328 /* SCC */ 329 330 dev = qdev_new(TYPE_ESCC); 331 qdev_prop_set_uint32(dev, "disabled", 0); 332 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 333 qdev_prop_set_uint32(dev, "it_shift", 1); 334 qdev_prop_set_bit(dev, "bit_swap", true); 335 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 336 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 337 qdev_prop_set_uint32(dev, "chnBtype", 0); 338 qdev_prop_set_uint32(dev, "chnAtype", 0); 339 sysbus = SYS_BUS_DEVICE(dev); 340 sysbus_realize_and_unref(sysbus, &error_fatal); 341 342 /* Logically OR both its IRQs together */ 343 escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); 344 object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); 345 qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); 346 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); 347 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); 348 qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3)); 349 sysbus_mmio_map(sysbus, 0, SCC_BASE); 350 351 /* SCSI */ 352 353 dev = qdev_new(TYPE_ESP); 354 sysbus_esp = ESP(dev); 355 esp = &sysbus_esp->esp; 356 esp->dma_memory_read = NULL; 357 esp->dma_memory_write = NULL; 358 esp->dma_opaque = NULL; 359 sysbus_esp->it_shift = 4; 360 esp->dma_enabled = 1; 361 362 sysbus = SYS_BUS_DEVICE(dev); 363 sysbus_realize_and_unref(sysbus, &error_fatal); 364 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev, 365 "via2-irq", 366 VIA2_IRQ_SCSI_BIT)); 367 sysbus_connect_irq(sysbus, 1, 368 qdev_get_gpio_in_named(via_dev, "via2-irq", 369 VIA2_IRQ_SCSI_DATA_BIT)); 370 sysbus_mmio_map(sysbus, 0, ESP_BASE); 371 sysbus_mmio_map(sysbus, 1, ESP_PDMA); 372 373 scsi_bus_legacy_handle_cmdline(&esp->bus); 374 375 /* SWIM floppy controller */ 376 377 dev = qdev_new(TYPE_SWIM); 378 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 379 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); 380 381 /* NuBus */ 382 383 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); 384 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 385 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE); 386 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE); 387 388 nubus = MAC_NUBUS_BRIDGE(dev)->bus; 389 390 /* framebuffer in nubus slot #9 */ 391 392 dev = qdev_new(TYPE_NUBUS_MACFB); 393 qdev_prop_set_uint32(dev, "width", graphic_width); 394 qdev_prop_set_uint32(dev, "height", graphic_height); 395 qdev_prop_set_uint8(dev, "depth", graphic_depth); 396 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); 397 398 cs = CPU(cpu); 399 if (linux_boot) { 400 uint64_t high; 401 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 402 &elf_entry, NULL, &high, NULL, 1, 403 EM_68K, 0, 0); 404 if (kernel_size < 0) { 405 error_report("could not load kernel '%s'", kernel_filename); 406 exit(1); 407 } 408 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 409 parameters_base = (high + 1) & ~1; 410 411 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC); 412 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); 413 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); 414 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); 415 BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, CPUB_68040); 416 BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, MAC_MODEL_Q800); 417 BOOTINFO1(cs->as, parameters_base, 418 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 419 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); 420 BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE); 421 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth); 422 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM, 423 (graphic_height << 16) | graphic_width); 424 BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW, 425 (graphic_width * graphic_depth + 7) / 8); 426 BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE); 427 428 rom = g_malloc(sizeof(*rom)); 429 memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", 430 sizeof(fake_mac_rom), fake_mac_rom); 431 memory_region_set_readonly(rom, true); 432 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 433 434 if (kernel_cmdline) { 435 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, 436 kernel_cmdline); 437 } 438 439 /* load initrd */ 440 if (initrd_filename) { 441 initrd_size = get_image_size(initrd_filename); 442 if (initrd_size < 0) { 443 error_report("could not load initial ram disk '%s'", 444 initrd_filename); 445 exit(1); 446 } 447 448 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 449 load_image_targphys(initrd_filename, initrd_base, 450 ram_size - initrd_base); 451 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, 452 initrd_size); 453 } else { 454 initrd_base = 0; 455 initrd_size = 0; 456 } 457 BOOTINFO0(cs->as, parameters_base, BI_LAST); 458 } else { 459 uint8_t *ptr; 460 /* allocate and load BIOS */ 461 rom = g_malloc(sizeof(*rom)); 462 memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE, 463 &error_abort); 464 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 465 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 466 467 /* Load MacROM binary */ 468 if (filename) { 469 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 470 g_free(filename); 471 } else { 472 bios_size = -1; 473 } 474 475 /* Remove qtest_enabled() check once firmware files are in the tree */ 476 if (!qtest_enabled()) { 477 if (bios_size < 0 || bios_size > MACROM_SIZE) { 478 error_report("could not load MacROM '%s'", bios_name); 479 exit(1); 480 } 481 482 ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE); 483 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ 484 stl_phys(cs->as, 4, 485 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ 486 } 487 } 488 } 489 490 static void q800_machine_class_init(ObjectClass *oc, void *data) 491 { 492 MachineClass *mc = MACHINE_CLASS(oc); 493 mc->desc = "Macintosh Quadra 800"; 494 mc->init = q800_init; 495 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 496 mc->max_cpus = 1; 497 mc->block_default_type = IF_SCSI; 498 mc->default_ram_id = "m68k_mac.ram"; 499 } 500 501 static const TypeInfo q800_machine_typeinfo = { 502 .name = MACHINE_TYPE_NAME("q800"), 503 .parent = TYPE_MACHINE, 504 .class_init = q800_machine_class_init, 505 }; 506 507 static void q800_machine_register_types(void) 508 { 509 type_register_static(&q800_machine_typeinfo); 510 type_register_static(&glue_info); 511 } 512 513 type_init(q800_machine_register_types) 514