1 /* 2 * QEMU q800 logic GLUE (General Logic Unit) 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "cpu.h" 25 #include "hw/m68k/q800-glue.h" 26 #include "hw/boards.h" 27 #include "hw/irq.h" 28 #include "hw/nmi.h" 29 #include "hw/qdev-properties.h" 30 #include "migration/vmstate.h" 31 32 /* 33 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip 34 * that performs a variety of functions (RAM management, clock generation, ...). 35 * The GLUE chip receives interrupt requests from various devices, 36 * assign priority to each, and asserts one or more interrupt line to the 37 * CPU. 38 */ 39 40 /* 41 * The GLUE logic on the Quadra 800 supports 2 different IRQ routing modes 42 * controlled from the VIA1 auxmode GPIO (port B bit 6) which are documented 43 * in NetBSD as follows: 44 * 45 * A/UX mode (Linux, NetBSD, auxmode GPIO low) 46 * 47 * Level 0: Spurious: ignored 48 * Level 1: Software 49 * Level 2: VIA2 (except ethernet, sound) 50 * Level 3: Ethernet 51 * Level 4: Serial (SCC) 52 * Level 5: Sound 53 * Level 6: VIA1 54 * Level 7: NMIs: parity errors, RESET button, YANCC error 55 * 56 * Classic mode (default: used by MacOS, A/UX 3.0.1, auxmode GPIO high) 57 * 58 * Level 0: Spurious: ignored 59 * Level 1: VIA1 (clock, ADB) 60 * Level 2: VIA2 (NuBus, SCSI) 61 * Level 3: 62 * Level 4: Serial (SCC) 63 * Level 5: 64 * Level 6: 65 * Level 7: Non-maskable: parity errors, RESET button 66 * 67 * Note that despite references to A/UX mode in Linux and NetBSD, at least 68 * A/UX 3.0.1 still uses Classic mode. 69 */ 70 71 static void GLUE_set_irq(void *opaque, int irq, int level) 72 { 73 GLUEState *s = opaque; 74 int i; 75 76 if (s->auxmode) { 77 /* Classic mode */ 78 switch (irq) { 79 case GLUE_IRQ_IN_VIA1: 80 irq = 0; 81 break; 82 83 case GLUE_IRQ_IN_VIA2: 84 irq = 1; 85 break; 86 87 case GLUE_IRQ_IN_SONIC: 88 /* Route to VIA2 instead */ 89 qemu_set_irq(s->irqs[GLUE_IRQ_NUBUS_9], level); 90 return; 91 92 case GLUE_IRQ_IN_ESCC: 93 irq = 3; 94 break; 95 96 case GLUE_IRQ_IN_NMI: 97 irq = 6; 98 break; 99 100 default: 101 g_assert_not_reached(); 102 } 103 } else { 104 /* A/UX mode */ 105 switch (irq) { 106 case GLUE_IRQ_IN_VIA1: 107 irq = 5; 108 break; 109 110 case GLUE_IRQ_IN_VIA2: 111 irq = 1; 112 break; 113 114 case GLUE_IRQ_IN_SONIC: 115 irq = 2; 116 break; 117 118 case GLUE_IRQ_IN_ESCC: 119 irq = 3; 120 break; 121 122 case GLUE_IRQ_IN_NMI: 123 irq = 6; 124 break; 125 126 default: 127 g_assert_not_reached(); 128 } 129 } 130 131 if (level) { 132 s->ipr |= 1 << irq; 133 } else { 134 s->ipr &= ~(1 << irq); 135 } 136 137 for (i = 7; i >= 0; i--) { 138 if ((s->ipr >> i) & 1) { 139 m68k_set_irq_level(s->cpu, i + 1, i + 25); 140 return; 141 } 142 } 143 m68k_set_irq_level(s->cpu, 0, 0); 144 } 145 146 static void glue_auxmode_set_irq(void *opaque, int irq, int level) 147 { 148 GLUEState *s = GLUE(opaque); 149 150 s->auxmode = level; 151 } 152 153 static void glue_nmi(NMIState *n, int cpu_index, Error **errp) 154 { 155 GLUEState *s = GLUE(n); 156 157 /* Hold NMI active for 100ms */ 158 GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 1); 159 timer_mod(s->nmi_release, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 100); 160 } 161 162 static void glue_nmi_release(void *opaque) 163 { 164 GLUEState *s = GLUE(opaque); 165 166 GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 0); 167 } 168 169 static void glue_reset(DeviceState *dev) 170 { 171 GLUEState *s = GLUE(dev); 172 173 s->ipr = 0; 174 s->auxmode = 0; 175 176 timer_del(s->nmi_release); 177 } 178 179 static const VMStateDescription vmstate_glue = { 180 .name = "q800-glue", 181 .version_id = 0, 182 .minimum_version_id = 0, 183 .fields = (VMStateField[]) { 184 VMSTATE_UINT8(ipr, GLUEState), 185 VMSTATE_UINT8(auxmode, GLUEState), 186 VMSTATE_TIMER_PTR(nmi_release, GLUEState), 187 VMSTATE_END_OF_LIST(), 188 }, 189 }; 190 191 /* 192 * If the m68k CPU implemented its inbound irq lines as GPIO lines 193 * rather than via the m68k_set_irq_level() function we would not need 194 * this cpu link property and could instead provide outbound IRQ lines 195 * that the board could wire up to the CPU. 196 */ 197 static Property glue_properties[] = { 198 DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), 199 DEFINE_PROP_END_OF_LIST(), 200 }; 201 202 static void glue_finalize(Object *obj) 203 { 204 GLUEState *s = GLUE(obj); 205 206 timer_free(s->nmi_release); 207 } 208 209 static void glue_init(Object *obj) 210 { 211 DeviceState *dev = DEVICE(obj); 212 GLUEState *s = GLUE(dev); 213 214 qdev_init_gpio_in(dev, GLUE_set_irq, 8); 215 qdev_init_gpio_in_named(dev, glue_auxmode_set_irq, "auxmode", 1); 216 217 qdev_init_gpio_out(dev, s->irqs, 1); 218 219 /* NMI release timer */ 220 s->nmi_release = timer_new_ms(QEMU_CLOCK_VIRTUAL, glue_nmi_release, s); 221 } 222 223 static void glue_class_init(ObjectClass *klass, void *data) 224 { 225 DeviceClass *dc = DEVICE_CLASS(klass); 226 NMIClass *nc = NMI_CLASS(klass); 227 228 dc->vmsd = &vmstate_glue; 229 dc->reset = glue_reset; 230 device_class_set_props(dc, glue_properties); 231 nc->nmi_monitor_handler = glue_nmi; 232 } 233 234 static const TypeInfo glue_info_types[] = { 235 { 236 .name = TYPE_GLUE, 237 .parent = TYPE_SYS_BUS_DEVICE, 238 .instance_size = sizeof(GLUEState), 239 .instance_init = glue_init, 240 .instance_finalize = glue_finalize, 241 .class_init = glue_class_init, 242 .interfaces = (InterfaceInfo[]) { 243 { TYPE_NMI }, 244 { } 245 }, 246 }, 247 }; 248 249 DEFINE_TYPES(glue_info_types) 250