1 /* 2 * Generic ISA Super I/O 3 * 4 * Copyright (c) 2010-2012 Herve Poussineau 5 * Copyright (c) 2011-2012 Andreas Färber 6 * Copyright (c) 2018 Philippe Mathieu-Daudé 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or later. 9 * See the COPYING file in the top-level directory. 10 * SPDX-License-Identifier: GPL-2.0-or-later 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/error-report.h" 15 #include "qemu/module.h" 16 #include "qapi/error.h" 17 #include "sysemu/sysemu.h" 18 #include "sysemu/blockdev.h" 19 #include "chardev/char.h" 20 #include "hw/block/fdc.h" 21 #include "hw/isa/superio.h" 22 #include "hw/qdev-properties.h" 23 #include "hw/input/i8042.h" 24 #include "hw/char/serial.h" 25 #include "trace.h" 26 27 static void isa_superio_realize(DeviceState *dev, Error **errp) 28 { 29 ISASuperIODevice *sio = ISA_SUPERIO(dev); 30 ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio); 31 ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev)); 32 ISADevice *isa; 33 DeviceState *d; 34 Chardev *chr; 35 DriveInfo *fd[MAX_FD]; 36 char *name; 37 int i; 38 39 /* Parallel port */ 40 for (i = 0; i < k->parallel.count; i++) { 41 if (i >= ARRAY_SIZE(sio->parallel)) { 42 warn_report("superio: ignoring %td parallel controllers", 43 k->parallel.count - ARRAY_SIZE(sio->parallel)); 44 break; 45 } 46 if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) { 47 /* FIXME use a qdev chardev prop instead of parallel_hds[] */ 48 chr = parallel_hds[i]; 49 if (chr == NULL) { 50 name = g_strdup_printf("discarding-parallel%d", i); 51 chr = qemu_chr_new(name, "null", NULL); 52 } else { 53 name = g_strdup_printf("parallel%d", i); 54 } 55 isa = isa_new("isa-parallel"); 56 d = DEVICE(isa); 57 qdev_prop_set_uint32(d, "index", i); 58 if (k->parallel.get_iobase) { 59 qdev_prop_set_uint32(d, "iobase", 60 k->parallel.get_iobase(sio, i)); 61 } 62 if (k->parallel.get_irq) { 63 qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i)); 64 } 65 qdev_prop_set_chr(d, "chardev", chr); 66 object_property_add_child(OBJECT(dev), name, OBJECT(isa)); 67 isa_realize_and_unref(isa, bus, &error_fatal); 68 sio->parallel[i] = isa; 69 trace_superio_create_parallel(i, 70 k->parallel.get_iobase ? 71 k->parallel.get_iobase(sio, i) : -1, 72 k->parallel.get_irq ? 73 k->parallel.get_irq(sio, i) : -1); 74 g_free(name); 75 } 76 } 77 78 /* Serial */ 79 for (i = 0; i < k->serial.count; i++) { 80 if (i >= ARRAY_SIZE(sio->serial)) { 81 warn_report("superio: ignoring %td serial controllers", 82 k->serial.count - ARRAY_SIZE(sio->serial)); 83 break; 84 } 85 if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) { 86 /* FIXME use a qdev chardev prop instead of serial_hd() */ 87 chr = serial_hd(i); 88 if (chr == NULL) { 89 name = g_strdup_printf("discarding-serial%d", i); 90 chr = qemu_chr_new(name, "null", NULL); 91 } else { 92 name = g_strdup_printf("serial%d", i); 93 } 94 isa = isa_new(TYPE_ISA_SERIAL); 95 d = DEVICE(isa); 96 qdev_prop_set_uint32(d, "index", i); 97 if (k->serial.get_iobase) { 98 qdev_prop_set_uint32(d, "iobase", 99 k->serial.get_iobase(sio, i)); 100 } 101 if (k->serial.get_irq) { 102 qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i)); 103 } 104 qdev_prop_set_chr(d, "chardev", chr); 105 object_property_add_child(OBJECT(dev), name, OBJECT(isa)); 106 isa_realize_and_unref(isa, bus, &error_fatal); 107 sio->serial[i] = isa; 108 trace_superio_create_serial(i, 109 k->serial.get_iobase ? 110 k->serial.get_iobase(sio, i) : -1, 111 k->serial.get_irq ? 112 k->serial.get_irq(sio, i) : -1); 113 g_free(name); 114 } 115 } 116 117 /* Floppy disc */ 118 if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) { 119 isa = isa_new(TYPE_ISA_FDC); 120 d = DEVICE(isa); 121 if (k->floppy.get_iobase) { 122 qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0)); 123 } 124 if (k->floppy.get_irq) { 125 qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0)); 126 } 127 /* FIXME use a qdev drive property instead of drive_get() */ 128 for (i = 0; i < MAX_FD; i++) { 129 fd[i] = drive_get(IF_FLOPPY, 0, i); 130 } 131 object_property_add_child(OBJECT(sio), "isa-fdc", OBJECT(isa)); 132 isa_realize_and_unref(isa, bus, &error_fatal); 133 isa_fdc_init_drives(isa, fd); 134 sio->floppy = isa; 135 trace_superio_create_floppy(0, 136 k->floppy.get_iobase ? 137 k->floppy.get_iobase(sio, 0) : -1, 138 k->floppy.get_irq ? 139 k->floppy.get_irq(sio, 0) : -1); 140 } 141 142 /* Keyboard, mouse */ 143 isa = isa_new(TYPE_I8042); 144 object_property_add_child(OBJECT(sio), TYPE_I8042, OBJECT(isa)); 145 isa_realize_and_unref(isa, bus, &error_fatal); 146 sio->kbc = isa; 147 148 /* IDE */ 149 if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) { 150 isa = isa_new("isa-ide"); 151 d = DEVICE(isa); 152 if (k->ide.get_iobase) { 153 qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0)); 154 } 155 if (k->ide.get_iobase) { 156 qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1)); 157 } 158 if (k->ide.get_irq) { 159 qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0)); 160 } 161 isa_realize_and_unref(isa, bus, &error_fatal); 162 object_property_add_child(OBJECT(sio), "isa-ide", OBJECT(isa)); 163 sio->ide = isa; 164 trace_superio_create_ide(0, 165 k->ide.get_iobase ? 166 k->ide.get_iobase(sio, 0) : -1, 167 k->ide.get_irq ? 168 k->ide.get_irq(sio, 0) : -1); 169 } 170 } 171 172 static void isa_superio_class_init(ObjectClass *oc, void *data) 173 { 174 DeviceClass *dc = DEVICE_CLASS(oc); 175 176 dc->realize = isa_superio_realize; 177 /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */ 178 dc->user_creatable = false; 179 } 180 181 static const TypeInfo isa_superio_type_info = { 182 .name = TYPE_ISA_SUPERIO, 183 .parent = TYPE_ISA_DEVICE, 184 .abstract = true, 185 .class_size = sizeof(ISASuperIOClass), 186 .class_init = isa_superio_class_init, 187 }; 188 189 /* SMS FDC37M817 Super I/O */ 190 static void fdc37m81x_class_init(ObjectClass *klass, void *data) 191 { 192 ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 193 194 sc->serial.count = 2; /* NS16C550A */ 195 sc->parallel.count = 1; 196 sc->floppy.count = 1; /* SMSC 82077AA Compatible */ 197 sc->ide.count = 0; 198 } 199 200 static const TypeInfo fdc37m81x_type_info = { 201 .name = TYPE_FDC37M81X_SUPERIO, 202 .parent = TYPE_ISA_SUPERIO, 203 .instance_size = sizeof(ISASuperIODevice), 204 .class_init = fdc37m81x_class_init, 205 }; 206 207 static void isa_superio_register_types(void) 208 { 209 type_register_static(&isa_superio_type_info); 210 type_register_static(&fdc37m81x_type_info); 211 } 212 213 type_init(isa_superio_register_types) 214