1 /* 2 * Generic ISA Super I/O 3 * 4 * Copyright (c) 2010-2012 Herve Poussineau 5 * Copyright (c) 2011-2012 Andreas Färber 6 * Copyright (c) 2018 Philippe Mathieu-Daudé 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or later. 9 * See the COPYING file in the top-level directory. 10 * SPDX-License-Identifier: GPL-2.0-or-later 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/error-report.h" 15 #include "qemu/module.h" 16 #include "qapi/error.h" 17 #include "sysemu/blockdev.h" 18 #include "chardev/char.h" 19 #include "hw/char/parallel.h" 20 #include "hw/block/fdc.h" 21 #include "hw/isa/superio.h" 22 #include "hw/qdev-properties.h" 23 #include "hw/input/i8042.h" 24 #include "hw/char/parallel-isa.h" 25 #include "hw/char/serial.h" 26 #include "trace.h" 27 28 static void isa_superio_realize(DeviceState *dev, Error **errp) 29 { 30 ISASuperIODevice *sio = ISA_SUPERIO(dev); 31 ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio); 32 ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev)); 33 ISADevice *isa; 34 DeviceState *d; 35 Chardev *chr; 36 DriveInfo *fd[MAX_FD]; 37 char *name; 38 int i; 39 40 /* Parallel port */ 41 for (i = 0; i < k->parallel.count; i++) { 42 if (i >= ARRAY_SIZE(sio->parallel)) { 43 warn_report("superio: ignoring %td parallel controllers", 44 k->parallel.count - ARRAY_SIZE(sio->parallel)); 45 break; 46 } 47 if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) { 48 /* FIXME use a qdev chardev prop instead of parallel_hds[] */ 49 chr = parallel_hds[i]; 50 if (chr == NULL) { 51 name = g_strdup_printf("discarding-parallel%d", i); 52 chr = qemu_chr_new(name, "null", NULL); 53 } else { 54 name = g_strdup_printf("parallel%d", i); 55 } 56 isa = isa_new(TYPE_ISA_PARALLEL); 57 d = DEVICE(isa); 58 qdev_prop_set_uint32(d, "index", i); 59 if (k->parallel.get_iobase) { 60 qdev_prop_set_uint32(d, "iobase", 61 k->parallel.get_iobase(sio, i)); 62 } 63 if (k->parallel.get_irq) { 64 qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i)); 65 } 66 qdev_prop_set_chr(d, "chardev", chr); 67 object_property_add_child(OBJECT(dev), name, OBJECT(isa)); 68 isa_realize_and_unref(isa, bus, &error_fatal); 69 sio->parallel[i] = isa; 70 trace_superio_create_parallel(i, 71 k->parallel.get_iobase ? 72 k->parallel.get_iobase(sio, i) : -1, 73 k->parallel.get_irq ? 74 k->parallel.get_irq(sio, i) : -1); 75 g_free(name); 76 } 77 } 78 79 /* Serial */ 80 for (i = 0; i < k->serial.count; i++) { 81 if (i >= ARRAY_SIZE(sio->serial)) { 82 warn_report("superio: ignoring %td serial controllers", 83 k->serial.count - ARRAY_SIZE(sio->serial)); 84 break; 85 } 86 if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) { 87 /* FIXME use a qdev chardev prop instead of serial_hd() */ 88 chr = serial_hd(i); 89 if (chr == NULL) { 90 name = g_strdup_printf("discarding-serial%d", i); 91 chr = qemu_chr_new(name, "null", NULL); 92 } else { 93 name = g_strdup_printf("serial%d", i); 94 } 95 isa = isa_new(TYPE_ISA_SERIAL); 96 d = DEVICE(isa); 97 qdev_prop_set_uint32(d, "index", i); 98 if (k->serial.get_iobase) { 99 qdev_prop_set_uint32(d, "iobase", 100 k->serial.get_iobase(sio, i)); 101 } 102 if (k->serial.get_irq) { 103 qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i)); 104 } 105 qdev_prop_set_chr(d, "chardev", chr); 106 object_property_add_child(OBJECT(dev), name, OBJECT(isa)); 107 isa_realize_and_unref(isa, bus, &error_fatal); 108 sio->serial[i] = isa; 109 trace_superio_create_serial(i, 110 k->serial.get_iobase ? 111 k->serial.get_iobase(sio, i) : -1, 112 k->serial.get_irq ? 113 k->serial.get_irq(sio, i) : -1); 114 g_free(name); 115 } 116 } 117 118 /* Floppy disc */ 119 if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) { 120 isa = isa_new(TYPE_ISA_FDC); 121 d = DEVICE(isa); 122 if (k->floppy.get_iobase) { 123 qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0)); 124 } 125 if (k->floppy.get_irq) { 126 qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0)); 127 } 128 /* FIXME use a qdev drive property instead of drive_get() */ 129 for (i = 0; i < MAX_FD; i++) { 130 fd[i] = drive_get(IF_FLOPPY, 0, i); 131 } 132 object_property_add_child(OBJECT(sio), "isa-fdc", OBJECT(isa)); 133 isa_realize_and_unref(isa, bus, &error_fatal); 134 isa_fdc_init_drives(isa, fd); 135 sio->floppy = isa; 136 trace_superio_create_floppy(0, 137 k->floppy.get_iobase ? 138 k->floppy.get_iobase(sio, 0) : -1, 139 k->floppy.get_irq ? 140 k->floppy.get_irq(sio, 0) : -1); 141 } 142 143 /* Keyboard, mouse */ 144 isa = isa_new(TYPE_I8042); 145 object_property_add_child(OBJECT(sio), TYPE_I8042, OBJECT(isa)); 146 isa_realize_and_unref(isa, bus, &error_fatal); 147 sio->kbc = isa; 148 149 /* IDE */ 150 if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) { 151 isa = isa_new("isa-ide"); 152 d = DEVICE(isa); 153 if (k->ide.get_iobase) { 154 qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0)); 155 } 156 if (k->ide.get_iobase) { 157 qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1)); 158 } 159 if (k->ide.get_irq) { 160 qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0)); 161 } 162 object_property_add_child(OBJECT(sio), "isa-ide", OBJECT(isa)); 163 isa_realize_and_unref(isa, bus, &error_fatal); 164 sio->ide = isa; 165 trace_superio_create_ide(0, 166 k->ide.get_iobase ? 167 k->ide.get_iobase(sio, 0) : -1, 168 k->ide.get_irq ? 169 k->ide.get_irq(sio, 0) : -1); 170 } 171 } 172 173 static void isa_superio_class_init(ObjectClass *oc, void *data) 174 { 175 DeviceClass *dc = DEVICE_CLASS(oc); 176 177 dc->realize = isa_superio_realize; 178 /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */ 179 dc->user_creatable = false; 180 } 181 182 static const TypeInfo isa_superio_type_info = { 183 .name = TYPE_ISA_SUPERIO, 184 .parent = TYPE_ISA_DEVICE, 185 .abstract = true, 186 .class_size = sizeof(ISASuperIOClass), 187 .class_init = isa_superio_class_init, 188 }; 189 190 /* SMS FDC37M817 Super I/O */ 191 static void fdc37m81x_class_init(ObjectClass *klass, void *data) 192 { 193 ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 194 195 sc->serial.count = 2; /* NS16C550A */ 196 sc->parallel.count = 1; 197 sc->floppy.count = 1; /* SMSC 82077AA Compatible */ 198 sc->ide.count = 0; 199 } 200 201 static const TypeInfo fdc37m81x_type_info = { 202 .name = TYPE_FDC37M81X_SUPERIO, 203 .parent = TYPE_ISA_SUPERIO, 204 .instance_size = sizeof(ISASuperIODevice), 205 .class_init = fdc37m81x_class_init, 206 }; 207 208 static void isa_superio_register_types(void) 209 { 210 type_register_static(&isa_superio_type_info); 211 type_register_static(&fdc37m81x_type_info); 212 } 213 214 type_init(isa_superio_register_types) 215