xref: /openbmc/qemu/hw/isa/isa-superio.c (revision 77d361b1)
1 /*
2  * Generic ISA Super I/O
3  *
4  * Copyright (c) 2010-2012 Herve Poussineau
5  * Copyright (c) 2011-2012 Andreas Färber
6  * Copyright (c) 2018 Philippe Mathieu-Daudé
7  *
8  * This code is licensed under the GNU GPLv2 and later.
9  * See the COPYING file in the top-level directory.
10  * SPDX-License-Identifier: GPL-2.0-or-later
11  */
12 #include "qemu/osdep.h"
13 #include "qemu/error-report.h"
14 #include "qapi/error.h"
15 #include "sysemu/sysemu.h"
16 #include "sysemu/blockdev.h"
17 #include "chardev/char.h"
18 #include "hw/isa/superio.h"
19 #include "hw/input/i8042.h"
20 #include "hw/char/serial.h"
21 #include "trace.h"
22 
23 static void isa_superio_realize(DeviceState *dev, Error **errp)
24 {
25     ISASuperIODevice *sio = ISA_SUPERIO(dev);
26     ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio);
27     ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev));
28     ISADevice *isa;
29     DeviceState *d;
30     Chardev *chr;
31     DriveInfo *drive;
32     char *name;
33     int i;
34 
35     /* Parallel port */
36     for (i = 0; i < k->parallel.count; i++) {
37         if (i >= ARRAY_SIZE(sio->parallel)) {
38             warn_report("superio: ignoring %td parallel controllers",
39                         k->parallel.count - ARRAY_SIZE(sio->parallel));
40             break;
41         }
42         if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) {
43             /* FIXME use a qdev chardev prop instead of parallel_hds[] */
44             chr = parallel_hds[i];
45             if (chr == NULL) {
46                 name = g_strdup_printf("discarding-parallel%d", i);
47                 chr = qemu_chr_new(name, "null");
48             } else {
49                 name = g_strdup_printf("parallel%d", i);
50             }
51             isa = isa_create(bus, "isa-parallel");
52             d = DEVICE(isa);
53             qdev_prop_set_uint32(d, "index", i);
54             if (k->parallel.get_iobase) {
55                 qdev_prop_set_uint32(d, "iobase",
56                                      k->parallel.get_iobase(sio, i));
57             }
58             if (k->parallel.get_irq) {
59                 qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i));
60             }
61             qdev_prop_set_chr(d, "chardev", chr);
62             qdev_init_nofail(d);
63             sio->parallel[i] = isa;
64             trace_superio_create_parallel(i,
65                                           k->parallel.get_iobase ?
66                                           k->parallel.get_iobase(sio, i) : -1,
67                                           k->parallel.get_irq ?
68                                           k->parallel.get_irq(sio, i) : -1);
69             object_property_add_child(OBJECT(dev), name,
70                                       OBJECT(sio->parallel[i]), NULL);
71             g_free(name);
72         }
73     }
74 
75     /* Serial */
76     for (i = 0; i < k->serial.count; i++) {
77         if (i >= ARRAY_SIZE(sio->serial)) {
78             warn_report("superio: ignoring %td serial controllers",
79                         k->serial.count - ARRAY_SIZE(sio->serial));
80             break;
81         }
82         if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) {
83             /* FIXME use a qdev chardev prop instead of serial_hd() */
84             chr = serial_hd(i);
85             if (chr == NULL) {
86                 name = g_strdup_printf("discarding-serial%d", i);
87                 chr = qemu_chr_new(name, "null");
88             } else {
89                 name = g_strdup_printf("serial%d", i);
90             }
91             isa = isa_create(bus, TYPE_ISA_SERIAL);
92             d = DEVICE(isa);
93             qdev_prop_set_uint32(d, "index", i);
94             if (k->serial.get_iobase) {
95                 qdev_prop_set_uint32(d, "iobase",
96                                      k->serial.get_iobase(sio, i));
97             }
98             if (k->serial.get_irq) {
99                 qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i));
100             }
101             qdev_prop_set_chr(d, "chardev", chr);
102             qdev_init_nofail(d);
103             sio->serial[i] = isa;
104             trace_superio_create_serial(i,
105                                         k->serial.get_iobase ?
106                                         k->serial.get_iobase(sio, i) : -1,
107                                         k->serial.get_irq ?
108                                         k->serial.get_irq(sio, i) : -1);
109             object_property_add_child(OBJECT(dev), name,
110                                       OBJECT(sio->serial[0]), NULL);
111             g_free(name);
112         }
113     }
114 
115     /* Floppy disc */
116     if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) {
117         isa = isa_create(bus, "isa-fdc");
118         d = DEVICE(isa);
119         if (k->floppy.get_iobase) {
120             qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0));
121         }
122         if (k->floppy.get_irq) {
123             qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0));
124         }
125         /* FIXME use a qdev drive property instead of drive_get() */
126         drive = drive_get(IF_FLOPPY, 0, 0);
127         if (drive != NULL) {
128             qdev_prop_set_drive(d, "driveA", blk_by_legacy_dinfo(drive),
129                                 &error_fatal);
130         }
131         /* FIXME use a qdev drive property instead of drive_get() */
132         drive = drive_get(IF_FLOPPY, 0, 1);
133         if (drive != NULL) {
134             qdev_prop_set_drive(d, "driveB", blk_by_legacy_dinfo(drive),
135                                 &error_fatal);
136         }
137         qdev_init_nofail(d);
138         sio->floppy = isa;
139         trace_superio_create_floppy(0,
140                                     k->floppy.get_iobase ?
141                                     k->floppy.get_iobase(sio, 0) : -1,
142                                     k->floppy.get_irq ?
143                                     k->floppy.get_irq(sio, 0) : -1);
144     }
145 
146     /* Keyboard, mouse */
147     sio->kbc = isa_create_simple(bus, TYPE_I8042);
148 
149     /* IDE */
150     if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) {
151         isa = isa_create(bus, "isa-ide");
152         d = DEVICE(isa);
153         if (k->ide.get_iobase) {
154             qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0));
155         }
156         if (k->ide.get_iobase) {
157             qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1));
158         }
159         if (k->ide.get_irq) {
160             qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0));
161         }
162         qdev_init_nofail(d);
163         sio->ide = isa;
164         trace_superio_create_ide(0,
165                                  k->ide.get_iobase ?
166                                  k->ide.get_iobase(sio, 0) : -1,
167                                  k->ide.get_irq ?
168                                  k->ide.get_irq(sio, 0) : -1);
169     }
170 }
171 
172 static void isa_superio_class_init(ObjectClass *oc, void *data)
173 {
174     DeviceClass *dc = DEVICE_CLASS(oc);
175 
176     dc->realize = isa_superio_realize;
177     /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
178     dc->user_creatable = false;
179 }
180 
181 static const TypeInfo isa_superio_type_info = {
182     .name = TYPE_ISA_SUPERIO,
183     .parent = TYPE_ISA_DEVICE,
184     .abstract = true,
185     .class_size = sizeof(ISASuperIOClass),
186     .class_init = isa_superio_class_init,
187 };
188 
189 /* SMS FDC37M817 Super I/O */
190 static void fdc37m81x_class_init(ObjectClass *klass, void *data)
191 {
192     ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
193 
194     sc->serial.count = 2; /* NS16C550A */
195     sc->parallel.count = 1;
196     sc->floppy.count = 1; /* SMSC 82077AA Compatible */
197     sc->ide.count = 0;
198 }
199 
200 static const TypeInfo fdc37m81x_type_info = {
201     .name          = TYPE_FDC37M81X_SUPERIO,
202     .parent        = TYPE_ISA_SUPERIO,
203     .instance_size = sizeof(ISASuperIODevice),
204     .class_init    = fdc37m81x_class_init,
205 };
206 
207 static void isa_superio_register_types(void)
208 {
209     type_register_static(&isa_superio_type_info);
210     type_register_static(&fdc37m81x_type_info);
211 }
212 
213 type_init(isa_superio_register_types)
214