xref: /openbmc/qemu/hw/isa/isa-superio.c (revision 354908ce)
1 /*
2  * Generic ISA Super I/O
3  *
4  * Copyright (c) 2010-2012 Herve Poussineau
5  * Copyright (c) 2011-2012 Andreas Färber
6  * Copyright (c) 2018 Philippe Mathieu-Daudé
7  *
8  * This work is licensed under the terms of the GNU GPL, version 2 or later.
9  * See the COPYING file in the top-level directory.
10  * SPDX-License-Identifier: GPL-2.0-or-later
11  */
12 
13 #include "qemu/osdep.h"
14 #include "qemu/error-report.h"
15 #include "qemu/module.h"
16 #include "qapi/error.h"
17 #include "sysemu/sysemu.h"
18 #include "sysemu/blockdev.h"
19 #include "chardev/char.h"
20 #include "hw/isa/superio.h"
21 #include "hw/qdev-properties.h"
22 #include "hw/input/i8042.h"
23 #include "hw/char/serial.h"
24 #include "trace.h"
25 
26 static void isa_superio_realize(DeviceState *dev, Error **errp)
27 {
28     ISASuperIODevice *sio = ISA_SUPERIO(dev);
29     ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio);
30     ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev));
31     ISADevice *isa;
32     DeviceState *d;
33     Chardev *chr;
34     DriveInfo *drive;
35     char *name;
36     int i;
37 
38     /* Parallel port */
39     for (i = 0; i < k->parallel.count; i++) {
40         if (i >= ARRAY_SIZE(sio->parallel)) {
41             warn_report("superio: ignoring %td parallel controllers",
42                         k->parallel.count - ARRAY_SIZE(sio->parallel));
43             break;
44         }
45         if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) {
46             /* FIXME use a qdev chardev prop instead of parallel_hds[] */
47             chr = parallel_hds[i];
48             if (chr == NULL) {
49                 name = g_strdup_printf("discarding-parallel%d", i);
50                 chr = qemu_chr_new(name, "null", NULL);
51             } else {
52                 name = g_strdup_printf("parallel%d", i);
53             }
54             isa = isa_new("isa-parallel");
55             d = DEVICE(isa);
56             qdev_prop_set_uint32(d, "index", i);
57             if (k->parallel.get_iobase) {
58                 qdev_prop_set_uint32(d, "iobase",
59                                      k->parallel.get_iobase(sio, i));
60             }
61             if (k->parallel.get_irq) {
62                 qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i));
63             }
64             qdev_prop_set_chr(d, "chardev", chr);
65             object_property_add_child(OBJECT(dev), name, OBJECT(isa));
66             isa_realize_and_unref(isa, bus, &error_fatal);
67             sio->parallel[i] = isa;
68             trace_superio_create_parallel(i,
69                                           k->parallel.get_iobase ?
70                                           k->parallel.get_iobase(sio, i) : -1,
71                                           k->parallel.get_irq ?
72                                           k->parallel.get_irq(sio, i) : -1);
73             g_free(name);
74         }
75     }
76 
77     /* Serial */
78     for (i = 0; i < k->serial.count; i++) {
79         if (i >= ARRAY_SIZE(sio->serial)) {
80             warn_report("superio: ignoring %td serial controllers",
81                         k->serial.count - ARRAY_SIZE(sio->serial));
82             break;
83         }
84         if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) {
85             /* FIXME use a qdev chardev prop instead of serial_hd() */
86             chr = serial_hd(i);
87             if (chr == NULL) {
88                 name = g_strdup_printf("discarding-serial%d", i);
89                 chr = qemu_chr_new(name, "null", NULL);
90             } else {
91                 name = g_strdup_printf("serial%d", i);
92             }
93             isa = isa_new(TYPE_ISA_SERIAL);
94             d = DEVICE(isa);
95             qdev_prop_set_uint32(d, "index", i);
96             if (k->serial.get_iobase) {
97                 qdev_prop_set_uint32(d, "iobase",
98                                      k->serial.get_iobase(sio, i));
99             }
100             if (k->serial.get_irq) {
101                 qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i));
102             }
103             qdev_prop_set_chr(d, "chardev", chr);
104             object_property_add_child(OBJECT(dev), name, OBJECT(isa));
105             isa_realize_and_unref(isa, bus, &error_fatal);
106             sio->serial[i] = isa;
107             trace_superio_create_serial(i,
108                                         k->serial.get_iobase ?
109                                         k->serial.get_iobase(sio, i) : -1,
110                                         k->serial.get_irq ?
111                                         k->serial.get_irq(sio, i) : -1);
112             g_free(name);
113         }
114     }
115 
116     /* Floppy disc */
117     if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) {
118         isa = isa_new("isa-fdc");
119         d = DEVICE(isa);
120         if (k->floppy.get_iobase) {
121             qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0));
122         }
123         if (k->floppy.get_irq) {
124             qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0));
125         }
126         /* FIXME use a qdev drive property instead of drive_get() */
127         drive = drive_get(IF_FLOPPY, 0, 0);
128         if (drive != NULL) {
129             qdev_prop_set_drive(d, "driveA", blk_by_legacy_dinfo(drive),
130                                 &error_fatal);
131         }
132         /* FIXME use a qdev drive property instead of drive_get() */
133         drive = drive_get(IF_FLOPPY, 0, 1);
134         if (drive != NULL) {
135             qdev_prop_set_drive(d, "driveB", blk_by_legacy_dinfo(drive),
136                                 &error_fatal);
137         }
138         object_property_add_child(OBJECT(sio), "isa-fdc", OBJECT(isa));
139         isa_realize_and_unref(isa, bus, &error_fatal);
140         sio->floppy = isa;
141         trace_superio_create_floppy(0,
142                                     k->floppy.get_iobase ?
143                                     k->floppy.get_iobase(sio, 0) : -1,
144                                     k->floppy.get_irq ?
145                                     k->floppy.get_irq(sio, 0) : -1);
146     }
147 
148     /* Keyboard, mouse */
149     isa = isa_new(TYPE_I8042);
150     object_property_add_child(OBJECT(sio), TYPE_I8042, OBJECT(isa));
151     isa_realize_and_unref(isa, bus, &error_fatal);
152     sio->kbc = isa;
153 
154     /* IDE */
155     if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) {
156         isa = isa_new("isa-ide");
157         d = DEVICE(isa);
158         if (k->ide.get_iobase) {
159             qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0));
160         }
161         if (k->ide.get_iobase) {
162             qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1));
163         }
164         if (k->ide.get_irq) {
165             qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0));
166         }
167         isa_realize_and_unref(isa, bus, &error_fatal);
168         object_property_add_child(OBJECT(sio), "isa-ide", OBJECT(isa));
169         sio->ide = isa;
170         trace_superio_create_ide(0,
171                                  k->ide.get_iobase ?
172                                  k->ide.get_iobase(sio, 0) : -1,
173                                  k->ide.get_irq ?
174                                  k->ide.get_irq(sio, 0) : -1);
175     }
176 }
177 
178 static void isa_superio_class_init(ObjectClass *oc, void *data)
179 {
180     DeviceClass *dc = DEVICE_CLASS(oc);
181 
182     dc->realize = isa_superio_realize;
183     /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
184     dc->user_creatable = false;
185 }
186 
187 static const TypeInfo isa_superio_type_info = {
188     .name = TYPE_ISA_SUPERIO,
189     .parent = TYPE_ISA_DEVICE,
190     .abstract = true,
191     .class_size = sizeof(ISASuperIOClass),
192     .class_init = isa_superio_class_init,
193 };
194 
195 /* SMS FDC37M817 Super I/O */
196 static void fdc37m81x_class_init(ObjectClass *klass, void *data)
197 {
198     ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
199 
200     sc->serial.count = 2; /* NS16C550A */
201     sc->parallel.count = 1;
202     sc->floppy.count = 1; /* SMSC 82077AA Compatible */
203     sc->ide.count = 0;
204 }
205 
206 static const TypeInfo fdc37m81x_type_info = {
207     .name          = TYPE_FDC37M81X_SUPERIO,
208     .parent        = TYPE_ISA_SUPERIO,
209     .instance_size = sizeof(ISASuperIODevice),
210     .class_init    = fdc37m81x_class_init,
211 };
212 
213 static void isa_superio_register_types(void)
214 {
215     type_register_static(&isa_superio_type_info);
216     type_register_static(&fdc37m81x_type_info);
217 }
218 
219 type_init(isa_superio_register_types)
220