1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics 5 * 6 * Copyright (c) 2010,2011 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 28 #include "qemu/osdep.h" 29 #include "cpu.h" 30 #include "hw/hw.h" 31 #include "trace.h" 32 #include "qemu/timer.h" 33 #include "hw/ppc/spapr.h" 34 #include "hw/ppc/xics.h" 35 #include "hw/ppc/fdt.h" 36 #include "qapi/visitor.h" 37 #include "qapi/error.h" 38 39 /* 40 * Guest interfaces 41 */ 42 43 static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState *spapr, 44 target_ulong opcode, target_ulong *args) 45 { 46 target_ulong cppr = args[0]; 47 48 icp_set_cppr(ICP(cpu->intc), cppr); 49 return H_SUCCESS; 50 } 51 52 static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr, 53 target_ulong opcode, target_ulong *args) 54 { 55 target_ulong server = xics_get_cpu_index_by_dt_id(args[0]); 56 target_ulong mfrr = args[1]; 57 ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), server); 58 59 if (!icp) { 60 return H_PARAMETER; 61 } 62 63 icp_set_mfrr(icp, mfrr); 64 return H_SUCCESS; 65 } 66 67 static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr, 68 target_ulong opcode, target_ulong *args) 69 { 70 uint32_t xirr = icp_accept(ICP(cpu->intc)); 71 72 args[0] = xirr; 73 return H_SUCCESS; 74 } 75 76 static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr, 77 target_ulong opcode, target_ulong *args) 78 { 79 uint32_t xirr = icp_accept(ICP(cpu->intc)); 80 81 args[0] = xirr; 82 args[1] = cpu_get_host_ticks(); 83 return H_SUCCESS; 84 } 85 86 static target_ulong h_eoi(PowerPCCPU *cpu, sPAPRMachineState *spapr, 87 target_ulong opcode, target_ulong *args) 88 { 89 target_ulong xirr = args[0]; 90 91 icp_eoi(ICP(cpu->intc), xirr); 92 return H_SUCCESS; 93 } 94 95 static target_ulong h_ipoll(PowerPCCPU *cpu, sPAPRMachineState *spapr, 96 target_ulong opcode, target_ulong *args) 97 { 98 uint32_t mfrr; 99 uint32_t xirr = icp_ipoll(ICP(cpu->intc), &mfrr); 100 101 args[0] = xirr; 102 args[1] = mfrr; 103 104 return H_SUCCESS; 105 } 106 107 static void rtas_set_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr, 108 uint32_t token, 109 uint32_t nargs, target_ulong args, 110 uint32_t nret, target_ulong rets) 111 { 112 ICSState *ics = spapr->ics; 113 uint32_t nr, srcno, server, priority; 114 115 if ((nargs != 3) || (nret != 1)) { 116 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 117 return; 118 } 119 if (!ics) { 120 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 121 return; 122 } 123 124 nr = rtas_ld(args, 0); 125 server = xics_get_cpu_index_by_dt_id(rtas_ld(args, 1)); 126 priority = rtas_ld(args, 2); 127 128 if (!ics_valid_irq(ics, nr) || !xics_icp_get(XICS_FABRIC(spapr), server) 129 || (priority > 0xff)) { 130 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 131 return; 132 } 133 134 srcno = nr - ics->offset; 135 ics_simple_write_xive(ics, srcno, server, priority, priority); 136 137 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 138 } 139 140 static void rtas_get_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr, 141 uint32_t token, 142 uint32_t nargs, target_ulong args, 143 uint32_t nret, target_ulong rets) 144 { 145 ICSState *ics = spapr->ics; 146 uint32_t nr, srcno; 147 148 if ((nargs != 1) || (nret != 3)) { 149 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 150 return; 151 } 152 if (!ics) { 153 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 154 return; 155 } 156 157 nr = rtas_ld(args, 0); 158 159 if (!ics_valid_irq(ics, nr)) { 160 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 161 return; 162 } 163 164 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 165 srcno = nr - ics->offset; 166 rtas_st(rets, 1, ics->irqs[srcno].server); 167 rtas_st(rets, 2, ics->irqs[srcno].priority); 168 } 169 170 static void rtas_int_off(PowerPCCPU *cpu, sPAPRMachineState *spapr, 171 uint32_t token, 172 uint32_t nargs, target_ulong args, 173 uint32_t nret, target_ulong rets) 174 { 175 ICSState *ics = spapr->ics; 176 uint32_t nr, srcno; 177 178 if ((nargs != 1) || (nret != 1)) { 179 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 180 return; 181 } 182 if (!ics) { 183 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 184 return; 185 } 186 187 nr = rtas_ld(args, 0); 188 189 if (!ics_valid_irq(ics, nr)) { 190 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 191 return; 192 } 193 194 srcno = nr - ics->offset; 195 ics_simple_write_xive(ics, srcno, ics->irqs[srcno].server, 0xff, 196 ics->irqs[srcno].priority); 197 198 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 199 } 200 201 static void rtas_int_on(PowerPCCPU *cpu, sPAPRMachineState *spapr, 202 uint32_t token, 203 uint32_t nargs, target_ulong args, 204 uint32_t nret, target_ulong rets) 205 { 206 ICSState *ics = spapr->ics; 207 uint32_t nr, srcno; 208 209 if ((nargs != 1) || (nret != 1)) { 210 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 211 return; 212 } 213 if (!ics) { 214 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 215 return; 216 } 217 218 nr = rtas_ld(args, 0); 219 220 if (!ics_valid_irq(ics, nr)) { 221 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 222 return; 223 } 224 225 srcno = nr - ics->offset; 226 ics_simple_write_xive(ics, srcno, ics->irqs[srcno].server, 227 ics->irqs[srcno].saved_priority, 228 ics->irqs[srcno].saved_priority); 229 230 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 231 } 232 233 int xics_spapr_init(sPAPRMachineState *spapr, Error **errp) 234 { 235 /* Registration of global state belongs into realize */ 236 spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_set_xive); 237 spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_get_xive); 238 spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_int_off); 239 spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_int_on); 240 241 spapr_register_hypercall(H_CPPR, h_cppr); 242 spapr_register_hypercall(H_IPI, h_ipi); 243 spapr_register_hypercall(H_XIRR, h_xirr); 244 spapr_register_hypercall(H_XIRR_X, h_xirr_x); 245 spapr_register_hypercall(H_EOI, h_eoi); 246 spapr_register_hypercall(H_IPOLL, h_ipoll); 247 return 0; 248 } 249 250 #define ICS_IRQ_FREE(ics, srcno) \ 251 (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK))) 252 253 static int ics_find_free_block(ICSState *ics, int num, int alignnum) 254 { 255 int first, i; 256 257 for (first = 0; first < ics->nr_irqs; first += alignnum) { 258 if (num > (ics->nr_irqs - first)) { 259 return -1; 260 } 261 for (i = first; i < first + num; ++i) { 262 if (!ICS_IRQ_FREE(ics, i)) { 263 break; 264 } 265 } 266 if (i == (first + num)) { 267 return first; 268 } 269 } 270 271 return -1; 272 } 273 274 int spapr_ics_alloc(ICSState *ics, int irq_hint, bool lsi, Error **errp) 275 { 276 int irq; 277 278 if (!ics) { 279 return -1; 280 } 281 if (irq_hint) { 282 if (!ICS_IRQ_FREE(ics, irq_hint - ics->offset)) { 283 error_setg(errp, "can't allocate IRQ %d: already in use", irq_hint); 284 return -1; 285 } 286 irq = irq_hint; 287 } else { 288 irq = ics_find_free_block(ics, 1, 1); 289 if (irq < 0) { 290 error_setg(errp, "can't allocate IRQ: no IRQ left"); 291 return -1; 292 } 293 irq += ics->offset; 294 } 295 296 ics_set_irq_type(ics, irq - ics->offset, lsi); 297 trace_xics_alloc(irq); 298 299 return irq; 300 } 301 302 /* 303 * Allocate block of consecutive IRQs, and return the number of the first IRQ in 304 * the block. If align==true, aligns the first IRQ number to num. 305 */ 306 int spapr_ics_alloc_block(ICSState *ics, int num, bool lsi, 307 bool align, Error **errp) 308 { 309 int i, first = -1; 310 311 if (!ics) { 312 return -1; 313 } 314 315 /* 316 * MSIMesage::data is used for storing VIRQ so 317 * it has to be aligned to num to support multiple 318 * MSI vectors. MSI-X is not affected by this. 319 * The hint is used for the first IRQ, the rest should 320 * be allocated continuously. 321 */ 322 if (align) { 323 assert((num == 1) || (num == 2) || (num == 4) || 324 (num == 8) || (num == 16) || (num == 32)); 325 first = ics_find_free_block(ics, num, num); 326 } else { 327 first = ics_find_free_block(ics, num, 1); 328 } 329 if (first < 0) { 330 error_setg(errp, "can't find a free %d-IRQ block", num); 331 return -1; 332 } 333 334 if (first >= 0) { 335 for (i = first; i < first + num; ++i) { 336 ics_set_irq_type(ics, i, lsi); 337 } 338 } 339 first += ics->offset; 340 341 trace_xics_alloc_block(first, num, lsi, align); 342 343 return first; 344 } 345 346 static void ics_free(ICSState *ics, int srcno, int num) 347 { 348 int i; 349 350 for (i = srcno; i < srcno + num; ++i) { 351 if (ICS_IRQ_FREE(ics, i)) { 352 trace_xics_ics_free_warn(0, i + ics->offset); 353 } 354 memset(&ics->irqs[i], 0, sizeof(ICSIRQState)); 355 } 356 } 357 358 void spapr_ics_free(ICSState *ics, int irq, int num) 359 { 360 if (ics_valid_irq(ics, irq)) { 361 trace_xics_ics_free(0, irq, num); 362 ics_free(ics, irq - ics->offset, num); 363 } 364 } 365 366 void spapr_dt_xics(int nr_servers, void *fdt, uint32_t phandle) 367 { 368 uint32_t interrupt_server_ranges_prop[] = { 369 0, cpu_to_be32(nr_servers), 370 }; 371 int node; 372 373 _FDT(node = fdt_add_subnode(fdt, 0, "interrupt-controller")); 374 375 _FDT(fdt_setprop_string(fdt, node, "device_type", 376 "PowerPC-External-Interrupt-Presentation")); 377 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,ppc-xicp")); 378 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0)); 379 _FDT(fdt_setprop(fdt, node, "ibm,interrupt-server-ranges", 380 interrupt_server_ranges_prop, 381 sizeof(interrupt_server_ranges_prop))); 382 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2)); 383 _FDT(fdt_setprop_cell(fdt, node, "linux,phandle", phandle)); 384 _FDT(fdt_setprop_cell(fdt, node, "phandle", phandle)); 385 } 386