1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics 5 * 6 * Copyright (c) 2010,2011 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 28 #include "qemu/osdep.h" 29 #include "cpu.h" 30 #include "hw/hw.h" 31 #include "trace.h" 32 #include "qemu/timer.h" 33 #include "hw/ppc/spapr.h" 34 #include "hw/ppc/xics.h" 35 #include "hw/ppc/fdt.h" 36 #include "qapi/visitor.h" 37 #include "qapi/error.h" 38 39 /* 40 * Guest interfaces 41 */ 42 43 static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState *spapr, 44 target_ulong opcode, target_ulong *args) 45 { 46 target_ulong cppr = args[0]; 47 48 icp_set_cppr(ICP(cpu->intc), cppr); 49 return H_SUCCESS; 50 } 51 52 static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr, 53 target_ulong opcode, target_ulong *args) 54 { 55 target_ulong mfrr = args[1]; 56 ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), args[0]); 57 58 if (!icp) { 59 return H_PARAMETER; 60 } 61 62 icp_set_mfrr(icp, mfrr); 63 return H_SUCCESS; 64 } 65 66 static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr, 67 target_ulong opcode, target_ulong *args) 68 { 69 uint32_t xirr = icp_accept(ICP(cpu->intc)); 70 71 args[0] = xirr; 72 return H_SUCCESS; 73 } 74 75 static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr, 76 target_ulong opcode, target_ulong *args) 77 { 78 uint32_t xirr = icp_accept(ICP(cpu->intc)); 79 80 args[0] = xirr; 81 args[1] = cpu_get_host_ticks(); 82 return H_SUCCESS; 83 } 84 85 static target_ulong h_eoi(PowerPCCPU *cpu, sPAPRMachineState *spapr, 86 target_ulong opcode, target_ulong *args) 87 { 88 target_ulong xirr = args[0]; 89 90 icp_eoi(ICP(cpu->intc), xirr); 91 return H_SUCCESS; 92 } 93 94 static target_ulong h_ipoll(PowerPCCPU *cpu, sPAPRMachineState *spapr, 95 target_ulong opcode, target_ulong *args) 96 { 97 uint32_t mfrr; 98 uint32_t xirr = icp_ipoll(ICP(cpu->intc), &mfrr); 99 100 args[0] = xirr; 101 args[1] = mfrr; 102 103 return H_SUCCESS; 104 } 105 106 static void rtas_set_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr, 107 uint32_t token, 108 uint32_t nargs, target_ulong args, 109 uint32_t nret, target_ulong rets) 110 { 111 ICSState *ics = spapr->ics; 112 uint32_t nr, srcno, server, priority; 113 114 if ((nargs != 3) || (nret != 1)) { 115 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 116 return; 117 } 118 if (!ics) { 119 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 120 return; 121 } 122 123 nr = rtas_ld(args, 0); 124 server = rtas_ld(args, 1); 125 priority = rtas_ld(args, 2); 126 127 if (!ics_valid_irq(ics, nr) || !xics_icp_get(XICS_FABRIC(spapr), server) 128 || (priority > 0xff)) { 129 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 130 return; 131 } 132 133 srcno = nr - ics->offset; 134 ics_simple_write_xive(ics, srcno, server, priority, priority); 135 136 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 137 } 138 139 static void rtas_get_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr, 140 uint32_t token, 141 uint32_t nargs, target_ulong args, 142 uint32_t nret, target_ulong rets) 143 { 144 ICSState *ics = spapr->ics; 145 uint32_t nr, srcno; 146 147 if ((nargs != 1) || (nret != 3)) { 148 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 149 return; 150 } 151 if (!ics) { 152 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 153 return; 154 } 155 156 nr = rtas_ld(args, 0); 157 158 if (!ics_valid_irq(ics, nr)) { 159 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 160 return; 161 } 162 163 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 164 srcno = nr - ics->offset; 165 rtas_st(rets, 1, ics->irqs[srcno].server); 166 rtas_st(rets, 2, ics->irqs[srcno].priority); 167 } 168 169 static void rtas_int_off(PowerPCCPU *cpu, sPAPRMachineState *spapr, 170 uint32_t token, 171 uint32_t nargs, target_ulong args, 172 uint32_t nret, target_ulong rets) 173 { 174 ICSState *ics = spapr->ics; 175 uint32_t nr, srcno; 176 177 if ((nargs != 1) || (nret != 1)) { 178 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 179 return; 180 } 181 if (!ics) { 182 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 183 return; 184 } 185 186 nr = rtas_ld(args, 0); 187 188 if (!ics_valid_irq(ics, nr)) { 189 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 190 return; 191 } 192 193 srcno = nr - ics->offset; 194 ics_simple_write_xive(ics, srcno, ics->irqs[srcno].server, 0xff, 195 ics->irqs[srcno].priority); 196 197 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 198 } 199 200 static void rtas_int_on(PowerPCCPU *cpu, sPAPRMachineState *spapr, 201 uint32_t token, 202 uint32_t nargs, target_ulong args, 203 uint32_t nret, target_ulong rets) 204 { 205 ICSState *ics = spapr->ics; 206 uint32_t nr, srcno; 207 208 if ((nargs != 1) || (nret != 1)) { 209 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 210 return; 211 } 212 if (!ics) { 213 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 214 return; 215 } 216 217 nr = rtas_ld(args, 0); 218 219 if (!ics_valid_irq(ics, nr)) { 220 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 221 return; 222 } 223 224 srcno = nr - ics->offset; 225 ics_simple_write_xive(ics, srcno, ics->irqs[srcno].server, 226 ics->irqs[srcno].saved_priority, 227 ics->irqs[srcno].saved_priority); 228 229 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 230 } 231 232 void xics_spapr_init(sPAPRMachineState *spapr) 233 { 234 /* Registration of global state belongs into realize */ 235 spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_set_xive); 236 spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_get_xive); 237 spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_int_off); 238 spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_int_on); 239 240 spapr_register_hypercall(H_CPPR, h_cppr); 241 spapr_register_hypercall(H_IPI, h_ipi); 242 spapr_register_hypercall(H_XIRR, h_xirr); 243 spapr_register_hypercall(H_XIRR_X, h_xirr_x); 244 spapr_register_hypercall(H_EOI, h_eoi); 245 spapr_register_hypercall(H_IPOLL, h_ipoll); 246 } 247 248 #define ICS_IRQ_FREE(ics, srcno) \ 249 (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK))) 250 251 static int ics_find_free_block(ICSState *ics, int num, int alignnum) 252 { 253 int first, i; 254 255 for (first = 0; first < ics->nr_irqs; first += alignnum) { 256 if (num > (ics->nr_irqs - first)) { 257 return -1; 258 } 259 for (i = first; i < first + num; ++i) { 260 if (!ICS_IRQ_FREE(ics, i)) { 261 break; 262 } 263 } 264 if (i == (first + num)) { 265 return first; 266 } 267 } 268 269 return -1; 270 } 271 272 int spapr_ics_alloc(ICSState *ics, int irq_hint, bool lsi, Error **errp) 273 { 274 int irq; 275 276 if (!ics) { 277 return -1; 278 } 279 if (irq_hint) { 280 if (!ICS_IRQ_FREE(ics, irq_hint - ics->offset)) { 281 error_setg(errp, "can't allocate IRQ %d: already in use", irq_hint); 282 return -1; 283 } 284 irq = irq_hint; 285 } else { 286 irq = ics_find_free_block(ics, 1, 1); 287 if (irq < 0) { 288 error_setg(errp, "can't allocate IRQ: no IRQ left"); 289 return -1; 290 } 291 irq += ics->offset; 292 } 293 294 ics_set_irq_type(ics, irq - ics->offset, lsi); 295 trace_xics_alloc(irq); 296 297 return irq; 298 } 299 300 /* 301 * Allocate block of consecutive IRQs, and return the number of the first IRQ in 302 * the block. If align==true, aligns the first IRQ number to num. 303 */ 304 int spapr_ics_alloc_block(ICSState *ics, int num, bool lsi, 305 bool align, Error **errp) 306 { 307 int i, first = -1; 308 309 if (!ics) { 310 return -1; 311 } 312 313 /* 314 * MSIMesage::data is used for storing VIRQ so 315 * it has to be aligned to num to support multiple 316 * MSI vectors. MSI-X is not affected by this. 317 * The hint is used for the first IRQ, the rest should 318 * be allocated continuously. 319 */ 320 if (align) { 321 assert((num == 1) || (num == 2) || (num == 4) || 322 (num == 8) || (num == 16) || (num == 32)); 323 first = ics_find_free_block(ics, num, num); 324 } else { 325 first = ics_find_free_block(ics, num, 1); 326 } 327 if (first < 0) { 328 error_setg(errp, "can't find a free %d-IRQ block", num); 329 return -1; 330 } 331 332 if (first >= 0) { 333 for (i = first; i < first + num; ++i) { 334 ics_set_irq_type(ics, i, lsi); 335 } 336 } 337 first += ics->offset; 338 339 trace_xics_alloc_block(first, num, lsi, align); 340 341 return first; 342 } 343 344 static void ics_free(ICSState *ics, int srcno, int num) 345 { 346 int i; 347 348 for (i = srcno; i < srcno + num; ++i) { 349 if (ICS_IRQ_FREE(ics, i)) { 350 trace_xics_ics_free_warn(0, i + ics->offset); 351 } 352 memset(&ics->irqs[i], 0, sizeof(ICSIRQState)); 353 } 354 } 355 356 void spapr_ics_free(ICSState *ics, int irq, int num) 357 { 358 if (ics_valid_irq(ics, irq)) { 359 trace_xics_ics_free(0, irq, num); 360 ics_free(ics, irq - ics->offset, num); 361 } 362 } 363 364 void spapr_dt_xics(int nr_servers, void *fdt, uint32_t phandle) 365 { 366 uint32_t interrupt_server_ranges_prop[] = { 367 0, cpu_to_be32(nr_servers), 368 }; 369 int node; 370 371 _FDT(node = fdt_add_subnode(fdt, 0, "interrupt-controller")); 372 373 _FDT(fdt_setprop_string(fdt, node, "device_type", 374 "PowerPC-External-Interrupt-Presentation")); 375 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,ppc-xicp")); 376 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0)); 377 _FDT(fdt_setprop(fdt, node, "ibm,interrupt-server-ranges", 378 interrupt_server_ranges_prop, 379 sizeof(interrupt_server_ranges_prop))); 380 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2)); 381 _FDT(fdt_setprop_cell(fdt, node, "linux,phandle", phandle)); 382 _FDT(fdt_setprop_cell(fdt, node, "phandle", phandle)); 383 } 384