1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation 5 * 6 * Copyright (c) 2013 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 28 #include "qemu/osdep.h" 29 #include "qapi/error.h" 30 #include "qemu-common.h" 31 #include "cpu.h" 32 #include "hw/hw.h" 33 #include "trace.h" 34 #include "sysemu/kvm.h" 35 #include "hw/ppc/spapr.h" 36 #include "hw/ppc/xics.h" 37 #include "hw/ppc/xics_spapr.h" 38 #include "kvm_ppc.h" 39 #include "qemu/config-file.h" 40 #include "qemu/error-report.h" 41 42 #include <sys/ioctl.h> 43 44 static int kernel_xics_fd = -1; 45 46 typedef struct KVMEnabledICP { 47 unsigned long vcpu_id; 48 QLIST_ENTRY(KVMEnabledICP) node; 49 } KVMEnabledICP; 50 51 static QLIST_HEAD(, KVMEnabledICP) 52 kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps); 53 54 /* 55 * ICP-KVM 56 */ 57 static void icp_get_kvm_state(ICPState *icp) 58 { 59 uint64_t state; 60 int ret; 61 62 /* ICP for this CPU thread is not in use, exiting */ 63 if (!icp->cs) { 64 return; 65 } 66 67 ret = kvm_get_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state); 68 if (ret != 0) { 69 error_report("Unable to retrieve KVM interrupt controller state" 70 " for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno)); 71 exit(1); 72 } 73 74 icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT; 75 icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT) 76 & KVM_REG_PPC_ICP_MFRR_MASK; 77 icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT) 78 & KVM_REG_PPC_ICP_PPRI_MASK; 79 } 80 81 static void do_icp_synchronize_state(CPUState *cpu, run_on_cpu_data arg) 82 { 83 icp_get_kvm_state(arg.host_ptr); 84 } 85 86 static void icp_synchronize_state(ICPState *icp) 87 { 88 if (icp->cs) { 89 run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp)); 90 } 91 } 92 93 static int icp_set_kvm_state(ICPState *icp, int version_id) 94 { 95 uint64_t state; 96 int ret; 97 98 /* ICP for this CPU thread is not in use, exiting */ 99 if (!icp->cs) { 100 return 0; 101 } 102 103 state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT) 104 | ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) 105 | ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT); 106 107 ret = kvm_set_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state); 108 if (ret != 0) { 109 error_report("Unable to restore KVM interrupt controller state (0x%" 110 PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs), 111 strerror(errno)); 112 return ret; 113 } 114 115 return 0; 116 } 117 118 static void icp_kvm_reset(DeviceState *dev) 119 { 120 ICPStateClass *icpc = ICP_GET_CLASS(dev); 121 122 icpc->parent_reset(dev); 123 124 icp_set_kvm_state(ICP(dev), 1); 125 } 126 127 static void icp_kvm_realize(DeviceState *dev, Error **errp) 128 { 129 ICPState *icp = ICP(dev); 130 ICPStateClass *icpc = ICP_GET_CLASS(icp); 131 Error *local_err = NULL; 132 CPUState *cs; 133 KVMEnabledICP *enabled_icp; 134 unsigned long vcpu_id; 135 int ret; 136 137 if (kernel_xics_fd == -1) { 138 abort(); 139 } 140 141 icpc->parent_realize(dev, &local_err); 142 if (local_err) { 143 error_propagate(errp, local_err); 144 return; 145 } 146 147 cs = icp->cs; 148 vcpu_id = kvm_arch_vcpu_id(cs); 149 150 /* 151 * If we are reusing a parked vCPU fd corresponding to the CPU 152 * which was hot-removed earlier we don't have to renable 153 * KVM_CAP_IRQ_XICS capability again. 154 */ 155 QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) { 156 if (enabled_icp->vcpu_id == vcpu_id) { 157 return; 158 } 159 } 160 161 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id); 162 if (ret < 0) { 163 error_setg(errp, "Unable to connect CPU%ld to kernel XICS: %s", vcpu_id, 164 strerror(errno)); 165 return; 166 } 167 enabled_icp = g_malloc(sizeof(*enabled_icp)); 168 enabled_icp->vcpu_id = vcpu_id; 169 QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node); 170 } 171 172 static void icp_kvm_class_init(ObjectClass *klass, void *data) 173 { 174 DeviceClass *dc = DEVICE_CLASS(klass); 175 ICPStateClass *icpc = ICP_CLASS(klass); 176 177 device_class_set_parent_realize(dc, icp_kvm_realize, 178 &icpc->parent_realize); 179 device_class_set_parent_reset(dc, icp_kvm_reset, 180 &icpc->parent_reset); 181 182 icpc->pre_save = icp_get_kvm_state; 183 icpc->post_load = icp_set_kvm_state; 184 icpc->synchronize_state = icp_synchronize_state; 185 } 186 187 static const TypeInfo icp_kvm_info = { 188 .name = TYPE_KVM_ICP, 189 .parent = TYPE_ICP, 190 .instance_size = sizeof(ICPState), 191 .class_init = icp_kvm_class_init, 192 .class_size = sizeof(ICPStateClass), 193 }; 194 195 /* 196 * ICS-KVM 197 */ 198 static void ics_get_kvm_state(ICSState *ics) 199 { 200 uint64_t state; 201 int i; 202 203 for (i = 0; i < ics->nr_irqs; i++) { 204 ICSIRQState *irq = &ics->irqs[i]; 205 206 kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES, 207 i + ics->offset, &state, false, &error_fatal); 208 209 irq->server = state & KVM_XICS_DESTINATION_MASK; 210 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT) 211 & KVM_XICS_PRIORITY_MASK; 212 /* 213 * To be consistent with the software emulation in xics.c, we 214 * split out the masked state + priority that we get from the 215 * kernel into 'current priority' (0xff if masked) and 216 * 'saved priority' (if masked, this is the priority the 217 * interrupt had before it was masked). Masking and unmasking 218 * are done with the ibm,int-off and ibm,int-on RTAS calls. 219 */ 220 if (state & KVM_XICS_MASKED) { 221 irq->priority = 0xff; 222 } else { 223 irq->priority = irq->saved_priority; 224 } 225 226 irq->status = 0; 227 if (state & KVM_XICS_PENDING) { 228 if (state & KVM_XICS_LEVEL_SENSITIVE) { 229 irq->status |= XICS_STATUS_ASSERTED; 230 } else { 231 /* 232 * A pending edge-triggered interrupt (or MSI) 233 * must have been rejected previously when we 234 * first detected it and tried to deliver it, 235 * so mark it as pending and previously rejected 236 * for consistency with how xics.c works. 237 */ 238 irq->status |= XICS_STATUS_MASKED_PENDING 239 | XICS_STATUS_REJECTED; 240 } 241 } 242 if (state & KVM_XICS_PRESENTED) { 243 irq->status |= XICS_STATUS_PRESENTED; 244 } 245 if (state & KVM_XICS_QUEUED) { 246 irq->status |= XICS_STATUS_QUEUED; 247 } 248 } 249 } 250 251 static void ics_synchronize_state(ICSState *ics) 252 { 253 ics_get_kvm_state(ics); 254 } 255 256 static int ics_set_kvm_state(ICSState *ics, int version_id) 257 { 258 uint64_t state; 259 int i; 260 Error *local_err = NULL; 261 262 for (i = 0; i < ics->nr_irqs; i++) { 263 ICSIRQState *irq = &ics->irqs[i]; 264 int ret; 265 266 state = irq->server; 267 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK) 268 << KVM_XICS_PRIORITY_SHIFT; 269 if (irq->priority != irq->saved_priority) { 270 assert(irq->priority == 0xff); 271 state |= KVM_XICS_MASKED; 272 } 273 274 if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) { 275 state |= KVM_XICS_LEVEL_SENSITIVE; 276 if (irq->status & XICS_STATUS_ASSERTED) { 277 state |= KVM_XICS_PENDING; 278 } 279 } else { 280 if (irq->status & XICS_STATUS_MASKED_PENDING) { 281 state |= KVM_XICS_PENDING; 282 } 283 } 284 if (irq->status & XICS_STATUS_PRESENTED) { 285 state |= KVM_XICS_PRESENTED; 286 } 287 if (irq->status & XICS_STATUS_QUEUED) { 288 state |= KVM_XICS_QUEUED; 289 } 290 291 ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES, 292 i + ics->offset, &state, true, &local_err); 293 if (local_err) { 294 error_report_err(local_err); 295 return ret; 296 } 297 } 298 299 return 0; 300 } 301 302 void ics_kvm_set_irq(void *opaque, int srcno, int val) 303 { 304 ICSState *ics = opaque; 305 struct kvm_irq_level args; 306 int rc; 307 308 args.irq = srcno + ics->offset; 309 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) { 310 if (!val) { 311 return; 312 } 313 args.level = KVM_INTERRUPT_SET; 314 } else { 315 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET; 316 } 317 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args); 318 if (rc < 0) { 319 perror("kvm_irq_line"); 320 } 321 } 322 323 static void ics_kvm_reset(DeviceState *dev) 324 { 325 ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev); 326 327 icsc->parent_reset(dev); 328 329 ics_set_kvm_state(ICS_KVM(dev), 1); 330 } 331 332 static void ics_kvm_reset_handler(void *dev) 333 { 334 ics_kvm_reset(dev); 335 } 336 337 static void ics_kvm_realize(DeviceState *dev, Error **errp) 338 { 339 ICSState *ics = ICS_KVM(dev); 340 ICSStateClass *icsc = ICS_BASE_GET_CLASS(ics); 341 Error *local_err = NULL; 342 343 icsc->parent_realize(dev, &local_err); 344 if (local_err) { 345 error_propagate(errp, local_err); 346 return; 347 } 348 349 qemu_register_reset(ics_kvm_reset_handler, ics); 350 } 351 352 static void ics_kvm_class_init(ObjectClass *klass, void *data) 353 { 354 ICSStateClass *icsc = ICS_BASE_CLASS(klass); 355 DeviceClass *dc = DEVICE_CLASS(klass); 356 357 device_class_set_parent_realize(dc, ics_kvm_realize, 358 &icsc->parent_realize); 359 device_class_set_parent_reset(dc, ics_kvm_reset, 360 &icsc->parent_reset); 361 362 icsc->pre_save = ics_get_kvm_state; 363 icsc->post_load = ics_set_kvm_state; 364 icsc->synchronize_state = ics_synchronize_state; 365 } 366 367 static const TypeInfo ics_kvm_info = { 368 .name = TYPE_ICS_KVM, 369 .parent = TYPE_ICS_BASE, 370 .instance_size = sizeof(ICSState), 371 .class_init = ics_kvm_class_init, 372 }; 373 374 /* 375 * XICS-KVM 376 */ 377 378 static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr, 379 uint32_t token, 380 uint32_t nargs, target_ulong args, 381 uint32_t nret, target_ulong rets) 382 { 383 error_report("pseries: %s must never be called for in-kernel XICS", 384 __func__); 385 } 386 387 int xics_kvm_init(sPAPRMachineState *spapr, Error **errp) 388 { 389 int rc; 390 391 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) { 392 error_setg(errp, 393 "KVM and IRQ_XICS capability must be present for in-kernel XICS"); 394 goto fail; 395 } 396 397 spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy); 398 spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy); 399 spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy); 400 spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy); 401 402 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive"); 403 if (rc < 0) { 404 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive"); 405 goto fail; 406 } 407 408 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive"); 409 if (rc < 0) { 410 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive"); 411 goto fail; 412 } 413 414 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on"); 415 if (rc < 0) { 416 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on"); 417 goto fail; 418 } 419 420 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off"); 421 if (rc < 0) { 422 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off"); 423 goto fail; 424 } 425 426 /* Create the KVM XICS device */ 427 rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false); 428 if (rc < 0) { 429 error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS"); 430 goto fail; 431 } 432 433 kernel_xics_fd = rc; 434 kvm_kernel_irqchip = true; 435 kvm_msi_via_irqfd_allowed = true; 436 kvm_gsi_direct_mapping = true; 437 438 return 0; 439 440 fail: 441 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive"); 442 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive"); 443 kvmppc_define_rtas_kernel_token(0, "ibm,int-on"); 444 kvmppc_define_rtas_kernel_token(0, "ibm,int-off"); 445 return -1; 446 } 447 448 static void xics_kvm_register_types(void) 449 { 450 type_register_static(&ics_kvm_info); 451 type_register_static(&icp_kvm_info); 452 } 453 454 type_init(xics_kvm_register_types) 455