1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation 5 * 6 * Copyright (c) 2013 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 28 #include "hw/hw.h" 29 #include "trace.h" 30 #include "hw/ppc/spapr.h" 31 #include "hw/ppc/xics.h" 32 #include "kvm_ppc.h" 33 #include "qemu/config-file.h" 34 #include "qemu/error-report.h" 35 36 #include <sys/ioctl.h> 37 38 typedef struct KVMXICSState { 39 XICSState parent_obj; 40 41 uint32_t set_xive_token; 42 uint32_t get_xive_token; 43 uint32_t int_off_token; 44 uint32_t int_on_token; 45 int kernel_xics_fd; 46 } KVMXICSState; 47 48 /* 49 * ICP-KVM 50 */ 51 static void icp_get_kvm_state(ICPState *ss) 52 { 53 uint64_t state; 54 struct kvm_one_reg reg = { 55 .id = KVM_REG_PPC_ICP_STATE, 56 .addr = (uintptr_t)&state, 57 }; 58 int ret; 59 60 /* ICP for this CPU thread is not in use, exiting */ 61 if (!ss->cs) { 62 return; 63 } 64 65 ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, ®); 66 if (ret != 0) { 67 error_report("Unable to retrieve KVM interrupt controller state" 68 " for CPU %d: %s", ss->cs->cpu_index, strerror(errno)); 69 exit(1); 70 } 71 72 ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT; 73 ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT) 74 & KVM_REG_PPC_ICP_MFRR_MASK; 75 ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT) 76 & KVM_REG_PPC_ICP_PPRI_MASK; 77 } 78 79 static int icp_set_kvm_state(ICPState *ss, int version_id) 80 { 81 uint64_t state; 82 struct kvm_one_reg reg = { 83 .id = KVM_REG_PPC_ICP_STATE, 84 .addr = (uintptr_t)&state, 85 }; 86 int ret; 87 88 /* ICP for this CPU thread is not in use, exiting */ 89 if (!ss->cs) { 90 return 0; 91 } 92 93 state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT) 94 | ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) 95 | ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT); 96 97 ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, ®); 98 if (ret != 0) { 99 error_report("Unable to restore KVM interrupt controller state (0x%" 100 PRIx64 ") for CPU %d: %s", state, ss->cs->cpu_index, 101 strerror(errno)); 102 return ret; 103 } 104 105 return 0; 106 } 107 108 static void icp_kvm_reset(DeviceState *dev) 109 { 110 ICPState *icp = ICP(dev); 111 112 icp->xirr = 0; 113 icp->pending_priority = 0xff; 114 icp->mfrr = 0xff; 115 116 /* Make all outputs are deasserted */ 117 qemu_set_irq(icp->output, 0); 118 119 icp_set_kvm_state(icp, 1); 120 } 121 122 static void icp_kvm_class_init(ObjectClass *klass, void *data) 123 { 124 DeviceClass *dc = DEVICE_CLASS(klass); 125 ICPStateClass *icpc = ICP_CLASS(klass); 126 127 dc->reset = icp_kvm_reset; 128 icpc->pre_save = icp_get_kvm_state; 129 icpc->post_load = icp_set_kvm_state; 130 } 131 132 static const TypeInfo icp_kvm_info = { 133 .name = TYPE_KVM_ICP, 134 .parent = TYPE_ICP, 135 .instance_size = sizeof(ICPState), 136 .class_init = icp_kvm_class_init, 137 .class_size = sizeof(ICPStateClass), 138 }; 139 140 /* 141 * ICS-KVM 142 */ 143 static void ics_get_kvm_state(ICSState *ics) 144 { 145 KVMXICSState *icpkvm = KVM_XICS(ics->icp); 146 uint64_t state; 147 struct kvm_device_attr attr = { 148 .flags = 0, 149 .group = KVM_DEV_XICS_GRP_SOURCES, 150 .addr = (uint64_t)(uintptr_t)&state, 151 }; 152 int i; 153 154 for (i = 0; i < ics->nr_irqs; i++) { 155 ICSIRQState *irq = &ics->irqs[i]; 156 int ret; 157 158 attr.attr = i + ics->offset; 159 160 ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr); 161 if (ret != 0) { 162 error_report("Unable to retrieve KVM interrupt controller state" 163 " for IRQ %d: %s", i + ics->offset, strerror(errno)); 164 exit(1); 165 } 166 167 irq->server = state & KVM_XICS_DESTINATION_MASK; 168 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT) 169 & KVM_XICS_PRIORITY_MASK; 170 /* 171 * To be consistent with the software emulation in xics.c, we 172 * split out the masked state + priority that we get from the 173 * kernel into 'current priority' (0xff if masked) and 174 * 'saved priority' (if masked, this is the priority the 175 * interrupt had before it was masked). Masking and unmasking 176 * are done with the ibm,int-off and ibm,int-on RTAS calls. 177 */ 178 if (state & KVM_XICS_MASKED) { 179 irq->priority = 0xff; 180 } else { 181 irq->priority = irq->saved_priority; 182 } 183 184 if (state & KVM_XICS_PENDING) { 185 if (state & KVM_XICS_LEVEL_SENSITIVE) { 186 irq->status |= XICS_STATUS_ASSERTED; 187 } else { 188 /* 189 * A pending edge-triggered interrupt (or MSI) 190 * must have been rejected previously when we 191 * first detected it and tried to deliver it, 192 * so mark it as pending and previously rejected 193 * for consistency with how xics.c works. 194 */ 195 irq->status |= XICS_STATUS_MASKED_PENDING 196 | XICS_STATUS_REJECTED; 197 } 198 } 199 } 200 } 201 202 static int ics_set_kvm_state(ICSState *ics, int version_id) 203 { 204 KVMXICSState *icpkvm = KVM_XICS(ics->icp); 205 uint64_t state; 206 struct kvm_device_attr attr = { 207 .flags = 0, 208 .group = KVM_DEV_XICS_GRP_SOURCES, 209 .addr = (uint64_t)(uintptr_t)&state, 210 }; 211 int i; 212 213 for (i = 0; i < ics->nr_irqs; i++) { 214 ICSIRQState *irq = &ics->irqs[i]; 215 int ret; 216 217 attr.attr = i + ics->offset; 218 219 state = irq->server; 220 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK) 221 << KVM_XICS_PRIORITY_SHIFT; 222 if (irq->priority != irq->saved_priority) { 223 assert(irq->priority == 0xff); 224 state |= KVM_XICS_MASKED; 225 } 226 227 if (ics->islsi[i]) { 228 state |= KVM_XICS_LEVEL_SENSITIVE; 229 if (irq->status & XICS_STATUS_ASSERTED) { 230 state |= KVM_XICS_PENDING; 231 } 232 } else { 233 if (irq->status & XICS_STATUS_MASKED_PENDING) { 234 state |= KVM_XICS_PENDING; 235 } 236 } 237 238 ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr); 239 if (ret != 0) { 240 error_report("Unable to restore KVM interrupt controller state" 241 " for IRQs %d: %s", i + ics->offset, strerror(errno)); 242 return ret; 243 } 244 } 245 246 return 0; 247 } 248 249 static void ics_kvm_set_irq(void *opaque, int srcno, int val) 250 { 251 ICSState *ics = opaque; 252 struct kvm_irq_level args; 253 int rc; 254 255 args.irq = srcno + ics->offset; 256 if (!ics->islsi[srcno]) { 257 if (!val) { 258 return; 259 } 260 args.level = KVM_INTERRUPT_SET; 261 } else { 262 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET; 263 } 264 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args); 265 if (rc < 0) { 266 perror("kvm_irq_line"); 267 } 268 } 269 270 static void ics_kvm_reset(DeviceState *dev) 271 { 272 ics_set_kvm_state(ICS(dev), 1); 273 } 274 275 static void ics_kvm_realize(DeviceState *dev, Error **errp) 276 { 277 ICSState *ics = ICS(dev); 278 279 if (!ics->nr_irqs) { 280 error_setg(errp, "Number of interrupts needs to be greater 0"); 281 return; 282 } 283 ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); 284 ics->islsi = g_malloc0(ics->nr_irqs * sizeof(bool)); 285 ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs); 286 } 287 288 static void ics_kvm_class_init(ObjectClass *klass, void *data) 289 { 290 DeviceClass *dc = DEVICE_CLASS(klass); 291 ICSStateClass *icsc = ICS_CLASS(klass); 292 293 dc->realize = ics_kvm_realize; 294 dc->reset = ics_kvm_reset; 295 icsc->pre_save = ics_get_kvm_state; 296 icsc->post_load = ics_set_kvm_state; 297 } 298 299 static const TypeInfo ics_kvm_info = { 300 .name = TYPE_KVM_ICS, 301 .parent = TYPE_ICS, 302 .instance_size = sizeof(ICSState), 303 .class_init = ics_kvm_class_init, 304 }; 305 306 /* 307 * XICS-KVM 308 */ 309 static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu) 310 { 311 CPUState *cs; 312 ICPState *ss; 313 KVMXICSState *icpkvm = KVM_XICS(icp); 314 315 cs = CPU(cpu); 316 ss = &icp->ss[cs->cpu_index]; 317 318 assert(cs->cpu_index < icp->nr_servers); 319 if (icpkvm->kernel_xics_fd == -1) { 320 abort(); 321 } 322 323 if (icpkvm->kernel_xics_fd != -1) { 324 int ret; 325 struct kvm_enable_cap xics_enable_cap = { 326 .cap = KVM_CAP_IRQ_XICS, 327 .flags = 0, 328 .args = {icpkvm->kernel_xics_fd, cs->cpu_index, 0, 0}, 329 }; 330 331 ss->cs = cs; 332 333 ret = kvm_vcpu_ioctl(ss->cs, KVM_ENABLE_CAP, &xics_enable_cap); 334 if (ret < 0) { 335 error_report("Unable to connect CPU%d to kernel XICS: %s", 336 cs->cpu_index, strerror(errno)); 337 exit(1); 338 } 339 } 340 } 341 342 static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp) 343 { 344 icp->nr_irqs = icp->ics->nr_irqs = nr_irqs; 345 } 346 347 static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers, 348 Error **errp) 349 { 350 int i; 351 352 icp->nr_servers = nr_servers; 353 354 icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState)); 355 for (i = 0; i < icp->nr_servers; i++) { 356 char buffer[32]; 357 object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP); 358 snprintf(buffer, sizeof(buffer), "icp[%d]", i); 359 object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]), 360 errp); 361 } 362 } 363 364 static void rtas_dummy(PowerPCCPU *cpu, sPAPREnvironment *spapr, 365 uint32_t token, 366 uint32_t nargs, target_ulong args, 367 uint32_t nret, target_ulong rets) 368 { 369 error_report("pseries: %s must never be called for in-kernel XICS", 370 __func__); 371 } 372 373 static void xics_kvm_realize(DeviceState *dev, Error **errp) 374 { 375 KVMXICSState *icpkvm = KVM_XICS(dev); 376 XICSState *icp = XICS_COMMON(dev); 377 int i, rc; 378 Error *error = NULL; 379 struct kvm_create_device xics_create_device = { 380 .type = KVM_DEV_TYPE_XICS, 381 .flags = 0, 382 }; 383 384 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) { 385 error_setg(errp, 386 "KVM and IRQ_XICS capability must be present for in-kernel XICS"); 387 goto fail; 388 } 389 390 icpkvm->set_xive_token = spapr_rtas_register("ibm,set-xive", rtas_dummy); 391 icpkvm->get_xive_token = spapr_rtas_register("ibm,get-xive", rtas_dummy); 392 icpkvm->int_off_token = spapr_rtas_register("ibm,int-off", rtas_dummy); 393 icpkvm->int_on_token = spapr_rtas_register("ibm,int-on", rtas_dummy); 394 395 rc = kvmppc_define_rtas_kernel_token(icpkvm->set_xive_token, 396 "ibm,set-xive"); 397 if (rc < 0) { 398 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive"); 399 goto fail; 400 } 401 402 rc = kvmppc_define_rtas_kernel_token(icpkvm->get_xive_token, 403 "ibm,get-xive"); 404 if (rc < 0) { 405 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive"); 406 goto fail; 407 } 408 409 rc = kvmppc_define_rtas_kernel_token(icpkvm->int_on_token, "ibm,int-on"); 410 if (rc < 0) { 411 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on"); 412 goto fail; 413 } 414 415 rc = kvmppc_define_rtas_kernel_token(icpkvm->int_off_token, "ibm,int-off"); 416 if (rc < 0) { 417 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off"); 418 goto fail; 419 } 420 421 /* Create the kernel ICP */ 422 rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device); 423 if (rc < 0) { 424 error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS"); 425 goto fail; 426 } 427 428 icpkvm->kernel_xics_fd = xics_create_device.fd; 429 430 object_property_set_bool(OBJECT(icp->ics), true, "realized", &error); 431 if (error) { 432 error_propagate(errp, error); 433 goto fail; 434 } 435 436 assert(icp->nr_servers); 437 for (i = 0; i < icp->nr_servers; i++) { 438 object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error); 439 if (error) { 440 error_propagate(errp, error); 441 goto fail; 442 } 443 } 444 445 kvm_kernel_irqchip = true; 446 kvm_irqfds_allowed = true; 447 kvm_msi_via_irqfd_allowed = true; 448 kvm_gsi_direct_mapping = true; 449 450 return; 451 452 fail: 453 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive"); 454 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive"); 455 kvmppc_define_rtas_kernel_token(0, "ibm,int-on"); 456 kvmppc_define_rtas_kernel_token(0, "ibm,int-off"); 457 } 458 459 static void xics_kvm_initfn(Object *obj) 460 { 461 XICSState *xics = XICS_COMMON(obj); 462 463 xics->ics = ICS(object_new(TYPE_KVM_ICS)); 464 object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL); 465 xics->ics->icp = xics; 466 } 467 468 static void xics_kvm_class_init(ObjectClass *oc, void *data) 469 { 470 DeviceClass *dc = DEVICE_CLASS(oc); 471 XICSStateClass *xsc = XICS_COMMON_CLASS(oc); 472 473 dc->realize = xics_kvm_realize; 474 xsc->cpu_setup = xics_kvm_cpu_setup; 475 xsc->set_nr_irqs = xics_kvm_set_nr_irqs; 476 xsc->set_nr_servers = xics_kvm_set_nr_servers; 477 } 478 479 static const TypeInfo xics_kvm_info = { 480 .name = TYPE_KVM_XICS, 481 .parent = TYPE_XICS_COMMON, 482 .instance_size = sizeof(KVMXICSState), 483 .class_init = xics_kvm_class_init, 484 .instance_init = xics_kvm_initfn, 485 }; 486 487 static void xics_kvm_register_types(void) 488 { 489 type_register_static(&xics_kvm_info); 490 type_register_static(&ics_kvm_info); 491 type_register_static(&icp_kvm_info); 492 } 493 494 type_init(xics_kvm_register_types) 495