1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation 5 * 6 * Copyright (c) 2013 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 28 #include "hw/hw.h" 29 #include "trace.h" 30 #include "hw/ppc/spapr.h" 31 #include "hw/ppc/xics.h" 32 #include "kvm_ppc.h" 33 #include "qemu/config-file.h" 34 #include "qemu/error-report.h" 35 36 #include <sys/ioctl.h> 37 38 typedef struct KVMXICSState { 39 XICSState parent_obj; 40 41 int kernel_xics_fd; 42 } KVMXICSState; 43 44 /* 45 * ICP-KVM 46 */ 47 static void icp_get_kvm_state(ICPState *ss) 48 { 49 uint64_t state; 50 struct kvm_one_reg reg = { 51 .id = KVM_REG_PPC_ICP_STATE, 52 .addr = (uintptr_t)&state, 53 }; 54 int ret; 55 56 /* ICP for this CPU thread is not in use, exiting */ 57 if (!ss->cs) { 58 return; 59 } 60 61 ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, ®); 62 if (ret != 0) { 63 error_report("Unable to retrieve KVM interrupt controller state" 64 " for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno)); 65 exit(1); 66 } 67 68 ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT; 69 ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT) 70 & KVM_REG_PPC_ICP_MFRR_MASK; 71 ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT) 72 & KVM_REG_PPC_ICP_PPRI_MASK; 73 } 74 75 static int icp_set_kvm_state(ICPState *ss, int version_id) 76 { 77 uint64_t state; 78 struct kvm_one_reg reg = { 79 .id = KVM_REG_PPC_ICP_STATE, 80 .addr = (uintptr_t)&state, 81 }; 82 int ret; 83 84 /* ICP for this CPU thread is not in use, exiting */ 85 if (!ss->cs) { 86 return 0; 87 } 88 89 state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT) 90 | ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) 91 | ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT); 92 93 ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, ®); 94 if (ret != 0) { 95 error_report("Unable to restore KVM interrupt controller state (0x%" 96 PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs), 97 strerror(errno)); 98 return ret; 99 } 100 101 return 0; 102 } 103 104 static void icp_kvm_reset(DeviceState *dev) 105 { 106 ICPState *icp = ICP(dev); 107 108 icp->xirr = 0; 109 icp->pending_priority = 0xff; 110 icp->mfrr = 0xff; 111 112 /* Make all outputs are deasserted */ 113 qemu_set_irq(icp->output, 0); 114 115 icp_set_kvm_state(icp, 1); 116 } 117 118 static void icp_kvm_class_init(ObjectClass *klass, void *data) 119 { 120 DeviceClass *dc = DEVICE_CLASS(klass); 121 ICPStateClass *icpc = ICP_CLASS(klass); 122 123 dc->reset = icp_kvm_reset; 124 icpc->pre_save = icp_get_kvm_state; 125 icpc->post_load = icp_set_kvm_state; 126 } 127 128 static const TypeInfo icp_kvm_info = { 129 .name = TYPE_KVM_ICP, 130 .parent = TYPE_ICP, 131 .instance_size = sizeof(ICPState), 132 .class_init = icp_kvm_class_init, 133 .class_size = sizeof(ICPStateClass), 134 }; 135 136 /* 137 * ICS-KVM 138 */ 139 static void ics_get_kvm_state(ICSState *ics) 140 { 141 KVMXICSState *icpkvm = KVM_XICS(ics->icp); 142 uint64_t state; 143 struct kvm_device_attr attr = { 144 .flags = 0, 145 .group = KVM_DEV_XICS_GRP_SOURCES, 146 .addr = (uint64_t)(uintptr_t)&state, 147 }; 148 int i; 149 150 for (i = 0; i < ics->nr_irqs; i++) { 151 ICSIRQState *irq = &ics->irqs[i]; 152 int ret; 153 154 attr.attr = i + ics->offset; 155 156 ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr); 157 if (ret != 0) { 158 error_report("Unable to retrieve KVM interrupt controller state" 159 " for IRQ %d: %s", i + ics->offset, strerror(errno)); 160 exit(1); 161 } 162 163 irq->server = state & KVM_XICS_DESTINATION_MASK; 164 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT) 165 & KVM_XICS_PRIORITY_MASK; 166 /* 167 * To be consistent with the software emulation in xics.c, we 168 * split out the masked state + priority that we get from the 169 * kernel into 'current priority' (0xff if masked) and 170 * 'saved priority' (if masked, this is the priority the 171 * interrupt had before it was masked). Masking and unmasking 172 * are done with the ibm,int-off and ibm,int-on RTAS calls. 173 */ 174 if (state & KVM_XICS_MASKED) { 175 irq->priority = 0xff; 176 } else { 177 irq->priority = irq->saved_priority; 178 } 179 180 if (state & KVM_XICS_PENDING) { 181 if (state & KVM_XICS_LEVEL_SENSITIVE) { 182 irq->status |= XICS_STATUS_ASSERTED; 183 } else { 184 /* 185 * A pending edge-triggered interrupt (or MSI) 186 * must have been rejected previously when we 187 * first detected it and tried to deliver it, 188 * so mark it as pending and previously rejected 189 * for consistency with how xics.c works. 190 */ 191 irq->status |= XICS_STATUS_MASKED_PENDING 192 | XICS_STATUS_REJECTED; 193 } 194 } 195 } 196 } 197 198 static int ics_set_kvm_state(ICSState *ics, int version_id) 199 { 200 KVMXICSState *icpkvm = KVM_XICS(ics->icp); 201 uint64_t state; 202 struct kvm_device_attr attr = { 203 .flags = 0, 204 .group = KVM_DEV_XICS_GRP_SOURCES, 205 .addr = (uint64_t)(uintptr_t)&state, 206 }; 207 int i; 208 209 for (i = 0; i < ics->nr_irqs; i++) { 210 ICSIRQState *irq = &ics->irqs[i]; 211 int ret; 212 213 attr.attr = i + ics->offset; 214 215 state = irq->server; 216 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK) 217 << KVM_XICS_PRIORITY_SHIFT; 218 if (irq->priority != irq->saved_priority) { 219 assert(irq->priority == 0xff); 220 state |= KVM_XICS_MASKED; 221 } 222 223 if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) { 224 state |= KVM_XICS_LEVEL_SENSITIVE; 225 if (irq->status & XICS_STATUS_ASSERTED) { 226 state |= KVM_XICS_PENDING; 227 } 228 } else { 229 if (irq->status & XICS_STATUS_MASKED_PENDING) { 230 state |= KVM_XICS_PENDING; 231 } 232 } 233 234 ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr); 235 if (ret != 0) { 236 error_report("Unable to restore KVM interrupt controller state" 237 " for IRQs %d: %s", i + ics->offset, strerror(errno)); 238 return ret; 239 } 240 } 241 242 return 0; 243 } 244 245 static void ics_kvm_set_irq(void *opaque, int srcno, int val) 246 { 247 ICSState *ics = opaque; 248 struct kvm_irq_level args; 249 int rc; 250 251 args.irq = srcno + ics->offset; 252 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) { 253 if (!val) { 254 return; 255 } 256 args.level = KVM_INTERRUPT_SET; 257 } else { 258 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET; 259 } 260 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args); 261 if (rc < 0) { 262 perror("kvm_irq_line"); 263 } 264 } 265 266 static void ics_kvm_reset(DeviceState *dev) 267 { 268 ICSState *ics = ICS(dev); 269 int i; 270 271 memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs); 272 for (i = 0; i < ics->nr_irqs; i++) { 273 ics->irqs[i].priority = 0xff; 274 ics->irqs[i].saved_priority = 0xff; 275 } 276 277 ics_set_kvm_state(ics, 1); 278 } 279 280 static void ics_kvm_realize(DeviceState *dev, Error **errp) 281 { 282 ICSState *ics = ICS(dev); 283 284 if (!ics->nr_irqs) { 285 error_setg(errp, "Number of interrupts needs to be greater 0"); 286 return; 287 } 288 ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); 289 ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs); 290 } 291 292 static void ics_kvm_class_init(ObjectClass *klass, void *data) 293 { 294 DeviceClass *dc = DEVICE_CLASS(klass); 295 ICSStateClass *icsc = ICS_CLASS(klass); 296 297 dc->realize = ics_kvm_realize; 298 dc->reset = ics_kvm_reset; 299 icsc->pre_save = ics_get_kvm_state; 300 icsc->post_load = ics_set_kvm_state; 301 } 302 303 static const TypeInfo ics_kvm_info = { 304 .name = TYPE_KVM_ICS, 305 .parent = TYPE_ICS, 306 .instance_size = sizeof(ICSState), 307 .class_init = ics_kvm_class_init, 308 }; 309 310 /* 311 * XICS-KVM 312 */ 313 static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu) 314 { 315 CPUState *cs; 316 ICPState *ss; 317 KVMXICSState *icpkvm = KVM_XICS(icp); 318 319 cs = CPU(cpu); 320 ss = &icp->ss[cs->cpu_index]; 321 322 assert(cs->cpu_index < icp->nr_servers); 323 if (icpkvm->kernel_xics_fd == -1) { 324 abort(); 325 } 326 327 if (icpkvm->kernel_xics_fd != -1) { 328 int ret; 329 330 ss->cs = cs; 331 332 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, 333 icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs)); 334 if (ret < 0) { 335 error_report("Unable to connect CPU%ld to kernel XICS: %s", 336 kvm_arch_vcpu_id(cs), strerror(errno)); 337 exit(1); 338 } 339 } 340 } 341 342 static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp) 343 { 344 icp->nr_irqs = icp->ics->nr_irqs = nr_irqs; 345 } 346 347 static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers, 348 Error **errp) 349 { 350 int i; 351 352 icp->nr_servers = nr_servers; 353 354 icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState)); 355 for (i = 0; i < icp->nr_servers; i++) { 356 char buffer[32]; 357 object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP); 358 snprintf(buffer, sizeof(buffer), "icp[%d]", i); 359 object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]), 360 errp); 361 } 362 } 363 364 static void rtas_dummy(PowerPCCPU *cpu, sPAPREnvironment *spapr, 365 uint32_t token, 366 uint32_t nargs, target_ulong args, 367 uint32_t nret, target_ulong rets) 368 { 369 error_report("pseries: %s must never be called for in-kernel XICS", 370 __func__); 371 } 372 373 static void xics_kvm_realize(DeviceState *dev, Error **errp) 374 { 375 KVMXICSState *icpkvm = KVM_XICS(dev); 376 XICSState *icp = XICS_COMMON(dev); 377 int i, rc; 378 Error *error = NULL; 379 struct kvm_create_device xics_create_device = { 380 .type = KVM_DEV_TYPE_XICS, 381 .flags = 0, 382 }; 383 384 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) { 385 error_setg(errp, 386 "KVM and IRQ_XICS capability must be present for in-kernel XICS"); 387 goto fail; 388 } 389 390 spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy); 391 spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy); 392 spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy); 393 spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy); 394 395 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive"); 396 if (rc < 0) { 397 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive"); 398 goto fail; 399 } 400 401 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive"); 402 if (rc < 0) { 403 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive"); 404 goto fail; 405 } 406 407 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on"); 408 if (rc < 0) { 409 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on"); 410 goto fail; 411 } 412 413 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off"); 414 if (rc < 0) { 415 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off"); 416 goto fail; 417 } 418 419 /* Create the kernel ICP */ 420 rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device); 421 if (rc < 0) { 422 error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS"); 423 goto fail; 424 } 425 426 icpkvm->kernel_xics_fd = xics_create_device.fd; 427 428 object_property_set_bool(OBJECT(icp->ics), true, "realized", &error); 429 if (error) { 430 error_propagate(errp, error); 431 goto fail; 432 } 433 434 assert(icp->nr_servers); 435 for (i = 0; i < icp->nr_servers; i++) { 436 object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error); 437 if (error) { 438 error_propagate(errp, error); 439 goto fail; 440 } 441 } 442 443 kvm_kernel_irqchip = true; 444 kvm_irqfds_allowed = true; 445 kvm_msi_via_irqfd_allowed = true; 446 kvm_gsi_direct_mapping = true; 447 448 return; 449 450 fail: 451 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive"); 452 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive"); 453 kvmppc_define_rtas_kernel_token(0, "ibm,int-on"); 454 kvmppc_define_rtas_kernel_token(0, "ibm,int-off"); 455 } 456 457 static void xics_kvm_initfn(Object *obj) 458 { 459 XICSState *xics = XICS_COMMON(obj); 460 461 xics->ics = ICS(object_new(TYPE_KVM_ICS)); 462 object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL); 463 xics->ics->icp = xics; 464 } 465 466 static void xics_kvm_class_init(ObjectClass *oc, void *data) 467 { 468 DeviceClass *dc = DEVICE_CLASS(oc); 469 XICSStateClass *xsc = XICS_COMMON_CLASS(oc); 470 471 dc->realize = xics_kvm_realize; 472 xsc->cpu_setup = xics_kvm_cpu_setup; 473 xsc->set_nr_irqs = xics_kvm_set_nr_irqs; 474 xsc->set_nr_servers = xics_kvm_set_nr_servers; 475 } 476 477 static const TypeInfo xics_kvm_info = { 478 .name = TYPE_KVM_XICS, 479 .parent = TYPE_XICS_COMMON, 480 .instance_size = sizeof(KVMXICSState), 481 .class_init = xics_kvm_class_init, 482 .instance_init = xics_kvm_initfn, 483 }; 484 485 static void xics_kvm_register_types(void) 486 { 487 type_register_static(&xics_kvm_info); 488 type_register_static(&ics_kvm_info); 489 type_register_static(&icp_kvm_info); 490 } 491 492 type_init(xics_kvm_register_types) 493