1 /* 2 * QEMU PowerPC sPAPR XIVE interrupt controller model 3 * 4 * Copyright (c) 2017-2019, IBM Corporation. 5 * 6 * This code is licensed under the GPL version 2 or later. See the 7 * COPYING file in the top-level directory. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "qemu/log.h" 12 #include "qemu/error-report.h" 13 #include "qapi/error.h" 14 #include "target/ppc/cpu.h" 15 #include "sysemu/cpus.h" 16 #include "sysemu/kvm.h" 17 #include "hw/ppc/spapr.h" 18 #include "hw/ppc/spapr_xive.h" 19 #include "hw/ppc/xive.h" 20 #include "kvm_ppc.h" 21 22 #include <sys/ioctl.h> 23 24 /* 25 * Helpers for CPU hotplug 26 * 27 * TODO: make a common KVMEnabledCPU layer for XICS and XIVE 28 */ 29 typedef struct KVMEnabledCPU { 30 unsigned long vcpu_id; 31 QLIST_ENTRY(KVMEnabledCPU) node; 32 } KVMEnabledCPU; 33 34 static QLIST_HEAD(, KVMEnabledCPU) 35 kvm_enabled_cpus = QLIST_HEAD_INITIALIZER(&kvm_enabled_cpus); 36 37 static bool kvm_cpu_is_enabled(CPUState *cs) 38 { 39 KVMEnabledCPU *enabled_cpu; 40 unsigned long vcpu_id = kvm_arch_vcpu_id(cs); 41 42 QLIST_FOREACH(enabled_cpu, &kvm_enabled_cpus, node) { 43 if (enabled_cpu->vcpu_id == vcpu_id) { 44 return true; 45 } 46 } 47 return false; 48 } 49 50 static void kvm_cpu_enable(CPUState *cs) 51 { 52 KVMEnabledCPU *enabled_cpu; 53 unsigned long vcpu_id = kvm_arch_vcpu_id(cs); 54 55 enabled_cpu = g_malloc(sizeof(*enabled_cpu)); 56 enabled_cpu->vcpu_id = vcpu_id; 57 QLIST_INSERT_HEAD(&kvm_enabled_cpus, enabled_cpu, node); 58 } 59 60 /* 61 * XIVE Thread Interrupt Management context (KVM) 62 */ 63 64 void kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **errp) 65 { 66 SpaprXive *xive = SPAPR_MACHINE(qdev_get_machine())->xive; 67 unsigned long vcpu_id; 68 int ret; 69 70 /* Check if CPU was hot unplugged and replugged. */ 71 if (kvm_cpu_is_enabled(tctx->cs)) { 72 return; 73 } 74 75 vcpu_id = kvm_arch_vcpu_id(tctx->cs); 76 77 ret = kvm_vcpu_enable_cap(tctx->cs, KVM_CAP_PPC_IRQ_XIVE, 0, xive->fd, 78 vcpu_id, 0); 79 if (ret < 0) { 80 error_setg(errp, "XIVE: unable to connect CPU%ld to KVM device: %s", 81 vcpu_id, strerror(errno)); 82 return; 83 } 84 85 kvm_cpu_enable(tctx->cs); 86 } 87 88 /* 89 * XIVE Interrupt Source (KVM) 90 */ 91 92 /* 93 * At reset, the interrupt sources are simply created and MASKED. We 94 * only need to inform the KVM XIVE device about their type: LSI or 95 * MSI. 96 */ 97 void kvmppc_xive_source_reset_one(XiveSource *xsrc, int srcno, Error **errp) 98 { 99 SpaprXive *xive = SPAPR_XIVE(xsrc->xive); 100 uint64_t state = 0; 101 102 if (xive_source_irq_is_lsi(xsrc, srcno)) { 103 state |= KVM_XIVE_LEVEL_SENSITIVE; 104 if (xsrc->status[srcno] & XIVE_STATUS_ASSERTED) { 105 state |= KVM_XIVE_LEVEL_ASSERTED; 106 } 107 } 108 109 kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_SOURCE, srcno, &state, 110 true, errp); 111 } 112 113 void kvmppc_xive_source_reset(XiveSource *xsrc, Error **errp) 114 { 115 int i; 116 117 for (i = 0; i < xsrc->nr_irqs; i++) { 118 Error *local_err = NULL; 119 120 kvmppc_xive_source_reset_one(xsrc, i, &local_err); 121 if (local_err) { 122 error_propagate(errp, local_err); 123 return; 124 } 125 } 126 } 127 128 void kvmppc_xive_source_set_irq(void *opaque, int srcno, int val) 129 { 130 XiveSource *xsrc = opaque; 131 struct kvm_irq_level args; 132 int rc; 133 134 args.irq = srcno; 135 if (!xive_source_irq_is_lsi(xsrc, srcno)) { 136 if (!val) { 137 return; 138 } 139 args.level = KVM_INTERRUPT_SET; 140 } else { 141 if (val) { 142 xsrc->status[srcno] |= XIVE_STATUS_ASSERTED; 143 args.level = KVM_INTERRUPT_SET_LEVEL; 144 } else { 145 xsrc->status[srcno] &= ~XIVE_STATUS_ASSERTED; 146 args.level = KVM_INTERRUPT_UNSET; 147 } 148 } 149 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args); 150 if (rc < 0) { 151 error_report("XIVE: kvm_irq_line() failed : %s", strerror(errno)); 152 } 153 } 154 155 /* 156 * sPAPR XIVE interrupt controller (KVM) 157 */ 158 159 static void *kvmppc_xive_mmap(SpaprXive *xive, int pgoff, size_t len, 160 Error **errp) 161 { 162 void *addr; 163 uint32_t page_shift = 16; /* TODO: fix page_shift */ 164 165 addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, xive->fd, 166 pgoff << page_shift); 167 if (addr == MAP_FAILED) { 168 error_setg_errno(errp, errno, "XIVE: unable to set memory mapping"); 169 return NULL; 170 } 171 172 return addr; 173 } 174 175 /* 176 * All the XIVE memory regions are now backed by mappings from the KVM 177 * XIVE device. 178 */ 179 void kvmppc_xive_connect(SpaprXive *xive, Error **errp) 180 { 181 XiveSource *xsrc = &xive->source; 182 XiveENDSource *end_xsrc = &xive->end_source; 183 Error *local_err = NULL; 184 size_t esb_len = (1ull << xsrc->esb_shift) * xsrc->nr_irqs; 185 size_t tima_len = 4ull << TM_SHIFT; 186 187 if (!kvmppc_has_cap_xive()) { 188 error_setg(errp, "IRQ_XIVE capability must be present for KVM"); 189 return; 190 } 191 192 /* First, create the KVM XIVE device */ 193 xive->fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_XIVE, false); 194 if (xive->fd < 0) { 195 error_setg_errno(errp, -xive->fd, "XIVE: error creating KVM device"); 196 return; 197 } 198 199 /* 200 * 1. Source ESB pages - KVM mapping 201 */ 202 xsrc->esb_mmap = kvmppc_xive_mmap(xive, KVM_XIVE_ESB_PAGE_OFFSET, esb_len, 203 &local_err); 204 if (local_err) { 205 error_propagate(errp, local_err); 206 return; 207 } 208 209 memory_region_init_ram_device_ptr(&xsrc->esb_mmio, OBJECT(xsrc), 210 "xive.esb", esb_len, xsrc->esb_mmap); 211 sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); 212 213 /* 214 * 2. END ESB pages (No KVM support yet) 215 */ 216 sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); 217 218 /* 219 * 3. TIMA pages - KVM mapping 220 */ 221 xive->tm_mmap = kvmppc_xive_mmap(xive, KVM_XIVE_TIMA_PAGE_OFFSET, tima_len, 222 &local_err); 223 if (local_err) { 224 error_propagate(errp, local_err); 225 return; 226 } 227 memory_region_init_ram_device_ptr(&xive->tm_mmio, OBJECT(xive), 228 "xive.tima", tima_len, xive->tm_mmap); 229 sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); 230 231 kvm_kernel_irqchip = true; 232 kvm_msi_via_irqfd_allowed = true; 233 kvm_gsi_direct_mapping = true; 234 235 /* Map all regions */ 236 spapr_xive_map_mmio(xive); 237 } 238