1 /* 2 * KVM in-kernel OpenPIC 3 * 4 * Copyright 2013 Freescale Semiconductor, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include <sys/ioctl.h> 26 #include "exec/address-spaces.h" 27 #include "hw/hw.h" 28 #include "hw/ppc/openpic.h" 29 #include "hw/pci/msi.h" 30 #include "hw/sysbus.h" 31 #include "sysemu/kvm.h" 32 #include "qemu/log.h" 33 34 typedef struct KVMOpenPICState { 35 SysBusDevice busdev; 36 MemoryRegion mem; 37 MemoryListener mem_listener; 38 uint32_t fd; 39 uint32_t model; 40 } KVMOpenPICState; 41 42 static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level) 43 { 44 kvm_set_irq(kvm_state, n_IRQ, level); 45 } 46 47 static void kvm_openpic_reset(DeviceState *d) 48 { 49 qemu_log_mask(LOG_UNIMP, "%s: unimplemented\n", __func__); 50 } 51 52 static void kvm_openpic_write(void *opaque, hwaddr addr, uint64_t val, 53 unsigned size) 54 { 55 KVMOpenPICState *opp = opaque; 56 struct kvm_device_attr attr; 57 uint32_t val32 = val; 58 int ret; 59 60 attr.group = KVM_DEV_MPIC_GRP_REGISTER; 61 attr.attr = addr; 62 attr.addr = (uint64_t)(unsigned long)&val32; 63 64 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr); 65 if (ret < 0) { 66 qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__, 67 strerror(errno), attr.attr); 68 } 69 } 70 71 static uint64_t kvm_openpic_read(void *opaque, hwaddr addr, unsigned size) 72 { 73 KVMOpenPICState *opp = opaque; 74 struct kvm_device_attr attr; 75 uint32_t val = 0xdeadbeef; 76 int ret; 77 78 attr.group = KVM_DEV_MPIC_GRP_REGISTER; 79 attr.attr = addr; 80 attr.addr = (uint64_t)(unsigned long)&val; 81 82 ret = ioctl(opp->fd, KVM_GET_DEVICE_ATTR, &attr); 83 if (ret < 0) { 84 qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__, 85 strerror(errno), attr.attr); 86 return 0; 87 } 88 89 return val; 90 } 91 92 static const MemoryRegionOps kvm_openpic_mem_ops = { 93 .write = kvm_openpic_write, 94 .read = kvm_openpic_read, 95 .endianness = DEVICE_BIG_ENDIAN, 96 .impl = { 97 .min_access_size = 4, 98 .max_access_size = 4, 99 }, 100 }; 101 102 static void kvm_openpic_region_add(MemoryListener *listener, 103 MemoryRegionSection *section) 104 { 105 KVMOpenPICState *opp = container_of(listener, KVMOpenPICState, 106 mem_listener); 107 struct kvm_device_attr attr; 108 uint64_t reg_base; 109 int ret; 110 111 if (section->address_space != &address_space_memory) { 112 abort(); 113 } 114 115 reg_base = section->offset_within_address_space; 116 117 attr.group = KVM_DEV_MPIC_GRP_MISC; 118 attr.attr = KVM_DEV_MPIC_BASE_ADDR; 119 attr.addr = (uint64_t)(unsigned long)®_base; 120 121 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr); 122 if (ret < 0) { 123 fprintf(stderr, "%s: %s %" PRIx64 "\n", __func__, 124 strerror(errno), reg_base); 125 } 126 } 127 128 static void kvm_openpic_region_del(MemoryListener *listener, 129 MemoryRegionSection *section) 130 { 131 KVMOpenPICState *opp = container_of(listener, KVMOpenPICState, 132 mem_listener); 133 struct kvm_device_attr attr; 134 uint64_t reg_base = 0; 135 int ret; 136 137 attr.group = KVM_DEV_MPIC_GRP_MISC; 138 attr.attr = KVM_DEV_MPIC_BASE_ADDR; 139 attr.addr = (uint64_t)(unsigned long)®_base; 140 141 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr); 142 if (ret < 0) { 143 fprintf(stderr, "%s: %s %" PRIx64 "\n", __func__, 144 strerror(errno), reg_base); 145 } 146 } 147 148 static int kvm_openpic_init(SysBusDevice *dev) 149 { 150 KVMState *s = kvm_state; 151 KVMOpenPICState *opp = FROM_SYSBUS(typeof(*opp), dev); 152 int kvm_openpic_model; 153 struct kvm_create_device cd = {0}; 154 int ret, i; 155 156 if (!kvm_check_extension(s, KVM_CAP_DEVICE_CTRL)) { 157 return -EINVAL; 158 } 159 160 switch (opp->model) { 161 case OPENPIC_MODEL_FSL_MPIC_20: 162 kvm_openpic_model = KVM_DEV_TYPE_FSL_MPIC_20; 163 break; 164 165 case OPENPIC_MODEL_FSL_MPIC_42: 166 kvm_openpic_model = KVM_DEV_TYPE_FSL_MPIC_42; 167 break; 168 169 default: 170 return -EINVAL; 171 } 172 173 cd.type = kvm_openpic_model; 174 ret = kvm_vm_ioctl(s, KVM_CREATE_DEVICE, &cd); 175 if (ret < 0) { 176 qemu_log_mask(LOG_UNIMP, "%s: can't create device %d: %s\n", 177 __func__, cd.type, strerror(errno)); 178 return -EINVAL; 179 } 180 opp->fd = cd.fd; 181 182 memory_region_init_io(&opp->mem, &kvm_openpic_mem_ops, opp, 183 "kvm-openpic", 0x40000); 184 185 sysbus_init_mmio(dev, &opp->mem); 186 qdev_init_gpio_in(&dev->qdev, kvm_openpic_set_irq, OPENPIC_MAX_IRQ); 187 188 opp->mem_listener.region_add = kvm_openpic_region_add; 189 opp->mem_listener.region_add = kvm_openpic_region_del; 190 memory_listener_register(&opp->mem_listener, &address_space_memory); 191 192 /* indicate pic capabilities */ 193 msi_supported = true; 194 kvm_kernel_irqchip = true; 195 kvm_async_interrupts_allowed = true; 196 197 /* set up irq routing */ 198 kvm_init_irq_routing(kvm_state); 199 for (i = 0; i < 256; ++i) { 200 kvm_irqchip_add_irq_route(kvm_state, i, 0, i); 201 } 202 203 kvm_irqfds_allowed = true; 204 kvm_msi_via_irqfd_allowed = true; 205 kvm_gsi_routing_allowed = true; 206 207 kvm_irqchip_commit_routes(s); 208 209 return 0; 210 } 211 212 int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs) 213 { 214 KVMOpenPICState *opp = FROM_SYSBUS(typeof(*opp), SYS_BUS_DEVICE(d)); 215 struct kvm_enable_cap encap = {}; 216 217 encap.cap = KVM_CAP_IRQ_MPIC; 218 encap.args[0] = opp->fd; 219 encap.args[1] = cs->cpu_index; 220 221 return kvm_vcpu_ioctl(cs, KVM_ENABLE_CAP, &encap); 222 } 223 224 static Property kvm_openpic_properties[] = { 225 DEFINE_PROP_UINT32("model", KVMOpenPICState, model, 226 OPENPIC_MODEL_FSL_MPIC_20), 227 DEFINE_PROP_END_OF_LIST(), 228 }; 229 230 static void kvm_openpic_class_init(ObjectClass *klass, void *data) 231 { 232 DeviceClass *dc = DEVICE_CLASS(klass); 233 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 234 235 k->init = kvm_openpic_init; 236 dc->props = kvm_openpic_properties; 237 dc->reset = kvm_openpic_reset; 238 } 239 240 static const TypeInfo kvm_openpic_info = { 241 .name = "kvm-openpic", 242 .parent = TYPE_SYS_BUS_DEVICE, 243 .instance_size = sizeof(KVMOpenPICState), 244 .class_init = kvm_openpic_class_init, 245 }; 246 247 static void kvm_openpic_register_types(void) 248 { 249 type_register_static(&kvm_openpic_info); 250 } 251 252 type_init(kvm_openpic_register_types) 253