xref: /openbmc/qemu/hw/intc/loongarch_ipi.c (revision fa62cb98)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * LoongArch IPI interrupt support
4  *
5  * Copyright (C) 2024 Loongson Technology Corporation Limited
6  */
7 
8 #include "qemu/osdep.h"
9 #include "hw/boards.h"
10 #include "hw/intc/loongarch_ipi.h"
11 #include "target/loongarch/cpu.h"
12 
13 static AddressSpace *get_iocsr_as(CPUState *cpu)
14 {
15     return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
16 }
17 
18 static int archid_cmp(const void *a, const void *b)
19 {
20    CPUArchId *archid_a = (CPUArchId *)a;
21    CPUArchId *archid_b = (CPUArchId *)b;
22 
23    return archid_a->arch_id - archid_b->arch_id;
24 }
25 
26 static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id)
27 {
28     CPUArchId apic_id, *found_cpu;
29 
30     apic_id.arch_id = id;
31     found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus,
32                         ms->possible_cpus->len,
33                         sizeof(*ms->possible_cpus->cpus),
34                         archid_cmp);
35 
36     return found_cpu;
37 }
38 
39 static CPUState *loongarch_cpu_by_arch_id(int64_t arch_id)
40 {
41     MachineState *machine = MACHINE(qdev_get_machine());
42     CPUArchId *archid;
43 
44     archid = find_cpu_by_archid(machine, arch_id);
45     if (archid) {
46         return CPU(archid->cpu);
47     }
48 
49     return NULL;
50 }
51 
52 static void loongarch_ipi_class_init(ObjectClass *klass, void *data)
53 {
54     LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass);
55 
56     licc->get_iocsr_as = get_iocsr_as;
57     licc->cpu_by_arch_id = loongarch_cpu_by_arch_id;
58 }
59 
60 static const TypeInfo loongarch_ipi_types[] = {
61     {
62         .name               = TYPE_LOONGARCH_IPI,
63         .parent             = TYPE_LOONGSON_IPI_COMMON,
64         .class_init         = loongarch_ipi_class_init,
65     }
66 };
67 
68 DEFINE_TYPES(loongarch_ipi_types)
69