1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * LoongArch IPI interrupt support 4 * 5 * Copyright (C) 2024 Loongson Technology Corporation Limited 6 */ 7 8 #include "qemu/osdep.h" 9 #include "hw/boards.h" 10 #include "qapi/error.h" 11 #include "hw/intc/loongarch_ipi.h" 12 #include "hw/qdev-properties.h" 13 #include "target/loongarch/cpu.h" 14 15 static AddressSpace *get_iocsr_as(CPUState *cpu) 16 { 17 return LOONGARCH_CPU(cpu)->env.address_space_iocsr; 18 } 19 20 static int archid_cmp(const void *a, const void *b) 21 { 22 CPUArchId *archid_a = (CPUArchId *)a; 23 CPUArchId *archid_b = (CPUArchId *)b; 24 25 return archid_a->arch_id - archid_b->arch_id; 26 } 27 28 static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id) 29 { 30 CPUArchId apic_id, *found_cpu; 31 32 apic_id.arch_id = id; 33 found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, 34 ms->possible_cpus->len, 35 sizeof(*ms->possible_cpus->cpus), 36 archid_cmp); 37 38 return found_cpu; 39 } 40 41 static int loongarch_cpu_by_arch_id(LoongsonIPICommonState *lics, 42 int64_t arch_id, int *index, CPUState **pcs) 43 { 44 MachineState *machine = MACHINE(qdev_get_machine()); 45 CPUArchId *archid; 46 CPUState *cs; 47 48 archid = find_cpu_by_archid(machine, arch_id); 49 if (archid && archid->cpu) { 50 cs = archid->cpu; 51 if (index) { 52 *index = cs->cpu_index; 53 } 54 55 if (pcs) { 56 *pcs = cs; 57 } 58 59 return MEMTX_OK; 60 } 61 62 return MEMTX_ERROR; 63 } 64 65 static void loongarch_ipi_realize(DeviceState *dev, Error **errp) 66 { 67 LoongsonIPICommonState *lics = LOONGSON_IPI_COMMON(dev); 68 LoongarchIPIClass *lic = LOONGARCH_IPI_GET_CLASS(dev); 69 MachineState *machine = MACHINE(qdev_get_machine()); 70 MachineClass *mc = MACHINE_GET_CLASS(machine); 71 const CPUArchIdList *id_list; 72 Error *local_err = NULL; 73 int i; 74 75 lic->parent_realize(dev, &local_err); 76 if (local_err) { 77 error_propagate(errp, local_err); 78 return; 79 } 80 81 assert(mc->possible_cpu_arch_ids); 82 id_list = mc->possible_cpu_arch_ids(machine); 83 lics->num_cpu = id_list->len; 84 lics->cpu = g_new0(IPICore, lics->num_cpu); 85 for (i = 0; i < lics->num_cpu; i++) { 86 lics->cpu[i].arch_id = id_list->cpus[i].arch_id; 87 lics->cpu[i].cpu = CPU(id_list->cpus[i].cpu); 88 lics->cpu[i].ipi = lics; 89 qdev_init_gpio_out(dev, &lics->cpu[i].irq, 1); 90 } 91 } 92 93 static void loongarch_ipi_class_init(ObjectClass *klass, void *data) 94 { 95 LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass); 96 LoongarchIPIClass *lic = LOONGARCH_IPI_CLASS(klass); 97 DeviceClass *dc = DEVICE_CLASS(klass); 98 99 device_class_set_parent_realize(dc, loongarch_ipi_realize, 100 &lic->parent_realize); 101 licc->get_iocsr_as = get_iocsr_as; 102 licc->cpu_by_arch_id = loongarch_cpu_by_arch_id; 103 } 104 105 static const TypeInfo loongarch_ipi_types[] = { 106 { 107 .name = TYPE_LOONGARCH_IPI, 108 .parent = TYPE_LOONGSON_IPI_COMMON, 109 .instance_size = sizeof(LoongarchIPIState), 110 .class_size = sizeof(LoongarchIPIClass), 111 .class_init = loongarch_ipi_class_init, 112 } 113 }; 114 115 DEFINE_TYPES(loongarch_ipi_types) 116